additions for VACASK backannotation (vsource currents). nmos4.sym updated to support Spectre netlist (Vacask simulation)

src/token.c

@@ -4497,7 +4497,7 @@ const char *translate(int inst, const char* s)
   int level;
   Lcc *lcc;
   char *value1 = NULL;
-  int sim_is_xyce;
+  int sim_is_ngspice, sim_is_vacask /*, sim_is_xyce */;
   char *instname = NULL;
  
   if(!s && inst == -1) {
@@ -4535,7 +4535,9 @@ const char *translate(int inst, const char* s)
   /* if spice_get_* token not processed by tcl use enginering notation (2m, 3u, ...)  */
   if(!(strstr(s, "tcleval(") == s)) engineering = 1;
   instname = (inst >=0 && xctx->inst[inst].instname) ? xctx->inst[inst].instname : "";
-  sim_is_xyce = tcleval("sim_is_xyce")[0] == '1' ? 1 : 0;
+  sim_is_ngspice = tcleval("sim_is_ngspice")[0] == '1' ? 1 : 0;
+  sim_is_vacask = tcleval("sim_is_vacask")[0] == '1' ? 1 : 0;
+  /* sim_is_xyce = tcleval("sim_is_xyce")[0] == '1' ? 1 : 0; */
   level = xctx->currsch;
   lcc = xctx->hier_attr;
   size=CADCHUNKALLOC;
@@ -4899,7 +4901,7 @@ const char *translate(int inst, const char* s)
                     strlen(dev) + 21; /* some extra chars for i(..) wrapper */
               dbg(1, "dev=%s\n", dev);
               fqdev = my_malloc(_ALLOC_ID_, len);
-              if(!sim_is_xyce) {
+              if(sim_is_ngspice) {
                 int prefix, vsource;
                 char *prefix_ptr = strrchr(dev, '.'); /* last '.' in dev */
                 if(prefix_ptr) prefix = prefix_ptr[1]; /* character after last '.' */
@@ -4918,7 +4920,9 @@ const char *translate(int inst, const char* s)
                 } else {
                  my_snprintf(fqdev, len, "i(@%c.%s%s.%s[i])", prefix, path, instname, dev);
                 }
-              } else {
+              } else if(sim_is_vacask) {
+                my_snprintf(fqdev, len, "%s%s.flow(br)", path, instname);
+              } else { /*xyce */
                 my_snprintf(fqdev, len, "i(%s%s.%s)", path, instname, dev);
               }
               strtolower(fqdev);
@@ -5072,7 +5076,7 @@ const char *translate(int inst, const char* s)
               len = strlen(path) + strlen(dev) + 40; /* some extra chars for i(..) wrapper */
               dbg(1, "token=%s, dev=%s param=%s\n", token, dev, param ? param : "<NULL>");
               fqdev = my_malloc(_ALLOC_ID_, len);
-              if(!sim_is_xyce) {
+              if(sim_is_ngspice) {
                 int vsource = (prefix == 'v') || (prefix == 'e');
                 if(path[0]) {
                   if(vsource) {
@@ -5101,7 +5105,9 @@ const char *translate(int inst, const char* s)
                     my_snprintf(fqdev, len, "i(@%s[i])", dev);
                   }
                 }
-              } else {
+              } else if(sim_is_vacask) {
+                my_snprintf(fqdev, len, "%s%s.flow(br)", path, instname);
+              } else { /*xyce */
                 my_snprintf(fqdev, len, "i(%s%s)", path, dev);
               }
               if(param) my_free(_ALLOC_ID_, &param);

src/xschem.tcl

@@ -1444,11 +1444,11 @@ proc ngspice::get_node {n} {
 
 # test if currently set simulator is ngspice
 proc sim_is_ngspice {} {
-  global sim
+  global sim netlist_type
 
   set_sim_defaults
 
-  if { [info exists sim(spice,default)] } {
+  if {$netlist_type eq {spice} && [info exists sim(spice,default)] } {
     set idx $sim(spice,default)
     if { [regexp {ngspice} $sim(spice,$idx,cmd)] } {
       return 1
@@ -1463,11 +1463,11 @@ proc sim_is_Xyce {} {
 }
 
 proc sim_is_xyce {} {
-  global sim
+  global sim netlist_type
 
   set_sim_defaults
 
-  if { [info exists sim(spice,default)] } {
+  if {$netlist_type eq {spice} && [info exists sim(spice,default)] } {
     set idx $sim(spice,default)
     if { [regexp {[xX]yce} $sim(spice,$idx,cmd)] } {
       return 1
@@ -1476,6 +1476,20 @@ proc sim_is_xyce {} {
   return 0
 }
 
+proc sim_is_vacask {} {
+  global sim netlist_type
+      
+  set_sim_defaults
+    
+  if {$netlist_type eq {spectre} && [info exists sim(spectre,default)] } {
+    set idx $sim(spectre,default)
+    if { [regexp {vacask} $sim(spectre,$idx,cmd)] } {
+      return 1
+    } 
+  } 
+  return 0 
+}   
+
 # tests if file f exists. One level of global scope 'subst' is done on f
 # to expand global variables / commands catching errors.
 # example:

xschem_library/devices/nmos4.sym

@@ -1,4 +1,4 @@
-v {xschem version=3.4.8RC file_version=1.2
+v {xschem version=3.4.8RC file_version=1.3
 *
 * This file is part of XSCHEM,
 * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -24,7 +24,9 @@ K {type=nmos
 format="@spiceprefix@name @pinlist @model w=@w l=@l @extra m=@m"
 template="name=M1 model=nmos w=5u l=0.18u del=0 m=1"
 verilog_format="nmos #@del @name ( @@d , @@s , @@g );"
-spectre_format="@name ( @pinlist ) @model w=@w l=@l @extra $mfactor=@m"}
+spectre_format="@name ( @pinlist ) @model w=@w l=@l @extra $mfactor=@m"
+
+spectre_device_model="load \\"nmos.osdi\\""}
 V {}
 S {}
 F {}