Commit Graph

4786 Commits

Author SHA1 Message Date
Pawel Kojma 4e6eafd994
Allow constant expressions without parentheses in PATHPULSE$ declaration (#7199) 2026-03-11 06:01:33 -04:00
Yilou Wang 5bf1d060c9
Fix internal error when derived class calls this.randomize() with inherited rand members (#7229) (#7234) 2026-03-10 19:03:18 -04:00
Yilou Wang 3ba9077726
Fix soft cross-object constraint priority inversion (#7228) (#7233)
Emit nested constraint setup tasks in depth-first order (deepest first)
so outer-scope soft constraints get higher priority per IEEE 18.5.13.
2026-03-10 19:02:15 -04:00
Wilson Snyder a7a5c9f548 Improve not-found message to show cwd 2026-03-10 08:55:51 -04:00
Rahul Behl 2046879beb
V3Randomize: Fix dist operator inside ConstraintIf blocks (#7221) (#7224)
The lowerDistConstraints() function was not recursing into ConstraintIf
nodes, causing dist operators inside if-else blocks to remain unlowered
and trigger an internal error when ConstraintExprVisitor encountered them.

Fix by adding recursive handling of ConstraintIf nodes in lowerDistConstraints:
- Check for AstConstraintIf nodes before AstConstraintExpr
- Recursively process thensp() and elsesp() branches
- This ensures all dist operators are lowered regardless of nesting

Test case: t_randomize_dist_conditional.v demonstrates conditional dist:
    constraint c {
      if (randd) {
        x dist { 8'd0 := 1, 8'd255 := 3 };  // 25% / 75%
      } else {
        x dist { 8'd0 := 3, 8'd255 := 1 };  // 75% / 25%
      }
    }

Fixes #7221
2026-03-10 07:06:00 +00:00
em2machine 1b2b8afdc1
Fix wrong $bits() for parameterized interface struct typedefs (#7218) (#7219) 2026-03-09 22:32:13 -04:00
Veripool API Bot 1f67080a1f Tests: Verilog format 2026-03-09 21:39:16 -04:00
Veripool API Bot 07ed6aef53 Tests: Verilog format 2026-03-08 18:26:40 -04:00
Christian Hecken 9c5f4e2483
Internals: Extend VerilatedVar to hold force control signal pointers (#7217) 2026-03-08 15:53:32 -04:00
Christian Hecken 0019c12242
Fix vpi_handle_by_name generated scope retrieval (#7187 repair) (#7214)
Co-authored-by: Christian Hecken <christian.hecken@ibm.com>
2026-03-07 20:36:29 -05:00
Wilson Snyder 3097df46fa Change `--converge-limit` default to 10000 (#7209).
Fixes #7209.
2026-03-07 09:05:37 -05:00
Wilson Snyder 67ced4715d Tests: Fix t_json_only_debugcheck to not need sensitive golden file 2026-03-07 08:35:54 -05:00
Wilson Snyder 4d369e4262 Fix --debug-inputs for .vlt files 2026-03-07 08:01:27 -05:00
Veripool API Bot cf965464a2 Tests: Verilog format 2026-03-07 08:00:45 -05:00
em2machine bef5c1f475
Fix static function not found from parameterized extends class (#7204) (#7208) 2026-03-06 16:23:02 -05:00
Rahul Behl efa53189ea
Support constraint `with` item.index array reduction (#7198) 2026-03-06 05:14:55 -05:00
Geza Lore cedec65c39
Change array tracing to always dump left index to right index (#7205)
Also add array bounds and struct/union member counts to trace pushPrefix
(not used by vcd/fst/saif). Together these improve consistency in some
waveform formats.
2026-03-06 09:32:08 +00:00
Wilson Snyder b89d29cab9 * Support procedural concurrent assertion simple cases (#6944).
Fixes #6944.
2026-03-05 20:03:48 -05:00
Wilson Snyder c2d65c2e13 * Fix class extend references between queues (#7195).
Fixes #7195.
2026-03-05 18:04:22 -05:00
Julian Carrier 45a5e72509
Fix recursive default assignment for subarrays (#4589) (#7202) 2026-03-05 16:05:54 -05:00
Geza Lore 4f4d48e9d7
Fix library/hier_block tracing when top name is empty (#7200) 2026-03-05 08:44:41 -05:00
Ryszard Rozak 258629634c
Support force assignments to array elements of real type (#7048) 2026-03-05 08:37:20 -05:00
Nick Brereton e5ad9b3a4b
Support Z non-blocking assignment (#7192) (#496) (#7197) 2026-03-04 22:39:05 -05:00
Wilson Snyder 572f50126b Improve function call argument error to show target function (rewording) 2026-03-04 20:22:25 -05:00
Wilson Snyder c93f5256d4 Fix string cast on array call 2026-03-04 20:12:10 -05:00
Veripool API Bot 4ff518de61 Verilog format 2026-03-04 20:12:10 -05:00
Christian Hecken 84f3cc4f48
Add VPI array indexing support in signal names (#7097) (#7187) 2026-03-04 19:37:06 -05:00
Wilson Snyder 1bf2ea7643 Improve function call argument error to show target function 2026-03-04 19:01:01 -05:00
Igor Zaworski 7acd73fede
Fix super constructor calls with local variables, by using init functions (#6214) (#6933) 2026-03-04 17:55:55 -05:00
em2machine c34cd6ddf1
Fix missing scope when calling package function (#7128 repair) (#7188) (#7190) 2026-03-04 15:37:55 -05:00
Rahul Behl 9a5c1d27c8
Support array reduction methods with 'with' clause in constraints (#6455) (#6999) 2026-03-04 12:01:35 -05:00
Nick Brereton 44701201ac
Support inout inside SV interface (#3466) (#7134) 2026-03-04 09:08:07 -05:00
jalcim 7cf539cf05
Add --func-recursion-depth CLI option (#7175) (#7179) 2026-03-04 06:46:07 -05:00
Yilou Wang 3bc73cc768
Support constraint imperfect distributions (#6811) (#7168) 2026-03-03 11:23:14 -05:00
Veripool API Bot ce4d35aa85 Verilog format 2026-03-03 07:21:24 -05:00
em2machine 5821d0697c
Fix interface localparam dependencies and arbitrary nesting (#6936) (#7128) 2026-03-03 06:55:59 -05:00
Yilou Wang ed84f3adb2
Support constraints on fixed-size array of class object members (#7170) (#7183) 2026-03-03 06:27:31 -05:00
jalcim d406efdcf9 Fix recursive constant function in $unit scope (#7174) (#7178) 2026-03-02 15:15:34 -05:00
Yilou Wang 8a413b3ec7
Fix std::randomize() in static function with static class members (#7167) (#7169) 2026-03-02 05:59:00 -05:00
Yilou Wang 108d209bd7
Support soft constraint solving with last-wins priority (#7124) (#7166) 2026-03-01 15:16:55 -05:00
Geza Lore 6c48b3282e
Enable V3LiftExpr with code coverage (#7164) 2026-03-01 15:04:49 +00:00
Geza Lore 3249fd8cc0
Internals: Mark Premit temporaries funcLocal, noReset (#7160) 2026-03-01 14:56:21 +00:00
Geza Lore 9d8baa1e44
Testing: Relax expected file count in t_flag_csplit_groups (#7163) 2026-03-01 13:27:46 +00:00
Geza Lore 77ce9cec1e
Optimize conditional merging across some impure statements (#7159)
- Allow reordering pure statements with DPI import calls iff no public
  variables (including those read via a DPI export) are involved. This
  ensures the DPI import can't observe the reordering
- Allow reordering of pure statements with AstDisplay and AstStop. This
  requires an assumption that AstDisplay and AstStop will not read or
  write model state other than via a VarRef explicitly present int the
  Ast.
Overall this allows eliminating a lot of conditionals around assertions,
which were previously not possible.
2026-03-01 05:47:05 -05:00
Wilson Snyder 230ce772c2 Tests: Verilog format; rename test 2026-02-28 18:19:34 -05:00
Geza Lore 098fe96643
Add V3LiftExpr pass to lower impure expressions and calls (#7141)
Introduce new pass that converts impure expressions, or those with
function and method calls into simple assignment statements. Please see
the blurb at the top of the file why this is useful and how it works.
In particular currently it enables more Dfg optimization as functions
will be inlined without AstExprStmt.

Ideally we should enforce this lowering is applied to every procedural
statement (there are still a handful of exceptions). With that, long
term with this pass + #6820, there should be no need to ever use an
AstExprStmt past this new lowering pass, which should enable more easier
optimization down the line.

Also ideally this should be run earlier. Currently it's after V3Tristate
as that calls pinReconnectSimple so we don't have to touch Cell ports.

Currently disabled when code coverage is enabled due to #7119.
2026-02-28 22:20:09 +00:00
Geza Lore 2ceea267e5
Fix eliminating assignments to DPI-read vaiables (#7158) 2026-02-28 10:09:01 -05:00
Pawel Kojma face700f29
Improve assignment-compatibility type check (#2843) (#5666) (#7052) 2026-02-28 09:55:06 -05:00
Ryszard Rozak 6f892d58ac
Fix forcing unpacked variables (#7149) 2026-02-28 09:53:41 -05:00
Kamil Danecki df6b808c49
Fix parameters inside std::randomize `with` clause (#7140) 2026-02-28 09:53:05 -05:00