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prjxray
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258 Commits

Author SHA1 Message Date
Keith Rothman 222eefcece Use extract_numbers for sort keys to preserve previous DB output. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-18 10:45:22 -08:00
Keith Rothman 89761c1102 Add some sorting to JSON outputs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-18 06:39:20 -08:00
Keith Rothman d95eefc8de Fix some bugs present timing analysis script. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-13 13:19:46 -08:00
Alessandro Comodi 4a0ca41077 roi_only: copy tilegrid and tileconn from equivalent part 
005-tilegrid fuzzer cannot run for some parts as some of the IOBs are
not available, therefore the fuzzer exits with errors.

Instead, the tilegrid is copied from the specified equivalent part.

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi 88f7830456 addressed review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi 7226354bdf fix env variable usage in roi_harness minitest 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi e44027bcaf Move all part-specific files to dedicated directory 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Tomasz Michalak 18acada713 minitests: Add min litex with DDR test 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-12-11 11:49:25 +01:00
Tomasz Michalak fb96f3fe86 minitests: Add minimal Litex configuration for Arty 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-12-10 10:02:36 +01:00
litghost 0e8ff9b64e
Merge pull request #1157 from antmicro/iostandard_minitest 
Minitest for different IOSTANDARDs
 2019-12-09 11:09:33 -08:00
Maciej Kurc eef8ec93cb Added ignoring of PUDC_B pin. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-09 14:40:35 +01:00
Maciej Kurc 75c6ff27de A minitest for Zynq7 EMIO PS->PL interface. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-03 15:39:13 +01:00
Maciej Kurc 20475bfd6a Review comments. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-03 12:07:04 +01:00
Maciej Kurc d9fc7b3f7e Fixed semicolon 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-02 10:34:37 +01:00
Maciej Kurc 0fb79b8753 Fixed bug with diff pair loc-ing. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-02 10:16:21 +01:00
Maciej Kurc c396b0f9cc Added support for differential standards. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-29 16:29:41 +01:00
Maciej Kurc e8b05c6b27 Minitest for different IOSTANDARDs 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-29 13:55:14 +01:00
Tim 'mithro' Ansell 7386641d9b Fix trailing white space. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-11-03 15:07:24 -08:00
litghost daf284151c
Merge pull request #1119 from antmicro/litex_litedram 
minitests: Add test for Litex DRAM memory interface
 2019-10-30 10:40:01 -07:00
litghost 78cf96be0f
Merge pull request #1122 from JakeMercer/whitespace 
Whitespace
 2019-10-29 15:04:39 -07:00
Maciej Kurc 4a6930694f Reworked fuzzer, added README.md 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00
Jake Mercer c05b4b0406 MAKE - Format Trailing Whitespace 
Add `make format-trailing-ws`.  This recipe finds all _files_ (not
links) known to Git and uses `sed` to remove trailing whitespace.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-10-26 10:04:52 +01:00
Tomasz Michalak 43fe925ff3 minitests: Add test for Litex DRAM memory interface 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-10-24 14:28:37 +02:00
litghost c94cb0224c
Revert "Whitespace" 2019-10-23 14:22:17 -07:00
Jake Mercer bf11f43390 FORMAT - Run `make format` 
Changes after running `make format`.  Future commits which add
whitespace should be caught by CI at the PR stage.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-10-22 19:35:24 +01:00
Leonardo Romor c138c156ed
Applied requested changes to use XRAY_UTILS_DIR 
Signed-off-by: Leonardo Romor <leonardo.romor@gmail.com>
 2019-10-10 19:50:02 +02:00
Leonardo Romor 48755a1128
Updated wrong string path added in syspath before import 
Signed-off-by: Leonardo Romor <leonardo.romor@gmail.com>
 2019-10-10 19:20:32 +02:00
Tim Ansell ecfd250a28
Merge pull request #1068 from antmicro/litex_readme 
Updated README.md for LiteX minitest
 2019-09-30 10:08:47 +02:00
litghost 22750bc2ce
Merge pull request #1058 from antmicro/pll_minitest 
Minitest for PLLE2_ADV
 2019-09-26 10:06:53 -07:00
Maciej Kurc dd26790d65 Updated README.md, added different phase settings to the PLL. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-26 09:47:58 +02:00
Tim Ansell d78b50af8b
Merge pull request #1040 from antmicro/fix-sphinx-xref-links 
Fixing documentation cross-reference links
 2019-09-25 10:29:07 -07:00
Maciej Kurc 1f31c98265 Updated README.md 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-25 12:13:11 +02:00
Alessandro Comodi 2fab112c71 docs: fixed some READMEs and removed empty .md file generation 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-09-25 09:54:28 +02:00
Maciej Kurc 32feed6640 Removed BUFR and BUFMR, clock division implemented on logic. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-24 10:45:09 +02:00
Maciej Kurc 31ba200080 Minitest for PLLE2_ADV. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-20 11:20:30 +02:00
Maciej Kurc 2b3ca04914 Removed the need for physical pin loopback. The design now transmitts and receives using the same pins. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-12 15:08:05 +02:00
Maciej Kurc e722712661 Formatting 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-12 14:35:37 +02:00
Maciej Kurc 0ebe592dca Updated docs. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-12 14:35:37 +02:00
Maciej Kurc b878a2e651 A minitest for ISERDES in NETWORKING SDR/DDR modes. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-12 14:35:37 +02:00
litghost 6d21194b56
Merge pull request #1047 from antmicro/oserdes_minitest 
OSERDES minitest
 2019-09-11 09:13:48 -07:00
Maciej Kurc b31345010c OSERDES minitest without the need for hardware loopbacks. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-11 13:34:07 +02:00
Maciej Kurc 2f143b18b8 Code polish 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-03 16:36:07 +02:00
Maciej Kurc baf288ad24 A minitest for ISERDES+IDELAY 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-09-03 16:23:45 +02:00
Keith Rothman 6c4e6aa718 Update HCLK_IOI offset to match tilegrid 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-26 17:18:48 -07:00
Keith Rothman 2c7b64ea22 Create script for generating remaining bit report. 
This report is fairly fragile, but works well enough for the remaining
LiteX bits.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-26 15:04:29 -07:00
Keith Rothman fa2f61f914 Run make format. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-23 17:21:26 -07:00
Keith Rothman a7ba547acb Filter out non-IOB bits. 
Also add output from LiteX to verify IOB FASM features.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-23 13:38:03 -07:00
Keith Rothman 3345f30817 Fix D9/B8 in arty-swbut harness. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2019-07-10 17:15:18 -07:00
litghost 559f840097
Merge pull request #916 from antmicro/srl_minitests 
Minitests for SRLs
 2019-07-09 09:10:36 -07:00
Maciej Kurc 5c60639442 Added generation of sorted and "uniqued" FASM output 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-07-05 12:03:30 +02:00