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20 Commits

Author SHA1 Message Date
Unai Martinez-Corral 5a41cf408b docs: hierarchy 
Signed-off-by: Unai Martinez-Corral <umartinezcorral@antmicro.com>
 2022-02-24 11:59:37 +01:00
Robert Winkler e8ff146443 Add description of architecture-specific database files to docs 
This commit adds description of the following database files:
  - mask_*.db
  - ppips_*.db
  - segbits_*.db
  - site_type_*.db
  - tile_type_*.db

Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
 2020-05-19 14:14:29 +02:00
Robert Winkler 1b296ea876 New structure of project documentation 
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
 2020-05-19 14:14:29 +02:00
Robert Winkler 675af0728c Fix warnings in documentation 
This commit resolves all warnings in the project documentation

Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
 2020-03-11 10:32:04 +01:00
Alessandro Comodi f1fd0c975a docs: removed src directory to have working readthedocs build 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-09-24 11:49:00 +02:00
Alessandro Comodi aa0fa7ba75 using markdown as package from repository 
also moved all documenation sources in `src` directory

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-09-04 15:51:28 +02:00
Alessandro Comodi d0ab539f25 fixing documentation cross-reference links 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2019-09-04 15:44:45 +02:00
Tim 'mithro' Ansell b75360584d docs: Import wiki pages. 
* Interconnect page.
 * Reference page.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-27 12:08:55 -05:00
Tim 'mithro' Ansell 51f62b8f0b docs: Go back to 2 levels. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-04 11:26:23 -07:00
Tim 'mithro' Ansell eedeee16cb docs: Import README add give fuzzers structures. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-04 11:19:36 -07:00
Tim 'mithro' Ansell 326860d634 docs: Add database file format doc to TOC. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-04 10:12:27 -07:00
Tim 'mithro' Ansell 8c90ae2e39 docs: Adding DRAM info to TOC. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-03 19:28:44 -07:00
John McMaster 1205b5bddb docs: tileconn, tilegrid 
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
 2018-08-28 17:07:09 -07:00
Tim 'mithro' Ansell a5f2a85fff docs: Adding the current fuzzers + minitests into documentation. 
* Using the same approach [as in my VTRs pull request](https://github.com/verilog-to-routing/vtr-verilog-to-routing/pull/297)

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2018-02-28 13:12:33 -08:00
Davide ad4580d8ed Changed folder name for the 'database development process' of the docs and updated the index.rst page accordingly. 
Also a few minor changes as requested by @mithro regarding the content itself and rearranged the paragraphs.

Signed-off-by: Davide <davide.toldo@stud.tu-darmstadt.de>
 2018-02-19 22:10:09 +01:00
Davide f2fb1fd145 added database development process to FAQ 
Signed-off-by: Davide <davide.toldo@stud.tu-darmstadt.de>
 2018-02-19 17:21:46 +01:00
Rick Altherr e6a3bdc0ed docs: configuration addressing section and rough notes for others 
Describes how frame addressing relates to physical chip structure. Rough
notes on how frames are loaded into the device and the packet format
used to operate that state machine.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
 2018-02-07 14:50:52 -08:00
Rick Altherr beb8e0bcf9 docs: overview of 7-Series architecture 
Describes the top-level physical structure.

Signed-off-by: Rick Altherr <raltherr@google.com>
 2018-02-05 17:14:27 -08:00
Rick Altherr dd5305a271 docs: Define some terms 
Tried to merge definitions from wiki/Glossary and my understandings of
terms related to architecture and configuration.

Signed-off-by: Rick Altherr <raltherr@google.com>
 2018-02-05 17:14:27 -08:00
Rick Altherr 1fc306b147 docs: Initial setup for Sphinx-based documentation 
Signed-off-by: Rick Altherr <raltherr@google.com>
 2018-02-05 17:14:27 -08:00