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docs: Adding DRAM info to TOC. 

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
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Tim 'mithro' Ansell 2019-04-03 19:28:23 -07:00
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@ -20,6 +20,7 @@ to develop a free and open Verilog to bitstream toolchain for these devices.
architecture/overview
architecture/configuration
architecture/bitstream_format
architecture/dram_configuration
architecture/glossary
.. toctree::