ad5ada90db
board: trion_t20_bga256_jtag support
2023-10-03 06:51:38 +02:00
afbf0c4ff8
board: adding @lambdaconcept ecpix5_r03 (ft4232)
2023-09-21 06:24:30 +02:00
9e91c31e31
Fixes for PVS errors
2023-09-01 22:30:24 +03:00
9d22d62a54
part/board: adding Avnet Mini-ITX
...
Adding the Avnet Mini-ITX dev board that uses the XC7Z100 Zynq-7000
device.
2023-08-07 17:06:02 +01:00
e3c8d6be1d
board: added QMTECH cyclone10 LP starter kit (10CL016YU484C8G)
2023-08-05 11:49:53 +02:00
91f2900f0c
add support for colorlight-i9+ board + spiOverJtag/spiOverJtag_xc7a50tfgg484.bit.gz
2023-06-30 11:36:32 +02:00
3e25a33346
boards: added support for 14bits 125MHz redpitaya board (7010)
2023-06-29 16:59:42 +02:00
9331bf7a6b
add sipeed tang nano 20k
2023-05-25 19:24:48 +08:00
873de96a3b
spiOverJtag: added efinix Titanium Ti60 support
2023-04-27 16:41:58 +02:00
07a0708eb8
efinix:
...
- jtag mode: added spiOverJtag support;
- spiOverJtag: added efinix support: verilog file and t8f81 bitstream
- xyloni: part code for spiOverJtag flash access/load bridge
2023-04-27 16:41:17 +02:00
4161c79920
Add Support for Xilinx KCU116 ( #322 )
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* initial kcu116 support
* add kintex ultrascale plus family to xilinx.cpp
* add docs
* combine xcku and xcvu check
* rebuild bitstream for -1 speedgrade
2023-03-09 20:48:19 +01:00
cda14f24e3
board: hseda-xc6slx16
2023-03-04 17:55:02 +01:00
7de494f666
adding Opal Kelly XEM8320 board
2023-02-28 22:40:41 +01:00
f54781471b
Add initial support for VCU128
2023-02-19 18:39:14 +08:00
9a09e427e3
Added Lone Dynamics Schoko and Konfekt SBCs
2023-02-11 17:15:45 +01:00
5a00f0d184
part: Add all cyclone V variant
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board: Add the Terasic C5G
2023-01-29 15:35:47 +01:00
e5481787d8
Fix VCU118 board part name and IR length
2023-01-21 14:45:50 +01:00
67563983f9
feat(board): add support for Terasic DE10-Lite
2023-01-09 15:52:54 -06:00
fdf4c94d83
boards: add Sitlinv STLV7325
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Sitlinv STLV7325 is a board with XC7K325T-FFG676.
Add support for it.
The board does not have JTAG cables on board, however its vendor
provides an option to buy a FT4232-based JTAG cable with the board, so
the default cable is set to ft4232.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
2023-01-06 15:22:43 +08:00
14fce33109
feat(board): add support for Arrow/Terasic DECA
2023-01-04 13:11:21 -06:00
cc1bc89f29
boards: Trenz TEI0010 - AnalogMax
2023-01-04 19:00:08 +01:00
0591af56b7
feat(board): add support for Trenz C10LP-RefKit
2022-12-25 15:53:45 -06:00
0bdef7bab1
typo's, added git as dependency
2022-12-18 13:56:54 +01:00
0855efb29f
Add initial support for the VCU118 board
2022-12-11 22:11:50 +01:00
e536634ada
adding LiteX-Acorn-Baseboards support
2022-12-11 20:39:32 +01:00
0048431fb2
ALINX AX516 board.
2022-11-26 23:05:30 +01:00
b078aa393a
adding nexys A7 (50/100) aka nexys 4 DDR
2022-11-23 13:47:07 +01:00
42193f1db8
boards: Add USRP X300 and X310
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Signed-off-by: Martin Braun <martin.braun@ettus.com>
2022-11-22 20:15:16 +01:00
2da7696f19
Update board.hpp
2022-10-30 15:05:22 +02:00
b3e25bc650
Add support for xc7s_csga225 and the Digilent CMOD S7 board.
2022-09-30 22:27:20 +02:00
3c9792645e
add support for CmodA7-35T digilent fpga board
2022-09-30 21:17:45 +02:00
61e959f93d
main,board,ftdiJtagBitbang: use pin ID instead of shift
2022-08-23 18:37:43 +02:00
b4d343ce05
board: adding sipeed Tang Primer 20k
2022-07-26 20:25:43 +02:00
2f30668dbc
ORBTrace Mini support (DFU mode)
2022-06-18 22:55:58 +02:00
5295544200
Correct part number for ZCU106 board
2022-05-16 00:44:59 -06:00
76f13604d1
Add initial support for ZCU106 development board
2022-05-14 02:48:23 -06:00
b60f37b56d
Support for the Papilio One board
2022-03-25 21:44:05 +01:00
3cef7f920d
board: Xilinx ZCU102
2022-03-19 10:08:51 +01:00
3210bcd9cb
Merge pull request #194 from infphyny/qmtech_5cefa5f23
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Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5…
2022-03-13 15:25:01 +01:00
2ed5eb5eec
Rename 5cefa5f23 to 5ce523, add documentation for board and fpga
2022-03-13 09:14:52 -04:00
7b36bdc893
Add qmtechCycloneV_5cefa5f23 board and spiOverJtag/spiOverJtag_5cefa5f23.rbf.gz bitstream to write flash
2022-03-12 09:25:22 -05:00
15fb5ac591
board: PYNQ-Z2
2022-03-12 14:54:24 +01:00
259914910f
board: Xilinx ZC706
2022-03-10 18:53:41 +01:00
28ebc98b1b
board: add CERN SPEC150
2022-03-03 15:40:42 +01:00
3cfdfb1856
Update board.hpp
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Use default cable. This is equivalent to 6MHz setting, albeit more versatile.
2022-02-21 23:05:37 -04:00
d4e8eef676
Add board and cable defaults for genesys2
2022-02-21 08:11:57 +00:00
7a7f1723ea
add support for colorlight-i9
2022-02-20 01:41:17 +01:00
6059c9dbfb
Remove the Tigard default cable, as the board does not have an on-board JTAG adapter.
2022-02-19 17:14:49 +10:30
7022e2101a
Add support for the QMTech Kintex7 Core Board
2022-02-19 14:22:55 +10:30
905e96dfec
Add digilent_zybo_z7 10/20 support
2022-02-15 21:01:11 -08:00
Gwenhael Goavec-Merou
Alexey Starikovskiy
Shareef Jalloq
Stéphane Chevigny
wonderfullook
Maik Ender
Jiajie Chen
wdevore
Olivier Galibert
Ricardo Barbedo
Marcus Andrade
Icenowy Zheng
Cedric de Wijs
Haakan T. Johansson
Martin Braun
Dvir Cohen
Bastian Löher
Hirosh Dabui
Mike Lewis
Stephan Ruloff
Torsten Reuschel
jonathan kimmitt
Rod Whitby
Hansem Ro