feat(board): add support for Trenz C10LP-RefKit

This commit is contained in:
Marcus Andrade 2022-12-25 15:53:45 -06:00
parent 40b9f79273
commit 0591af56b7
4 changed files with 18 additions and 3 deletions

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@ -188,6 +188,13 @@
Memory: OK
Flash: OK
- ID: c10lp-refkit
Description: Trenz c10lp-refkit
URL: https://shop.trenz-electronic.de/en/TEI0009-02-055-8CA-Cyclone-10-LP-RefKit-10CL055-Development-Board-32-MByte-SDRAM-16-MByte-Flash
FPGA: Cyclone 10 LP 10CL055YU484C8G
Memory: OK
Flash: OK
- ID: de0
Description: Terasic DE0
URL: https://www.terasic.com.tw/cgi-bin/page/archive.pl?No=364

12
doc/vendors/intel.rst vendored
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@ -9,6 +9,7 @@ Intel/Altera
.. NOTE::
* CYC1000
* C10LP-RefKit
* DE0
* de0nano
@ -41,7 +42,7 @@ file load:
# or
openFPGALoader -b boardname project_name.rbf
with ``boardname`` = ``de0``, ``cyc1000``, ``de0nano``, ``de0nanoSoc`` or ``qmtechCycloneV``.
with ``boardname`` = ``de0``, ``cyc1000``, ``c10lp-refkit``, ``de0nano``, ``de0nanoSoc`` or ``qmtechCycloneV``.
SPI flash
---------
@ -52,12 +53,17 @@ RPD and RBF are supported.
.. code-block:: bash
# CYC1000
quartus_cpf -o auto_create_rpd=on -c -d EPCQ16A -s 10CL025YU256C8G project_name.svf project_name.jic
# C10LP-RefKit
quartus_cpf -o auto_create_rpd=on -c -d EPCQ16A -s 10CL055YU484C8G project_name.svf project_name.jic
file load:
.. code-block:: bash
openFPGALoader -b cyc1000 -r project_name_auto.rpd
openFPGALoader -b boardname -r project_name_auto.rpd
# or
openFPGALoader -b cyc1000 -r project_name.rbf
openFPGALoader -b boardname -r project_name.rbf
with ``boardname`` = ``cyc1000``, ``c10lp-refkit``.

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@ -132,6 +132,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("colorlight-i9", "", "cmsisdap", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("crosslinknx_evn", "", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("cyc1000", "10cl025256", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("c10lp-refkit", "10cl055484", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("de0", "", "usb-blaster",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de0nano", "ep4ce2217", "usb-blaster",0, 0, CABLE_DEFAULT),
JTAG_BOARD("de0nanoSoc", "", "usb-blasterII",0, 0, CABLE_DEFAULT),

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@ -85,6 +85,7 @@ static std::map <uint32_t, fpga_model> fpga_list = {
{0x020f70dd, {"altera", "cyclone IV", "EP4CE115", 10}},
{0x020f30dd, {"altera", "cyclone 10 LP", "10CL025", 10}},
{0x020f50dd, {"altera", "cyclone 10 LP", "10CL055", 10}},
{0x02b140dd, {"altera", "cyclone V", "5CEBA9", 10}},
{0x02b150dd, {"altera", "cyclone V", "5CEA2", 10}},