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158 Commits 12 Branches 4 Tags
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12 Commits
Author SHA1 Message Date
Fischer Moseley 5ceefc8da9 this bram core has taken my soul 2023-04-12 18:15:50 -04:00
Fischer Moseley ba6100ce30 import tutorial from yesterday, add mostly working bram core 2023-04-12 11:47:50 -04:00
Fischer Moseley 3731305f63 keep tidying bram core 2023-04-10 18:03:02 -04:00
Fischer Moseley db76ce3579 reasonably tidy BRAM core - might be dependent on icarus 13 2023-04-10 17:51:43 -04:00
Fischer Moseley 4837b2787a add (half) working BRAM core example 2023-04-10 17:02:48 -04:00
Fischer Moseley 12f498dc9a add cursed BRAM core implementation 2023-04-10 14:38:29 -04:00
Fischer Moseley 1710da6f87 update makefile to represent new functional sim locations 2023-04-09 22:33:58 -04:00
Fischer Moseley 353be7551e remove all narly verilog from python! 🤠 2023-04-08 16:23:02 -04:00
Fischer Moseley c604614428 autogenerate logic_analyzer and sample_mem 2023-04-03 23:15:09 -04:00
Fischer Moseley 0a4a1519c4 clean up inferred BRAM, trim whitespace 2023-04-03 21:20:58 -04:00
Fischer Moseley 8f08dffc70 consolidate logic analyzer testbench 2023-04-03 12:20:24 -04:00
Fischer Moseley df4d243b9a refactor test structure 2023-04-02 20:33:50 -04:00