Stephen Williams
947d642da7
Always turn on ivl synthesis for blif target.
2013-08-25 12:27:55 -07:00
Cary R
1cbd6c3a80
Expand the scope of the parent variable.
2013-08-23 15:28:54 -07:00
Stephen Williams
11be93ce55
Merge branch 'master' of github.com:steveicarus/iverilog
2013-08-12 19:50:52 -07:00
Stephen Williams
aaf35ca6ab
Fix blif handling of wide ligic gates.
2013-08-12 19:50:32 -07:00
Cary R
4294a47cec
Merge branch 'master' of github.com:steveicarus/iverilog
2013-08-12 16:37:05 -07:00
Cary R
b983d5546b
Fix cppcheck call in tgt-blif (use .cc instead of .c)
2013-08-12 16:35:45 -07:00
Stephen Williams
ed9a3c3b10
Merge branch 'master' of github.com:steveicarus/iverilog
2013-08-09 20:55:44 -07:00
Stephen Williams
d8f4ff4b57
Remove eval_expr during PEBinary elaboration
...
Turns out that call to eval_expr is redundant, and in degenerate
situations can lead to so many wasteful calls to eval_expr that
elaboration performance suffers dramatically.
2013-08-09 20:55:18 -07:00
Cary R
af29735f44
Update cppcheck suppression file to match latest fstapi.c
2013-08-09 11:34:29 -07:00
Cary R
638300045c
Update to latest FST API files from GTKWave
2013-08-09 11:34:16 -07:00
Cary R
71552b7d1a
Fix typo in verilog.spec it should be blif.tgt not blif.txt
2013-08-06 17:17:10 -07:00
Cary R
7c0a75cf0c
tgt-blif is C++ so use the extra C++ warning flags
2013-08-06 17:10:52 -07:00
Cary R
f054500fe2
Fix space issues in tgt-blif
2013-08-06 17:09:37 -07:00
Stephen Williams
6684b2db04
Add BLIF support for ternary (MUX) operators.
2013-08-01 17:28:04 -07:00
Stephen Williams
999a53ab75
Add blif LIB_RE_* gates support.
2013-08-01 17:28:04 -07:00
Stephen Williams
534d44ba55
blif support for bit selects.
2013-08-01 17:28:04 -07:00
Stephen Williams
c7c10613d7
blif support for unsigned magnitude comparison.
2013-08-01 17:28:04 -07:00
Stephen Williams
dfc44db0ef
BLIF support for IVL_LPM_CMP_EQ and IVL_LPM_CMP_NE
2013-08-01 17:28:04 -07:00
Stephen Williams
7a6192b5c8
Generate blif code for IVL_LPM_SUB device.
2013-08-01 17:28:04 -07:00
Stephen Williams
05f90bcf55
Support blif emit of IVL_LPM_ADD device.
2013-08-01 17:28:04 -07:00
Stephen Williams
1be59d8ae7
Add blif target to RPM package.
2013-08-01 17:28:04 -07:00
Stephen Williams
b4dbb81af7
Fix handling of certain constants in ivl_target.h API.
...
The construction of the ivl_design_t consts member was broken,
not properly handling the addition of new objects.
2013-08-01 17:28:04 -07:00
Stephen Williams
e709849243
Add a README-BLIF.txt file for the blif target.
2013-08-01 17:28:04 -07:00
Stephen Williams
1b2fa39cdc
Add some more basic logic gates to blif target.
2013-08-01 17:28:04 -07:00
Stephen Williams
b4ec36ec78
blif nex_data_t collects name data early.
...
It is possible for the get_name_index() method to be called before
the get_name() method, so need to handle that case.
2013-08-01 17:28:04 -07:00
Stephen Williams
dddaacc6fd
Follow non-canonical bit numbering.
...
The signal bit numbering should be used for signals. This is
necessary for .model ports because the user specified numbers
are part of the interface, but once that is done, it is trivial
to follow it internally as well.
2013-08-01 17:28:03 -07:00
Stephen Williams
e0c9efd129
Implement blif support for constants and some logic/lpm gates.
...
This starts the handling of various logic gates.
2013-08-01 17:28:03 -07:00
Stephen Williams
01b81e0dbc
Implement the ivl_target ivl_scope_child functions.
...
These are a more convenient way of iterating through child scopes.
2013-08-01 17:28:03 -07:00
Stephen Williams
d2034a6458
Initial BLIF code generator.
...
Add the -tblif code generator target, and include some basic
useful behavior.
2013-08-01 17:28:03 -07:00
Cary R
c4edbda969
Warn that the SystemVerilog array querying functions are not supported.
2013-07-31 19:40:25 -07:00
Cary R
f3917778bc
vlog95: Add some support for $signed()/$unsigned() in a CA
2013-07-29 10:26:56 -07:00
Cary R
032f12af45
Fix some sign information in the CA code.
2013-07-29 10:26:49 -07:00
Cary R
bb37b74f98
Fix for br884 (packed array access problems)
2013-07-28 13:24:57 -07:00
Cary R
817a38494c
vlog95: add support for zero argument functions and better named block detect
...
Add support for translating a zero argument function by adding a dummy
argument and improve the code that looks for a named block in a process.
2013-07-24 19:41:59 -07:00
Cary R
d6fe6ea936
Add support for calling a user functions as a task (SV)
2013-07-24 19:38:00 -07:00
Cary R
af48acca14
Update tgt-pcb make clean target to remove lex/yacc generated file.
2013-07-22 10:30:39 -07:00
Cary R
11696e23d1
vlog95: Add support for translating a SV function return statement
2013-07-19 10:52:54 -07:00
Cary R
8b7dde0e41
vlog95: improve parameter select warning.
2013-07-18 17:44:45 -07:00
Cary R
54cb85adfc
Add support for a generate scope to vvp and the vpi routines.
...
Instead of just translating a generate scope to a named begin/end scope
this patch creates a generate specific scope (vpiScopeGenerate) that is
of the vpiGenScope type. This may not match the standard 100%, but does
allow the FST dumper to denote generate scopes differently than the
other scope types. Most of the VPI code treats a vpiGenScope just like a
named block so only the FST dumper should have different behavior.
2013-07-17 10:57:02 -07:00
Cary R
f636ffde48
Update some line numbers in the cppcheck suppression files
2013-07-16 11:27:37 -07:00
Cary R
87235b618b
Update FST files to latest from GTkWave
2013-07-16 11:27:23 -07:00
Cary R
e4cc12f3b9
Remove old comment and enclose sizeof value in parenthesis (vvp_vector8_t)
2013-07-12 10:57:39 -07:00
Cary R
9d1084d3c0
Remove reentrant support from tgt-pcb parsing
...
This is just extra overhead since the pcb target does not call the scanner
recursively. This also removes some compile warnings.
2013-07-11 19:19:22 -07:00
Cary R
21b24c7725
Fix more compile warnings and a minor bug
2013-07-11 19:10:25 -07:00
Cary R
3e75f8e41f
Remove a compile warning
2013-07-11 18:03:00 -07:00
Cary R
dec0fa622c
Add CXX warning flag to tgt-pcb and tgt-vhdl and fix warnings
2013-07-11 17:40:57 -07:00
Cary R
dbd05557ca
Fix Makefile and scope.cc in tgt-pcb
2013-07-09 18:54:50 -07:00
Cary R
e30334e527
Add ivl_parameter_width() function to ivl interface
2013-07-09 18:22:40 -07:00
Cary R
3e76f6d656
vlog95: more procedural $signed()/$unsigned() support
...
Add support for detecting when to add a $signed() or $unsigned() to
create a self-determined context. This makes the test in the test suite
pass, but there could still be issues
2013-07-09 17:55:21 -07:00
Cary R
91ad8a72c6
vlog95: Keep the scaling for a variable parameter indexed part select
...
The select expression scaling needs to be kept for a variable indexed
part select of a parameter since parameters are zero based in 1364-1995.
2013-07-05 17:23:28 -07:00