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Add CXX warning flag to tgt-pcb and tgt-vhdl and fix warnings

This commit is contained in:
Cary R 2013-07-11 17:39:17 -07:00
parent dbd05557ca
commit dec0fa622c
11 changed files with 44 additions and 44 deletions
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2
tgt-pcb/Makefile.in
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@ -43,7 +43,7 @@ INCLUDE_PATH = -I. -I.. -I$(srcdir) -I$(srcdir)/..
endif
CPPFLAGS = $(INCLUDE_PATH) @CPPFLAGS@ @DEFS@ @PICFLAG@
CXXFLAGS = @WARNING_FLAGS@ @CXXFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CXX@ @CXXFLAGS@
LDFLAGS = @LDFLAGS@
O = pcb.o scope.o show_netlist.o show_pcb.o footprint.o fp.o fp_lex.o

4
tgt-pcb/fp.y
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@ -7,7 +7,7 @@
%{
/*
* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
* Copyright (c) 2011-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -41,7 +41,7 @@ using namespace std;
(Current).first_line = (Rhs)[1].first_line; \
} while (0)
static void yyerror(YYLTYPE*yylloc, yyscan_t scanner, const char*file_path, const char*msg)
static void yyerror(YYLTYPE*, yyscan_t , const char*, const char*msg)
{
fprintf(stderr, "%s\n", msg);
}

6
tgt-pcb/scope.cc
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
* Copyright (c) 2011-2013 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
@ -87,11 +87,11 @@ int scan_scope(ivl_scope_t scope)
extern "C" int child_scan_fun(ivl_scope_t scope, void*)
{
int rc = scan_scope(scope);
scan_scope(scope);
return 0;
}
void sheet_box(ivl_scope_t scope, const map<string,attr_value>&attrs)
void sheet_box(ivl_scope_t scope, const map<string,attr_value>&)
{
printf("Sheet %s...\n", ivl_scope_name(scope));
unsigned sigs = ivl_scope_sigs(scope);

2
tgt-vhdl/Makefile.in
View File

@ -42,7 +42,7 @@ INCLUDE_PATH = -I. -I.. -I$(srcdir) -I$(srcdir)/..
endif
CPPFLAGS = $(INCLUDE_PATH) @CPPFLAGS@ @DEFS@ @PICFLAG@
CXXFLAGS = @WARNING_FLAGS@ @CXXFLAGS@
CXXFLAGS = @WARNING_FLAGS@ @WARNING_FLAGS_CXX@ @CXXFLAGS@
LDFLAGS = @LDFLAGS@
O = vhdl.o state.o vhdl_element.o vhdl_type.o vhdl_syntax.o scope.o process.o \

12
tgt-vhdl/expr.cc
View File

@ -1,7 +1,7 @@
/*
* VHDL code generation for expressions.
*
* Copyright (C) 2008-2011 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -625,7 +625,7 @@ static vhdl_expr *translate_concat(ivl_expr_t e)
return concat;
}
vhdl_expr *translate_sfunc_time(ivl_expr_t e)
vhdl_expr *translate_sfunc_time(ivl_expr_t)
{
cerr << "warning: no translation for $time (returning 0)" << endl;
vhdl_expr *result = new vhdl_const_int(0);
@ -633,7 +633,7 @@ vhdl_expr *translate_sfunc_time(ivl_expr_t e)
return result;
}
vhdl_expr *translate_sfunc_stime(ivl_expr_t e)
vhdl_expr *translate_sfunc_stime(ivl_expr_t)
{
cerr << "warning: no translation for $stime (returning 0)" << endl;
vhdl_expr *result = new vhdl_const_int(0);
@ -641,7 +641,7 @@ vhdl_expr *translate_sfunc_stime(ivl_expr_t e)
return result;
}
vhdl_expr *translate_sfunc_simtime(ivl_expr_t e)
vhdl_expr *translate_sfunc_simtime(ivl_expr_t)
{
cerr << "warning: no translation for $simtime (returning 0)" << endl;
vhdl_expr *result = new vhdl_const_int(0);
@ -649,7 +649,7 @@ vhdl_expr *translate_sfunc_simtime(ivl_expr_t e)
return result;
}
vhdl_expr *translate_sfunc_random(ivl_expr_t e)
vhdl_expr *translate_sfunc_random(ivl_expr_t)
{
cerr << "warning: no translation for $random (returning 0)" << endl;
vhdl_expr *result = new vhdl_const_int(0);
@ -657,7 +657,7 @@ vhdl_expr *translate_sfunc_random(ivl_expr_t e)
return result;
}
vhdl_expr *translate_sfunc_fopen(ivl_expr_t e)
vhdl_expr *translate_sfunc_fopen(ivl_expr_t)
{
cerr << "warning: no translation for $fopen (returning 0)" << endl;
vhdl_expr *result = new vhdl_const_int(0);

4
tgt-vhdl/process.cc
View File

@ -1,7 +1,7 @@
/*
* VHDL code generation for processes.
*
* Copyright (C) 2008-2010 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -80,7 +80,7 @@ static int generate_vhdl_process(vhdl_entity *ent, ivl_process_t proc)
return 0;
}
extern "C" int draw_process(ivl_process_t proc, void *cd)
extern "C" int draw_process(ivl_process_t proc, void *)
{
ivl_scope_t scope = ivl_process_scope(proc);

14
tgt-vhdl/scope.cc
View File

@ -1,7 +1,7 @@
/*
* VHDL code generation for scopes.
*
* Copyright (C) 2008-2010 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -89,7 +89,7 @@ static void link_scope_to_nexus_signal(nexus_private_t *priv, vhdl_scope *scope,
sn->connect.push_back(sig);
}
else {
scope_nexus_t new_sn = { scope, sig, pin, "" };
scope_nexus_t new_sn = { scope, sig, pin, "", list<ivl_signal_t>() };
priv->signals.push_back(new_sn);
}
}
@ -100,7 +100,7 @@ static void link_scope_to_nexus_signal(nexus_private_t *priv, vhdl_scope *scope,
static void link_scope_to_nexus_tmp(nexus_private_t *priv, vhdl_scope *scope,
const string &name)
{
scope_nexus_t new_sn = { scope, NULL, 0, name };
scope_nexus_t new_sn = { scope, NULL, 0, name, list<ivl_signal_t>() };
priv->signals.push_back(new_sn);
}
@ -969,7 +969,7 @@ static void create_skeleton_entity_for(ivl_scope_t scope, int depth)
* A first pass through the hierarchy: create VHDL entities for
* each unique Verilog module type.
*/
extern "C" int draw_skeleton_scope(ivl_scope_t scope, void *_unused)
extern "C" int draw_skeleton_scope(ivl_scope_t scope, void *)
{
static int depth = 0;
@ -997,7 +997,7 @@ extern "C" int draw_skeleton_scope(ivl_scope_t scope, void *_unused)
return rc;
}
extern "C" int draw_all_signals(ivl_scope_t scope, void *_parent)
extern "C" int draw_all_signals(ivl_scope_t scope, void *)
{
if (!is_default_scope_instance(scope))
return 0; // Not interested in this instance
@ -1053,7 +1053,7 @@ extern "C" int draw_functions(ivl_scope_t scope, void *_parent)
* This also has the side effect of generating all the necessary
* nexus code.
*/
extern "C" int draw_constant_drivers(ivl_scope_t scope, void *_parent)
extern "C" int draw_constant_drivers(ivl_scope_t scope, void *)
{
if (!is_default_scope_instance(scope))
return 0; // Not interested in this instance
@ -1128,7 +1128,7 @@ extern "C" int draw_constant_drivers(ivl_scope_t scope, void *_parent)
return 0;
}
extern "C" int draw_all_logic_and_lpm(ivl_scope_t scope, void *_parent)
extern "C" int draw_all_logic_and_lpm(ivl_scope_t scope, void *)
{
if (!is_default_scope_instance(scope))
return 0; // Not interested in this instance

14
tgt-vhdl/stmt.cc
View File

@ -1,7 +1,7 @@
/*
* VHDL code generation for statements.
*
* Copyright (C) 2008-2011 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -45,8 +45,8 @@ static void emit_wait_for_0(vhdl_procedural *proc, stmt_container *container,
* in C. This function can be enabled with the flag
* -puse-vhpi-finish=1.
*/
static int draw_stask_finish(vhdl_procedural *proc, stmt_container *container,
ivl_statement_t stmt)
static int draw_stask_finish(vhdl_procedural *, stmt_container *container,
ivl_statement_t)
{
const char *use_vhpi = ivl_design_flag(get_vhdl_design(), "use-vhpi-finish");
if (strcmp(use_vhpi, "1") == 0) {
@ -229,8 +229,8 @@ static int draw_block(vhdl_procedural *proc, stmt_container *container,
/*
* A no-op statement. This corresponds to a `null' statement in VHDL.
*/
static int draw_noop(vhdl_procedural *proc, stmt_container *container,
ivl_statement_t stmt)
static int draw_noop(vhdl_procedural *, stmt_container *container,
ivl_statement_t)
{
container->add_stmt(new vhdl_null_stmt());
return 0;
@ -613,7 +613,7 @@ static int draw_nbassign(vhdl_procedural *proc, stmt_container *container,
}
static int draw_assign(vhdl_procedural *proc, stmt_container *container,
ivl_statement_t stmt, bool is_last)
ivl_statement_t stmt)
{
vhdl_decl::assign_type_t assign_type = vhdl_decl::ASSIGN_NONBLOCK;
bool emulate_blocking = proc->get_scope()->allow_signal_assignment();
@ -1649,7 +1649,7 @@ int draw_stmt(vhdl_procedural *proc, stmt_container *container,
case IVL_ST_NOOP:
return draw_noop(proc, container, stmt);
case IVL_ST_ASSIGN:
return draw_assign(proc, container, stmt, is_last);
return draw_assign(proc, container, stmt);
case IVL_ST_ASSIGN_NB:
return draw_nbassign(proc, container, stmt);
case IVL_ST_DELAY:

20
tgt-vhdl/vhdl_syntax.cc
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@ -1,7 +1,7 @@
/*
* VHDL abstract syntax elements.
*
* Copyright (C) 2008-2011 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -379,7 +379,7 @@ vhdl_wait_stmt::~vhdl_wait_stmt()
}
void vhdl_wait_stmt::find_vars(vhdl_var_set_t& read,
vhdl_var_set_t& write)
vhdl_var_set_t&)
{
if (expr_)
expr_->find_vars(read);
@ -567,7 +567,7 @@ void vhdl_pcall_stmt::emit(std::ostream &of, int level) const
}
void vhdl_pcall_stmt::find_vars(vhdl_var_set_t& read,
vhdl_var_set_t& write)
vhdl_var_set_t&)
{
exprs_.find_vars(read);
}
@ -617,7 +617,7 @@ void vhdl_var_ref::emit(std::ostream &of, int level) const
}
}
void vhdl_const_string::emit(std::ostream &of, int level) const
void vhdl_const_string::emit(std::ostream &of, int) const
{
of << "\"" << value_ << "\"";
}
@ -697,7 +697,7 @@ bool vhdl_const_bits::has_meta_bits() const
return find_if(value_.begin(), value_.end(), is_meta_bit) != value_.end();
}
void vhdl_const_bits::emit(std::ostream &of, int level) const
void vhdl_const_bits::emit(std::ostream &of, int) const
{
if (qualified_)
of << (signed_ ? "signed" : "unsigned") << "'(";
@ -720,23 +720,23 @@ void vhdl_const_bits::emit(std::ostream &of, int level) const
of << (qualified_ ? "\")" : "\"");
}
void vhdl_const_bit::emit(std::ostream &of, int level) const
void vhdl_const_bit::emit(std::ostream &of, int) const
{
of << "'" << vl_to_vhdl_bit(bit_) << "'";
}
void vhdl_const_int::emit(std::ostream &of, int level) const
void vhdl_const_int::emit(std::ostream &of, int) const
{
of << dec << value_;
// We need to find a way to display a comment, since $time, etc. add one.
}
void vhdl_const_bool::emit(std::ostream &of, int level) const
void vhdl_const_bool::emit(std::ostream &of, int) const
{
of << (value_ ? "True" : "False");
}
void vhdl_const_time::emit(std::ostream &of, int level) const
void vhdl_const_time::emit(std::ostream &of, int) const
{
of << dec << value_;
switch (units_) {
@ -804,7 +804,7 @@ void vhdl_report_stmt::emit(ostream& of, int level) const
of << ";";
}
void vhdl_report_stmt::find_vars(vhdl_var_set_t& read, vhdl_var_set_t& write)
void vhdl_report_stmt::find_vars(vhdl_var_set_t& read, vhdl_var_set_t&)
{
text_->find_vars(read);
}

6
tgt-vhdl/vhdl_syntax.hh
View File

@ -1,7 +1,7 @@
/*
* VHDL abstract syntax elements.
*
* Copyright (C) 2008-2010 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -53,7 +53,7 @@ public:
virtual vhdl_expr *to_std_ulogic();
virtual vhdl_expr *to_vector(vhdl_type_name_t name, int w);
virtual vhdl_expr *to_string();
virtual void find_vars(vhdl_var_set_t& read) {}
virtual void find_vars(vhdl_var_set_t&) {}
protected:
static void open_parens(ostream& of);
@ -451,7 +451,7 @@ private:
class vhdl_null_stmt : public vhdl_seq_stmt {
public:
void emit(std::ostream &of, int level) const;
void find_vars(vhdl_var_set_t& read, vhdl_var_set_t& write) {}
void find_vars(vhdl_var_set_t&, vhdl_var_set_t&) {}
};

4
tgt-vhdl/vhdl_type.cc
View File

@ -1,7 +1,7 @@
/*
* VHDL variable and signal types.
*
* Copyright (C) 2008-2010 Nick Gasson (nick@nickg.me.uk)
* Copyright (C) 2008-2013 Nick Gasson (nick@nickg.me.uk)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -148,7 +148,7 @@ std::string vhdl_type::get_type_decl_string() const
}
}
void vhdl_type::emit(std::ostream &of, int level) const
void vhdl_type::emit(std::ostream &of, int) const
{
of << get_decl_string();
}