Stephen Williams
7e202bb5ca
Fix emit of struct ports/declarations.
2012-05-22 17:31:26 -07:00
Stephen Williams
71d2401221
Handle VHDL records.
...
Elaborate records and emit them as packed SV records. Also handle
record members so handle name prefixes.
While we are at it, handle some cases of array aggregate expressions.
2012-05-22 17:31:26 -07:00
Stephen Williams
ae06863db1
Elaborate prefix names which may be structure variables.
2012-05-22 17:31:26 -07:00
Stephen Williams
a5458828cd
Some vhdl parser error handling.
2012-05-22 17:31:26 -07:00
Stephen Williams
021d944a30
Probe type of ExpName with a record prefix.
2012-05-22 17:31:25 -07:00
Stephen Williams
7eb89c5548
Parse name prefix syntax for record member reference.
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When signals/variables are records, they are often referenced by
their members, using a prefix.name syntax. Parse that syntax and
generate "sorry" messages in elaboration.
2012-05-22 17:31:25 -07:00
Stephen Williams
5e7f61ea42
VHDL process sensitivities go to the end of each iteration
2012-05-22 17:31:25 -07:00
Stephen Williams
9b816f6478
Add support for nested when/else expressions.
2012-05-22 17:31:25 -07:00
Stephen Williams
1249b5dd32
Initial support for if_generate syntax.
2012-05-22 17:31:25 -07:00
Stephen Williams
0775e36a67
Properly elaborate argument types for binary relation expressions.
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The argument types of binary relation expressions are decoupled
from the return type for the expression itself.
2012-05-22 17:31:25 -07:00
Stephen Williams
ed3da959f3
Support types in packages.
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Types declared in packages should be written into the package library.
2012-05-22 17:31:25 -07:00
Stephen Williams
79435924f2
Move some VType::show methods to ::write_to_stream methods.
2012-05-22 17:31:25 -07:00
Stephen Williams
9ed56a6354
Parse record types, and some new aggregate types.
2012-05-22 17:31:25 -07:00
Larry Doolittle
84f14dbc81
Spelling fixes to vhdlpp tree
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Mostly comments as usual, but one error message is changed.
2012-05-17 16:42:03 -07:00
Cary R
9c99bce054
Update lex/yacc builds to be consistent and to support parallel builds
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Not all the lex/yacc (flex/bison) targets were using a consistent syntax.
This patch fixes that and explicitly serializes the *.c/*.cc and *.h build.
Not doing this was causing problem when using make -j. The issue appears to
be that if two targets are specified for a rule (e.g. file.cc file.h: file.y)
make does not realize they are both built by the same call so the rule is
executed twice. Once for the .cc target and once for the .h target. This is
not a problem for a serial build. To work around this only use the .c/.cc
file in the main target and then make the .h file depend on the .c/.cc file
as a sub-target.
2012-01-04 18:21:40 -08:00
Cary R
aedbda5a75
Identifiers need to be deleted with delete[]
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This patch fixes a mismatch in the delete style.
2011-12-18 16:45:08 -08:00
Cary R
ed13de131d
Use mkdir() instead of _mkdir() for MinGW
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MinGW-w64 requires the use of mkdir() and MinGW-w32 appears to support
both so use mkdir() to allow compilation to work with both versions.
2011-12-18 11:43:35 -08:00
Cary R
8df745a281
Remove SV include file and vhdlpp with make uninstall
2011-12-14 18:39:27 -08:00
Cary R
cc5efa45ba
Fix two bugs and use the more efficient !empty() vs size() > 0
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These two bugs were found with a recent cppcheck addition. It also
changes one occurrence of size() > 0 for the more efficient ! empty().
2011-11-22 19:44:55 -08:00
Cary R
bcb963a235
Fix Cygwin compile problem (replace abs() call with ?:
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This patch fixes a compile problem in Cygwin where there are two
definitions for abs() that do not match so the C++ code doesn't know
which one to call. To avoid the whole mess replace the call to abs()
with the appropriate ?: construct.
2011-11-17 14:30:33 -08:00
Stephen Williams
5e4c0c9783
Merge branch 'master' into work9
2011-11-06 10:27:40 -08:00
Stephen Williams
8e0beff3ab
Handle arrays of vectors in VHDL types.
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This incidentally adds binding of generic to generic instantation.
2011-11-06 09:01:02 -08:00
Stephen Williams
c1be255844
Fix dump display of array ranges.
2011-11-05 17:22:30 -07:00
Stephen Williams
cc508d1626
Support write_to_stream for arithmetic expressions.
2011-11-05 15:55:41 -07:00
Stephen Williams
2063c5ee9d
Support VHDL user defined array types.
2011-11-05 15:55:17 -07:00
Martin Whitaker
58d182bdf3
Compiler fixes for MinGW.
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In MinGW, when parameters are passed to vhdlpp by ivlpp, single quotes
are treated as ordinary characters. Use double quotes instead, as is
done in the driver.
Also, MinGW does not have a standard mkdir() function, so we need to
convert calls to mkdir() into calls to _mkdir().
2011-11-03 19:11:28 -07:00
Stephen Williams
98d928f6e0
Add support for VHDL for-generate
2011-10-30 17:10:19 -07:00
Stephen Williams
5724f71339
Elaborate expressions for entity generics.
2011-10-29 17:07:03 -07:00
Stephen Williams
15da45f7cb
VHDL initialization expressions for signals.
2011-10-29 17:06:40 -07:00
Stephen Williams
37ef14b1c8
Implement VHDL conf_std_logic_vector() as SystemVerilog size cast.
2011-10-29 14:47:39 -07:00
Stephen Williams
4f98a6d181
Rewire VHDL addition expression parsing.
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The VHDL LRM addition expression rules are ... different.
2011-10-23 17:31:58 -07:00
Stephen Williams
2be682f8a5
Support VHDL component instantiations with generics as Verilog parameters.
2011-10-23 17:08:48 -07:00
Stephen Williams
eeeadea3ac
Fix recently broken write of vhdl packages to work space.
2011-10-16 12:18:34 -07:00
Stephen Williams
a109df04bb
Proper expression type for vhdl relation expressions.
2011-10-16 11:02:07 -07:00
Stephen Williams
93e5a72d84
Get parameter output syntax right for vhdlpp.
2011-10-16 11:01:32 -07:00
Stephen Williams
d9acfe57b1
Put off array bound evaluation / describe entity generics as parameters
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Entity generics are easily implemented as module parameters, so make
it so. Give the parameters their default values from the generic declaration.
Array bounds may use values that cannot be evaluated right away, so
put off their evaluation.
2011-10-15 17:41:48 -07:00
Stephen Williams
a6f63b8a54
Parse generic clause in entity headers
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The generic clause can create named generics in entities. This patch
gets the parser support for them working, even though they cannot
yet evaluate.
2011-10-15 09:49:24 -07:00
Cary R
209a78a439
Remove a more cppcheck warnings in vhdlpp.
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This patch removes a few more cppcheck warnings in the vhdlpp directory.
2011-10-14 18:40:39 -07:00
Cary R
8f17e79b7e
Remove a few cppcheck warnings.
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This patch removes a few cppcheck warnings.
2011-10-14 18:40:24 -07:00
Stephen Williams
6268db6e68
Handle simple type declarations.
2011-10-09 15:25:35 -07:00
Stephen Williams
30cfcbe2dc
Rework elaborate/emit of types.
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This rework is needed to reasonably handle new types, like enums.
2011-10-02 10:56:00 -07:00
Stephen Williams
271aaf6376
Parse enumeration type declarations.
2011-10-01 17:04:04 -07:00
Stephen Williams
8003382b3e
Elaborate and emit case statements.
2011-10-01 11:45:28 -07:00
Martin Whitaker
c59d27e19f
Remove more clang warnings.
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clang warns that the yyinput function generated by flex is never used.
2011-09-25 10:14:16 -07:00
Cary R
eab5bacf9f
Remove clang/clang++ warnings.
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This patch makes the code consistently use struct/class in the C++ files,
it removes a couple shadow warnings and where a class pointer is passed to
the C routines, it defines the pointer as a class for C++ and as struct for
C and it removes a namespace std duplication.
2011-09-25 10:14:04 -07:00
Stephen Williams
52019b0e55
Merge branch 'master' into work8
2011-09-18 19:48:50 -07:00
Stephen Williams
88cce86c63
Emit code for the to_unsigned() bulit-in function.
2011-09-18 19:31:28 -07:00
Stephen Williams
873a447b5c
Evaluate VHDL <name>'length attribute at compile time.
2011-09-18 17:45:06 -07:00
Stephen Williams
677a22d353
Generate code for vhdl for loops.
2011-09-18 15:51:31 -07:00
Stephen Williams
f0e61a1db7
Basic vhdl elaboration for unary not operator.
2011-09-18 15:13:30 -07:00