Commit Graph

18 Commits

Author SHA1 Message Date
Cary R 0a6d75f1db Fix some cppcheck warnings (format string vs argument mismatches) 2014-08-01 18:55:44 -07:00
Cary R 0ffd61a835 Remove some cppcheck warnings 2014-06-28 16:56:09 -07:00
Arun Persaud f5aafc32f9 updated FSF-address 2012-08-29 10:12:10 -07:00
Cary R 83fff3adf7 Remove more CVS stuff
Remove the CVS information in the documentation and the remaining
tgt-* directories.
2012-08-16 15:15:26 -07:00
steve 534a656be8 devices need show_cmp_gt 2003-11-12 03:20:14 +00:00
steve 79248d0592 Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
steve ae27165ffe Add Virtex code generators for left shift,
subtraction, and GE comparators.
2002-10-28 02:05:56 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve aca1dcf848 Add missing Log and Ident strings. 2002-08-11 23:47:04 +00:00
steve cefbb635c1 Suppor the PAD attribute on signals. 2001-09-16 01:48:16 +00:00
steve 5e1e79b3c4 Rearrange the XNF code generator to be generic-xnf
so that non-XNF code generation is also possible.

 Start into the virtex EDIF output driver.
2001-09-02 21:33:07 +00:00
steve 2996d2eb19 Generic ADD code. 2001-09-01 04:30:44 +00:00
steve 16023cbbd6 Generate code for MUX devices. 2001-09-01 02:28:42 +00:00
steve 77927972e5 identity compare, and PWR records for constants. 2001-09-01 02:01:30 +00:00
steve 8b8a3d83e0 Relax pin count restriction on logic gates. 2001-08-31 23:02:13 +00:00
steve c1c88f87c6 Many more logic gate types. 2001-08-31 04:17:56 +00:00
steve a9b5c9c037 Add root port SIG records. 2001-08-31 02:59:06 +00:00
steve f063bf833f Add the fpga target. 2001-08-28 04:14:20 +00:00