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Author SHA1 Message Date
Jesse Cirimelli-Low 744cb98c2a Merge pull request #305 from ThVerg/fix-nix-develop-flake-path 
Fix nix develop invocation for verification scripts
 2026-08-12 18:32:25 -07:00
ThVerg 5696584608 Fix nix develop invocation for verification scripts 
run_script() launches the DRC/LVS scripts with

    nix develop --command <script>

from a working directory of OPTS.openram_temp. nix develop resolves its
flake from the working directory, and the temp directory has no
flake.nix, so the command fails before the script ever runs:

    path '/tmp/openram_<user>_<pid>_temp' does not contain a 'flake.nix', searching up
    error: could not find a flake.nix file

Nothing is written to the report file, so verification then dies on the
missing output rather than on the nix error itself, which makes this
confusing to diagnose:

    ERROR: file magic.py: Unable to load LVS results from
    /tmp/openram_<user>_<pid>_temp/<name>.lvs.report
    FileNotFoundError: [Errno 2] No such file or directory

Name the flake explicitly so it is resolved from the repository while
the script still runs in the temp directory, which the scripts depend on
for their relative copies.

Verified on a sky130 build with use_nix = True: before the change no
report is produced and the run asserts, after it both DRC and LVS run
through the devShell and write their reports.
 2026-08-11 15:03:55 +02:00
Jesse Cirimelli-Low ed369f1af4 change spare cols routing from channel to normal routing to avoid short circuits 2026-06-24 14:04:21 -07:00
Jesse Cirimelli-Low 734be5403e fix naming for spare cols 2026-06-24 11:27:28 -07:00
Jesse Cirimelli-Low e16d9eb0b4 make sky130-install now correctly merges with privded cells 2026-05-11 10:44:24 -07:00
Jesse Cirimelli-Low 2f8f9bc2e3 use python venv so we can still run make library 2026-05-11 10:44:24 -07:00
Jesse Cirimelli-Low 91d0eb1d2c use python venv with nix 2026-05-11 10:44:24 -07:00
Jesse Cirimelli-Low 45e58838d6 fix ciel repo 2026-05-11 10:44:24 -07:00
Jesse Cirimelli-Low c1e93ce686 add ciel to nix flake for pdk managementment 2026-05-11 10:44:24 -07:00
Jesse Cirimelli-Low cbd2bd7c2e switch from conda to nix for tooling 2026-05-11 10:44:24 -07:00
Matt Guthaus f2db9fe2de Merge pull request #291 from goobber-gawber/modernize2 
compiler: gdsMill: Modernize codebase.
 2026-04-17 07:25:26 -07:00
Gabriel Wicki 5cd43442b8 compiler: gdsMill: Modernize codebase. 
* compiler/gdsMill/pyx/graph/axis/tick.py: Modernize.
 2026-04-17 13:14:03 +02:00
Matthew Guthaus 9274fbd4f2 Merge branch 'stable' into dev 2026-04-08 11:26:03 -07:00
Matthew Guthaus 449781d239 Revert "Revert "Update defunct code"" 
This reverts commit d142b906ee.
 2026-04-08 11:25:48 -07:00
Matt Guthaus 148a5807e2 Merge pull request #290 from VLSIDA/revert-289-update-defunct-code 
Revert "Update defunct code"
 2026-04-08 11:19:40 -07:00
Matt Guthaus d142b906ee Revert "Update defunct code" 2026-04-08 11:19:03 -07:00
Matt Guthaus 29e8521ea3 Merge pull request #289 from goobber-gawber/update-defunct-code 
Update defunct code
 2026-04-08 11:10:28 -07:00
Gabriel Wicki e01e6a567d compiler: gdsMill: Modernize codebase. 
The few Python 2 statements are replaced with their modern
counterparts.  These are one of the following:
 - print() function calls (instead of statements),
 - Exception and Error raising,
 - passing/receiving tuples as function/lambda arguments,
 - the L suffix for numeral constants.

* compiler/gdsMill/pyx/box.py,
  compiler/gdsMill/pyx/connector.py,
  compiler/gdsMill/pyx/deformer.py,
  compiler/gdsMill/pyx/dvifile.py,
  compiler/gdsMill/pyx/epsfile.py,
  compiler/gdsMill/pyx/font/afm.py,
  compiler/gdsMill/pyx/font/t1font.py,
  compiler/gdsMill/pyx/graph/axis/texter.py,
  compiler/gdsMill/pyx/graph/axis/tick.py,
  compiler/gdsMill/sram_examples/cell6tDemo.py,
  compiler/gdsMill/sram_examples/newcell.py: Modernize syntax.
 2026-03-31 22:44:21 +02:00
Gabriel Wicki 26e11044db compiler: multibank: Fix syntax error. 
* compiler/modules/multibank.py (multibank) [compute_sizes]: Fix
syntax error.
 2026-03-31 22:28:10 +02:00
Jesse Cirimelli-Low ab33017fe2 Merge pull request #282 from ruhai-lin/stable 
Attempt to fix LVS mismatch and SRAM creation with banks for sky130
 2026-03-12 10:47:23 -07:00
rlin50 6d14626a75 Fix address bit ordering in sky130 1rw characterization 2026-02-23 15:32:08 -08:00
rlin50 ec28bc6dfd Fix sky130 1rw LVS mismatch by correcting col_cap pin order 2026-02-22 22:11:35 -08:00
Matt Guthaus c99b134deb Merge pull request #280 from Aurora7913/issue279 
Fix compatibility with numpy>=2.4.0
 2026-01-16 06:24:55 -08:00
Maarten Boersma e32f3164e4 fix typo 2026-01-16 15:05:30 +01:00
Maarten Boersma 7382ea7dda fix #279: expliticly extract single number from numpy array to meet stricter numpy>=2.4.0 code hygiene 2026-01-16 15:05:28 +01:00
Matt Guthaus ce5595adf1 Merge pull request #275 from vikashpatel24/dev 
Fix for Missing lef_rom_interconnect in tech.py
 2025-10-17 09:46:49 -07:00
Vikash Patel b9bb6898af Fix for Missing lef_rom_interconnect in tech.py 2025-10-17 14:40:03 +05:30
Matt Guthaus ea15a81443 Merge pull request #270 from hpretl/stable 
Switching from `volare` to `ciel` and bumping the version number
 2025-06-26 13:15:50 -07:00
Harald Pretl 9492349d7a Bump version 2025-06-26 21:21:13 +02:00
Harald Pretl 01686a2005 Switch from volare to ciel 2025-06-26 21:21:06 +02:00
Matthew Guthaus e63f70da5e Update README by removing slack and email group. Update website. 2025-04-01 10:44:49 -07:00
Jesse Cirimelli-Low 8104a42f0e Update artifact action 2024-11-13 22:45:31 -08:00
mrg bc1cc36ade Merge branch 'whitespace_fix' of github.com:TristanRobitaille/OpenRAM into dev 2024-11-12 09:49:00 -08:00
mrg 3184e1d0e4 Merge branch 'add-doc' of github.com:FriedrichWu/OpenRAM into dev 2024-11-12 09:47:57 -08:00
FriedrichWu 7ec407314a add documentation 2024-11-11 16:18:45 +01:00
Tristan Robitaille 1f5fe62456 Added whitespace between : and 'minimum_period', '1kOhm' and 'min_pulse_width' as required by Liberty file standard 2024-11-10 14:31:52 +01:00
mrg 3f1f58065d Add nand4 leakage to sky130 tech 2024-07-01 10:14:43 -07:00
mole99 0937f86761 Disable check_lvsdrc for gf180mcu 2024-02-03 12:15:11 +01:00
mole99 85e242fa27 Add gf180mcu ROM example 2024-02-03 11:31:58 +01:00
vlsida-bot b6a6f12642 Bump version: 1.2.47 -> 1.2.48 v1.2.48 2024-01-21 17:32:32 +00:00
Eren Dogan 306da8a895 Merge branch 'sky130_regress' into dev 2024-01-20 21:05:22 -08:00
Eren Dogan 0cf60a6a18 Give u+x permissions for rom tests 2024-01-20 17:49:52 -08:00
Eren Dogan 55e5c425e9 Fix same file error and enable passing tests 2024-01-20 08:38:18 -08:00
Eren Dogan 14c219d9f1 Enable working tests from disabled stamps 2024-01-19 15:16:30 -08:00
Eren Dogan 855139bc4e Add Makefile target to run broken tests only 2024-01-19 15:15:52 -08:00
vlsida-bot 0423f10926 Bump version: 1.2.46 -> 1.2.47 v1.2.47 2024-01-19 15:39:54 +00:00
Eren Dogan 156eb4f0f7 Force install requirements in miniconda 2024-01-18 20:17:14 -08:00
Eren Dogan 18b19b8d9d Install dependencies before running regression 2024-01-18 14:59:33 -08:00
Eren Dogan 5081cf2383 Fix make target in regression 2024-01-18 14:45:44 -08:00
mole99 84020f13c6 Clarify OpenRAM installation 2024-01-18 23:24:22 +01:00