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72 Commits

Author SHA1 Message Date
Akash Levy f2aa7cc65b Reduce verbosity of opt_balance_tree 2025-09-10 06:07:15 -07:00
Akash Levy 6fc38e15a1
Update passes/silimate/opt_balance_tree.cc 
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
 2025-09-09 04:47:28 -07:00
Akash Levy b7a4ce8b42 Fix opt balance tree and wreduce 2025-09-09 04:32:15 -07:00
Akash Levy 414c9e8898 Fix annotate_cell_fanout issue by double uniquifying... hopefully should fix the issue? 2025-06-25 22:09:43 -07:00
Akash Levy 828cfc0039 Fix issue with buffer naming uniquification 2025-06-23 02:25:34 -07:00
Akash Levy 3f94486a1c
Merge pull request #82 from donn/splitlarge 
splitlarge: new pass to split wide arithmetic operators
 2025-05-15 15:00:45 -07:00
Mohamed Gaber 1d9fbb6143 misc: review feedback, remove MUL vestiges 2025-05-15 18:01:13 +03:00
Mohamed Gaber 46ba89059a splitlarge: new pass to split wide arithmetic operators 
Adds a new pass, `splitlarge`, that recursively divides $add/$sub
cells into smaller cells until each cell's width doesn't exceed a
given max_width (128 by default.) An $add/$sub cell's width for
this purpose is defined as the higher of the widths of its two
inputs.

A test was written in Tcl for it, which tests this matrix:
- cell: $add/$sub
- b: unsigned, signed
- a: unsigned, signed

This is the first test for a Silimate pass in Tcl and thus
`run-test.sh` was modified to include it.
 2025-05-15 17:45:08 +03:00
Akash Levy f97587db61 Fix fanout buffer src annotation and refactor naming 2025-05-13 20:05:16 -07:00
williamzhu17 39be4f29bd opt_balance_tree test cases 2025-05-11 10:58:29 -07:00
Akash Levy 239b0a6db0 Fix opt_balance_tree issue 2025-05-08 19:35:19 -07:00
Akash Levy e4a8cc60d3 Remove recover_names from longloop_select 2025-05-08 07:20:28 -07:00
Akash Levy 36bd30d9eb Add recover_names into build and longloop_select 2025-05-06 18:58:07 -07:00
Akash Levy 507308d34e Add muxpacker draft 2025-04-03 21:38:16 -07:00
Akash Levy d4119e1ad3 lut2bmux fix 2025-04-03 21:37:27 -07:00
Akash Levy f488b0e74c Add lut2bmux, annotate_unqcoef, and seed tests 2025-03-31 05:55:54 -07:00
Akash Levy f72d27fae0 Robustness fixes 2025-03-30 22:23:21 -07:00
Akash Levy 161ff0fa3f Add muxmode pass and tests 2025-03-30 17:54:18 -07:00
Akash Levy dacd882383 Remove selectconst 2025-03-28 17:40:40 -07:00
Alain Dargelas e29c1839c4 Fix corner case with assign stmts for fanout buffering 2025-03-17 14:25:05 -07:00
Akash Levy d9af46538c opt_expand peepopt (still needs testing) 2025-03-17 04:12:06 -07:00
Akash Levy dc75774c5b Breakreduce pass (still needs testing) 2025-03-17 04:10:08 -07:00
Akash Levy 11dd7becdd Add opt_balance_tree -arith_only 2025-03-17 02:30:18 -07:00
Akash Levy e6da1a2d69 Fix unused warning in annotate_cell_fanout 2025-03-12 20:54:03 -07:00
Akash Levy 6cfa779bfa Reduce verbosity of splitfanout 2025-03-09 22:07:30 -07:00
Akash Levy 3098dcc86c
Merge pull request #56 from alaindargelas/limit_fanout 
Fanout limit with buffer tree
 2025-03-07 14:19:45 -08:00
Alain Dargelas 52b1cbf456 Separate into 2 passes 2025-03-07 14:11:25 -08:00
Alain Dargelas c54c3f66b7 Single call to splitnets 2025-03-06 16:46:22 -08:00
Alain Dargelas 81ab3b5fed call splitnets for the whole design 2025-03-06 16:21:11 -08:00
Alain Dargelas d4e4ece9fe bit split initial splitfanout call 2025-03-06 10:47:27 -08:00
Alain Dargelas 4b598e317b getfanout factor 2025-03-05 13:10:53 -08:00
Alain Dargelas f65d822935 cleanup dangling buffers 2025-03-05 11:49:12 -08:00
Alain Dargelas 7d46ab08d5 clocks, resets filters 2025-03-05 10:28:49 -08:00
Alain Dargelas bc05f4fead Use buf instead of pos 2025-03-05 09:40:26 -08:00
Akash Levy 1b1855353d Reduce verbosity of some key things 2025-03-04 22:58:56 -08:00
Alain Dargelas 9f36d9dea9 comments 2025-03-04 15:52:10 -08:00
Alain Dargelas 4035a24e4c bulk splitnets 2025-03-04 15:06:58 -08:00
Alain Dargelas 7df2a8eb8e splinets fencing 2025-03-04 14:32:44 -08:00
Alain Dargelas 1027a96860 inputs option 2025-03-04 11:43:12 -08:00
Alain Dargelas 864850ab51 speedup 2025-03-04 11:09:09 -08:00
Alain Dargelas 3e25ff70ee input fanout 2025-03-04 10:52:46 -08:00
Alain Dargelas 104d39057e unique names 2025-03-04 10:31:20 -08:00
Alain Dargelas fd2ac3ad8d simplify 2025-03-04 09:22:55 -08:00
Alain Dargelas a8fa936080 simplify 2025-03-04 09:20:31 -08:00
Alain Dargelas 425e1a03ae reuse net on same cell 2025-03-03 21:45:53 -08:00
Alain Dargelas 6cff6d9c49 input fanout 2025-03-03 16:51:10 -08:00
Alain Dargelas d5d58349fd split input nets with high fanout 2025-03-03 15:06:02 -08:00
Alain Dargelas a1ad385702 help 2025-03-03 11:31:27 -08:00
Alain Dargelas be95a08c08 cleanup 2025-03-03 11:23:45 -08:00
Alain Dargelas c7623e4850 cleanup 2025-03-03 10:39:47 -08:00