Akash Levy
414c9e8898
Fix annotate_cell_fanout issue by double uniquifying... hopefully should fix the issue?
2025-06-25 22:09:43 -07:00
Akash Levy
981a89aa1e
Add hierarchy separator option to submod pass
2025-06-23 03:38:00 -07:00
Akash Levy
7e9e4c7afe
Merge branch 'YosysHQ:main' into main
2025-06-23 02:30:24 -07:00
Akash Levy
828cfc0039
Fix issue with buffer naming uniquification
2025-06-23 02:25:34 -07:00
Gary Wong
34a2abeddb
verilog: fix parser "if" memory errors.
...
Fix buggy memory allocation introduced in #5152 :
1) clean up ast_stack to reflect AST node rearrangement when necessary,
to avoid dangling pointer;
2) call free_attr() on unused attribute list when no new syntax node is
created, to avoid leaking it.
2025-06-22 23:57:42 -04:00
George Rennie
170933ecb0
Merge pull request #5165 from georgerennie/george/opt_dff_uaf
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opt_dff: don't remove cells until all have been visited to prevent UAF
2025-06-20 23:33:26 +01:00
github-actions[bot]
44aa313ba9
Bump version
2025-06-20 00:24:40 +00:00
garytwong
834a7294b7
verilog: fix string literal regular expression ( #5187 )
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* verilog: fix string literal regular expression.
A backslash was improperly quoted, causing string literal matching
to fail when the final token before a closing quote was an escaped
backslash.
* verilog: add regression test for string literal regex bug.
Test for bug triggered by escaped backslash immediately before
closing quote (introduced in ca7d94af and fixed by 40aa7eaf ).
2025-06-19 12:41:18 -04:00
Akash Levy
571a520d5d
Merge branch 'YosysHQ:main' into main
2025-06-17 15:51:55 -07:00
github-actions[bot]
cd71f190cd
Bump version
2025-06-14 00:24:06 +00:00
KrystalDelusion
efa30dfdf8
Merge pull request #5176 from YosysHQ/krys/no_cxxopt_split
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driver.cc: Don't split options on commas
2025-06-14 10:39:28 +12:00
Akash Levy
283faf3bf9
Merge from upstream
2025-06-13 10:19:49 -07:00
Akash Levy
aac91fef70
More robust versioning
2025-06-12 22:28:37 -07:00
KrystalDelusion
4ade617c41
driver.cc: Don't split options on commas
2025-06-13 10:31:53 +12:00
KrystalDelusion
67f8de54dc
Merge pull request #5160 from garytwong/fast-lex
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verilog: improve string literal matching speed (fixes #5076 )
2025-06-13 09:57:01 +12:00
KrystalDelusion
82888580ac
Merge pull request #5152 from garytwong/unique-if
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verilog: implement SystemVerilog unique/unique0/priority if semantics.
2025-06-13 09:56:53 +12:00
Emil J
c0f52c6ead
Merge pull request #5167 from YosysHQ/emil/fix-splitnets-single-bit-vector
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splitnets: handle single-bit vectors consistently
2025-06-11 22:47:48 +02:00
Akash Levy
958112bcb0
Merge branch 'YosysHQ:main' into main
2025-06-11 03:26:14 -07:00
Akash Levy
819fde9329
Add debugon pass
2025-06-10 16:41:17 -07:00
Miodrag Milanović
e0747b71b7
Merge pull request #5174 from YosysHQ/micko/windows_action
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Update CI, windows-2019 is deprecated
2025-06-10 08:06:38 +02:00
github-actions[bot]
c561ba84e3
Bump version
2025-06-10 00:24:41 +00:00
Akash Levy
64d99416c1
Do not downgrade any warnings
2025-06-09 15:11:00 -07:00
Akash Levy
447a73ea86
Merge branch 'YosysHQ:main' into main
2025-06-09 14:51:56 -07:00
Miodrag Milanovic
a5edbc8836
Update CI, windows-2019 is deprecated
2025-06-09 19:07:53 +02:00
Miodrag Milanovic
c16cc539d4
Next dev cycle
2025-06-09 08:12:26 +02:00
Miodrag Milanovic
db72ec3bde
Release version 0.54
2025-06-09 07:23:54 +02:00
N. Engelhardt
0b19f628e9
Merge pull request #5172 from YosysHQ/nak/reduce_warning_spam
2025-06-08 06:50:56 +00:00
N. Engelhardt
cb79e28046
Merge pull request #5159 from YosysHQ/krys/fixing_selections
2025-06-08 06:40:15 +00:00
github-actions[bot]
2a25d92413
Bump version
2025-06-07 00:24:11 +00:00
George Rennie
7160c91800
tests: add test for #5164 opt_dff -sat UAF
2025-06-06 23:46:23 +01:00
George Rennie
8c38e2081d
opt_dff: don't emit cells until all have been visited to prevent UAF
2025-06-06 23:46:07 +01:00
Akash Levy
5e6d68ca91
Merge branch 'YosysHQ:main' into main
2025-06-06 12:12:02 -07:00
N. Engelhardt
3fe31294d6
disable warning for intentional use of deprecated function (to assert the feature isn't used any more)
2025-06-06 16:41:25 +02:00
N. Engelhardt
f22248f056
downgrade verific warnings about common coding styles
2025-06-06 16:30:50 +02:00
Emil J
f123c6f452
Merge pull request #5170 from YosysHQ/emil/revert-log_debug
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Revert log_debug back to macro from function
2025-06-06 16:29:45 +02:00
N. Engelhardt
f1dea78603
don't warn for every blackbox from verific
2025-06-06 15:37:42 +02:00
Emil J. Tywoniak
a16227b209
Revert "Change the implementation of log_debug in kernel/log.h from a macro function to a normal function."
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This reverts commit 15cfce061a .
2025-06-06 15:14:40 +02:00
Akash Levy
5745c6d5d9
Merge branch 'YosysHQ:main' into main
2025-06-05 14:49:20 -07:00
Akash Levy
84643daf61
Merge pull request #83 from neildeo05/fix_tests
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Fix getPort issue for yosys tests
2025-06-05 14:49:09 -07:00
Neil Deo
093bf7ed7e
Fix getPort issue to pass yosys tests
2025-06-05 14:38:38 -07:00
Emil J. Tywoniak
239c265093
splitnets: handle single-bit vectors consistently
2025-06-05 10:58:06 +02:00
github-actions[bot]
50b63c6481
Bump version
2025-06-05 00:24:30 +00:00
George Rennie
19cdbc5a0c
opt_dff: don't remove cells until all have been visited to prevent UAF
2025-06-04 21:02:21 +01:00
Akash Levy
6530a3d150
Merge branch 'YosysHQ:main' into main
2025-06-04 11:10:27 -07:00
Emil J
378add3723
Merge pull request #5163 from YosysHQ/emil/fix-single-bit-vector-leak
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simplify: fix single_bit_vector memory leak
2025-06-04 17:00:54 +02:00
George Rennie
0fcf5c080d
Merge pull request #5158 from georgerennie/george/task_inout
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read_verilog/astsimplify: copy inout ports in and out of functions/tasks
2025-06-04 14:23:08 +01:00
George Rennie
ab40403d90
Merge pull request #5154 from georgerennie/george/post_incdec_undo_fix
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read_verilog: fix -1 constant used to correct post increment/decrement
2025-06-04 14:22:32 +01:00
Emil J. Tywoniak
c37b7b3bf4
simplify: fix single_bit_vector memory leak
2025-06-04 10:32:03 +02:00
Akash Levy
358ab194dd
Update Verific
2025-06-02 17:58:18 -07:00
Akash Levy
e3a6b920d4
Merge branch 'YosysHQ:main' into main
2025-06-02 18:47:14 +02:00