Commit Graph
17675 Commits
Author SHA1 Message Date
Emil J. Tywoniak c36bc102d4 rtlil backend: widen the warning about writing processes
A process holds locations on its cases and switches as well as on its
actions, and none of them survive a write.
2026-08-25 13:10:33 +02:00
Emil J. Tywoniak b82111b8df proc_dff: name the signal and the location a sync error is about
"Multiple edge sensitive events found for this signal!" left the reader to
guess which signal and which line. Report the signal and, where the failing
sync action carries one, the source location.

(cherry picked from commit 7f791a4fb, emil/twines-proc-srcloc-rebased)
2026-08-25 13:10:33 +02:00
Emil J. Tywoniak 108c134c32 proc_mux: separate a case's condition from its body
genrtlil records the case item as compare_src and the block as the case's
own src, so the actions inside a case point at the statements that wrote
them rather than at the selector. A $eq then stands for both sides of the
comparison it performs - the switch expression and the case value - the
$reduce_or over them for the case value, and the _CMP wire for the switch.
A mux passes its fused locations on to the wire it drives.

The gatemate fsm LUT counts go back to what they were before the source
work: the finer mapping restores the earlier covering.

Picks up the proc part of emil/twines-proc-srcloc-rebased:
  b2d57e5d4 rtlil: add case_src to CaseRule
  c74bc43cf proc_mux, genrtlil: make use of case_src
  9bc771e05 proc_mux: copy switch src to _CMP wire
  6182c7dd8 proc_mux: copy mux src to Y port
  3d2e26815 kernel: add SwitchRule signal_src
  cf3867bb1 proc_mux: include switch expression location in $eq src
2026-08-25 13:09:19 +02:00
Emil J. Tywoniak dcb9c0d7af rtlil: track where a case is selected and where a switch reads
A CaseRule's own src is where its body is; compare_src is where the case
is selected. A SwitchRule's own src is the whole statement; signal_src is
where its expression is. Both survive a clone and a cross-pool copy.

Also root the srcs a process holds outside its AttrObjects - one per
assignment, plus the two above - so garbage collection cannot free the
twines they point at.
2026-08-25 13:09:07 +02:00
Emil J. Tywoniak 16db584210 rtlil frontend: keep the handles a file names
A replayable .il names twines and source location sets by pool index, and
a design that has freed slots writes a set with gaps in it. Reading such a
file into a fresh design packed the survivors, so write, read, write did
not reproduce the file.

Let the pools intern at a caller-chosen index and use that while loading
into a design with no twines or srcs of its own, falling back to the old
remapping when the file's numbering does not fit this build.
2026-08-25 12:42:21 +02:00
Emil J. Tywoniak bb9f7f8abe proc: point cases and flops at the statements they came from
A CaseRule takes the location of its case item, so the $eq that decodes it
lands on the compare rather than on the block, and a mux keeps the fused
action locations it was given instead of inheriting the case's.

A flop fuses the process location with the locations of the wires it drives.
2026-08-25 12:42:12 +02:00
Emil J. Tywoniak 325018641a proc_dff: add wire src attributes to dff cells
(cherry picked from commit cabee65438796a05d938a8abe5aa8e6be9774b32)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 6a7ca7a7e7 proc_mux: add src test
(cherry picked from commit 4fe8986fc5e56c345a74dfeee7839a57661c74d5)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak d2b8491823 verific: use SyncActions
(cherry picked from commit 69691ef85db58a1ead3060361dc37d29b70b8095)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 7dd1596ec1 docs: word_mux grammar
(cherry picked from commit 06c017a8fc1377c7b4a3f1f4043da6aaf9a49d48)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak d39265b846 proc_mux: stamp muxes with the locations of the actions they implement
Track, per (snippet, case), the source location of the action that assigns
that snippet, and fuse the locations of every case feeding a mux tree onto
the resulting cell, falling back to the case's own location where an action
carries none. A mux now points at the assignments it came from instead of
at the enclosing switch.

Squashes the proc_mux commits of emil/proc_mux-better-src:
  a1be8fa88 proc_mux: emit fused action location src attributes on procmuxes
  d6b3e3a5a proc_mux: refactor
  0cac2c4b9 proc_mux: default to case src when action src is missing
  affd6faa3 proc_mux: optimize source map locality for index density
  59137d2a0 proc_mux: add comments
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 97ed58b914 rtlil: add source tracking to CaseRule actions
(cherry picked from commit 2301dad4ca7abe951faa9e0b8772c52d15f102a7)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 45cc333e76 gowin: lower LUT count sensitivity
(cherry picked from commit c1d8aa8ae9fbefbc018c4c29dcaeef79a35f1211)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 9a93e377a3 rtlil: replace SigSig actions with new type SyncAction
(cherry picked from commit bfc098772c0244273ee52a8989168a6a6c0c89f2)
2026-08-25 12:41:46 +02:00
Emil J. Tywoniak 490f9e5e31 tests: cover source location pooling
roundtrip-src.sh checks that an `srcs` section survives write/read and a
design push/pop unchanged, and that -readable resolves the handles.
no-pipe-leaf.sh checks that fusing locations never bakes a '|'-joined
string into a twine leaf.
2026-08-25 11:40:59 +02:00
Emil J. Tywoniak ba74d22f6b rtlil: intern source locations in a per-design SrcPool
Source locations move off the attribute dict into a dedicated SrcRef on
AttrObject, interned in a per-design SrcPool that hash-conses sets of
location twines. Locations share their file prefix with each other through
the twine pool, and objects that fuse (opt_merge, share, ff/mem rewrites)
carry the union of their inputs' locations instead of a '|'-joined string.

write_rtlil emits an `srcs` section of location sets alongside `twines`;
read_rtlil resolves `\src "@N"` back to a handle and still accepts a plain
location string. -readable renders the locations as text.
2026-08-25 11:40:52 +02:00
Emil J. Tywoniak 1168e35394 twine: split Twine into in-memory TwineNode that doesn't support autoidx variants and temporary TwineSpec that does 2026-08-24 15:53:14 +02:00
Emil J. Tywoniak b912eef670 backends: write_xaiger -map-strings for a readable map file for
debugging
2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 81a010b0b6 kernel: best-effort IdString provenance checking 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 7dfc30db11 pyosys: twines 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak e5d0e1515b examples: update for pooled names 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak f7d1a491d7 tests: cover twines, name publicity, hashing and sorting 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 5088e8f6ed tests: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 72a7d9eb1f techlibs: rebuild attribute name handling on the pool 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak b3c7a25be5 techlibs: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak f07163817d passes: rework passes that search, rekey or cross name pools 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak f7b6bd99d0 passes: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak db85857a16 backends: reduce twine structural loss for roundtrips 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 0363b660c9 backends: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 6d1a911de2 frontends: use twine suffix nodes for hierarchical names, cache name lookups 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak d8e0180ffb frontends: trivial twine damage 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak 2686d1ce47 kernel: twine damage for utilities that key or search on names 2026-08-13 18:15:58 +02:00
Emil J. Tywoniak bcdf5e0f43 kernel: trivial twine damage 2026-08-13 18:15:56 +02:00
Emil J. Tywoniak 4a7a670fb6 kernel: reimplement IdString as handle on a Twine in a per-design TwinePool 2026-08-13 18:15:40 +02:00
Miodrag Milanović 25b06f428e Merge pull request #6087 from YosysHQ/cat/windows-utf8
Accept UTF-8 filenames and terminal I/O on Windows.
2026-08-06 12:28:04 +00:00
Catherine 9020fc2ffe Accept UTF-8 filenames and terminal I/O on Windows. 2026-08-06 12:06:07 +00:00
nella f21b2d2ee8 Merge pull request #6092 from YosysHQ/nella/opt-balance-detect-cycles
opt_balance_tree: don't hang on combinational loops [sc-734]
2026-08-06 09:25:17 +00:00
nella e20909bb3b Collect chains via TopoSort. 2026-08-06 11:10:12 +02:00
nella c5d47334f4 Use toposort. 2026-08-06 10:51:49 +02:00
nella 7bbb69872c Add regression tests. 2026-08-06 09:14:44 +02:00
nella 3c536a06b7 Detect graph cycles and skip them. 2026-08-06 09:14:37 +02:00
Emil J 72ce1b63d7 Merge pull request #6090 from YosysHQ/emil/hierarchy-fix-keep-cache-again
hierarchy: fix keep cache usage by caching false too 2
2026-08-05 21:54:55 +00:00
Emil J. Tywoniak 253388a87f hierarchy: fix cache usage by caching false too 2 2026-08-05 23:32:37 +02:00
Catherine c2071b80ed Merge pull request #6088 from YosysHQ/revert-slop
Revert slop being committed in `main`
2026-08-05 20:36:45 +00:00
Catherine f26ef15b2a Revert "hierarchy: regression test for keep cache"
This reverts commit a27378cff8.
2026-08-05 16:52:59 +00:00
Catherine b89dc992e5 Revert "hierarchy: fix cache usage by caching false too"
This reverts commit ae14b5e6a8.
2026-08-05 16:52:14 +00:00
nella 1410a14345 Merge pull request #6030 from YosysHQ/nella/eqbits-perf-enhancements
opt_dff: add SAT effort limits
2026-08-05 11:15:00 +00:00
nella f2cf07584d Improve test coverage. 2026-08-05 12:57:56 +02:00
nella fae99416d4 Only init modwalker once. 2026-08-05 12:57:56 +02:00
nella eff7e1f360 Budget SAT effort via shared SatEffortBudget. 2026-08-05 12:57:56 +02:00