Stefan Frederik
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662c14143d
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update xschemtest, more robust spice flatten.awk netlist flattener, specifically when translating expressions containing electrical nodes and parameters, all these need to be translated/substituted.
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2022-10-12 01:16:23 +02:00 |
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Stefan Frederik
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ce75ca2bbf
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make examples/test_doublepin.sch compile with no errors with ngspice, ghdl and iverilog, this is a test schematic to validate pass-through symbols
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2022-10-11 14:25:58 +02:00 |
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Stefan Frederik
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3f627123b2
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persists highlights on instances: remove highlighted instance from hash if user selects and presses ctrl-k as it is done for nets. Avoid instance highlight to also highlight net with identical name (example instance x1 and net x1). Verilog and Vhdl netlists handle duplicated (pass-through) pins
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2022-10-11 13:12:17 +02:00 |
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Stefan Frederik
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137ca971d3
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add cmdline option --preinit <commands> to execute given commands before executing xschemrc file. This can be used to switch library search paths depending on a variable setting.
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2022-10-11 00:26:06 +02:00 |
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Stefan Frederik
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b93c9af97c
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flatten.awk: allow to specify additional custom devices node number with metacomments inserted in the netlist, like *.nodes[W] = 2, or *. nodes["W"]=2
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2022-10-10 17:45:56 +02:00 |
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Stefan Frederik
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9f3692a94a
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align xschemtest netlist expected hashes
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2022-10-10 16:23:20 +02:00 |
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Stefan Frederik
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a0be0c31c1
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fix LCC_instances.sch test schematic
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2022-10-10 16:21:58 +02:00 |
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Stefan Frederik
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118e937e7f
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flatten.awk: derive element pattern list ^[EGHFCMDQRGIV] from nodes[] array, to facilitate addition of new devices.
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2022-10-10 15:36:50 +02:00 |
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Stefan Frederik
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68bf5e4640
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netlister code rewrite to allow any combination of pass-through symbols
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2022-10-10 14:54:32 +02:00 |
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Stefan Frederik
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150c2663b9
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added netlist_options as list of symbols not to load in schematics-as-symbol instances, load_file_dialog: make remember last dir work again
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2022-10-09 23:49:28 +02:00 |
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Stefan Frederik
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c5e7e3be29
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cleaner get_unnamed_node() function
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2022-10-08 22:16:27 +02:00 |
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Stefan Frederik
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03d2e685fe
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code cleanup
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2022-10-08 10:07:59 +02:00 |
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Stefan Frederik
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4e6513e713
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typo fix
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2022-10-08 09:52:54 +02:00 |
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Stefan Frederik
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5c2b14ebb8
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add generic pointer hash table
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2022-10-08 09:46:30 +02:00 |
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Stefan Frederik
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6be0fc392b
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refactoring of netlister code
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2022-10-07 23:29:42 +02:00 |
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Stefan Frederik
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945a26c8f6
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handle pass-through symbols chained with wires and no labels attached to wires
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2022-10-06 11:48:22 +02:00 |
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Stefan Frederik
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c5e91f209e
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allow to use @pinlist in format string even for symbols with duplicated ports. Duplicated entries will be skipped. Add component_browser_on_top tcl variable in xschemrc (default setting: enabled (1) to enable or disable component browser window always on top
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2022-10-05 16:47:34 +02:00 |
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Stefan Frederik
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0c590e4f0a
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allow negative integers in expandlabel() ( xx[6:5:-2:3] )
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2022-10-05 15:34:38 +02:00 |
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Stefan Frederik
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47fb2085ff
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update send_net_to graph() and send_current_to_graph() to use sch_waves_loaded() as the hierarchy level where raw file was loaded, to skip upper path designators
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2022-10-05 12:06:37 +02:00 |
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Stefan Frederik
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18da3fe78d
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doc updates about new expandlabel AAA[0:1:3:4]
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2022-10-05 02:30:14 +02:00 |
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Stefan Frederik
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9dbe4343e2
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added label notation EN[0:3:6:5]: EN[start🔚offset:repetitions], it will expand to a 20 bit bus: a[0],a[1],a[2],a[3],a[6],a[7],a[8],a[9],a[12],a[13],a[14],a[15],a[18],a[19],a[20],a[21],a[24],a[25],a[26],a[27]
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2022-10-05 02:23:37 +02:00 |
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Stefan Frederik
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5fe2f1586b
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refactor str_hash_* and int_hash_* functions
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2022-10-05 01:18:45 +02:00 |
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Stefan Frederik
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1c407e5dd6
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faster implementation of name_pass_through_nets() so almost zero overhead when netlisting big circuits with no pass-thru symbols
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2022-10-04 15:39:45 +02:00 |
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Stefan Frederik
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9c29324c8a
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allow nets with no label pass thru symbols with duplicated pins. named nets will propagate through duplicated pins
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2022-10-04 12:34:09 +02:00 |
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Stefan Frederik
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2e4d1e39a1
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update xschemtest.tcl
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2022-10-04 00:39:48 +02:00 |
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Stefan Frederik
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06fc742e60
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doc updates about {verilog,vhdl,spice}_sym_def, fix regression (possible crash) in verilog_block_netlist (thanks to Joanne), fix regression (wrong verilog test netlist) in print_verilog_primitive() (thanks to Joanne)
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2022-10-04 00:37:09 +02:00 |
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Stefan Frederik
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29d6655a01
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use limiting mylog()/mylog10() functions in expression calculator
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2022-10-03 18:29:36 +02:00 |
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Stefan Frederik
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4bbed85d23
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faster jump table in plot_raw_custom_data(), added simulation->add waveform reload launcher
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2022-10-03 11:15:14 +02:00 |
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Stefan Frederik
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64d947a9dd
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fix extra and verilog_extra handling in instance lines (verilog netlists)
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2022-10-03 09:10:58 +02:00 |
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Stefan Frederik
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d174306880
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added verilog_extra attribute for list of implicit node connections to symbol in verilog netlists. extra attribute still used in verilog as a list of attributes NOT use as component attributes / symbol parameters.
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2022-10-03 01:20:33 +02:00 |
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Stefan Frederik
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28c644fba7
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doc updates (new graph functions)
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2022-10-02 20:52:17 +02:00 |
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Stefan Frederik
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9acbf3fb41
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added prev(), del() function in graph processing. Extend calculation 1 or 2 point beyond viewport for exact deriv/integ/prev/del calculation at left edge
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2022-10-02 11:05:29 +02:00 |
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Stefan Frederik
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5a39f7be40
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cleanups in plot_raw_custom_data()
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2022-10-01 10:38:27 +02:00 |
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Stefan Frederik
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db94f9fb25
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@pinlist will be comma separated in verilog netlists
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2022-10-01 09:46:58 +02:00 |
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Stefan Frederik
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d06310deae
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cleanups and faster branch tables in scheduler.c
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2022-09-30 18:12:17 +02:00 |
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Stefan Frederik
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08aff09cf9
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scheduler.c cleanup
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2022-09-30 13:08:53 +02:00 |
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Stefan Frederik
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fc16997d0c
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switch dispatcher instead of if-else in scheduler.c
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2022-09-30 00:19:27 +02:00 |
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Stefan Frederik
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f26d082389
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cleanups(2) in scheduler.c
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2022-09-29 22:52:15 +02:00 |
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Stefan Frederik
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b20ca9b501
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cleanups in scheduler.c
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2022-09-29 22:35:44 +02:00 |
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Stefan Frederik
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f45278ebe3
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cleanups in scheduler.c
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2022-09-29 19:16:03 +02:00 |
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Stefan Frederik
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6296bbc1c6
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compile option for 2nd order 3-point backward derivative calculation formulaes for graph expressions
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2022-09-29 18:22:55 +02:00 |
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Stefan Frederik
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6b4ce14e7d
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some refactoring of tcl globals, engineering format in cursor display (on unscaled axes)
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2022-09-29 14:22:33 +02:00 |
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Stefan Frederik
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b7c7c336dd
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added vhdl_sym_def, spice_sym_def, verilog_sym_def attributes for symbols. If defined and not empty the corresponding netlister will insert the content of the attribute instead of the subcircuit schematic implementation. Typically used to include a definition file. Updated documentation
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2022-09-29 11:59:43 +02:00 |
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Stefan Frederik
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ae4b74f2d8
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graph axes in engineering notation (20u, 10p, 3k), fix an issue in graph panning with button1 mouse; ngspice:: get_current, get_voltage, get_diff_voltage, get_node embedded into xschem.tcl, to_eng tcl procedure to convert number to engineering form.
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2022-09-28 19:14:31 +02:00 |
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Stefan Frederik
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9d9a4826fc
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(Joanne) update to be clearer on how to compile xschem (from scratch vs using XSchemWin.sln) on Windows using VS2022. font.sch micro edits
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2022-09-28 11:33:48 +02:00 |
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Stefan Frederik
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6d17797d0b
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add Highlight->Select overlapped instances command
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2022-09-27 18:35:42 +02:00 |
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Stefan Frederik
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4e3f396da5
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better pv_ngspice.sym i-v curve
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2022-09-27 16:45:02 +02:00 |
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Stefan Frederik
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472751dfc0
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better file globbing in load_file_dialog
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2022-09-27 13:15:04 +02:00 |
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Stefan Frederik
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d4b6986e24
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added File -> Component browser, clicking recent component buttons displays preview
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2022-09-27 12:28:54 +02:00 |
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Stefan Frederik
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25f0334110
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resize some widgets, add femto and tera for x/y axis units
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2022-09-27 10:09:51 +02:00 |