Commit Graph

9080 Commits

Author SHA1 Message Date
Wilson Snyder bbb231dfe2 Internals: Minor cleanups preparing for initialization fixes. No functional change. 2026-02-07 14:16:12 -05:00
Wilson Snyder 9068e2e5b5 Commentary: Changes update 2026-02-07 14:15:43 -05:00
Geza Lore bb0e1c8c61
Optimize temporary insertion for concatenations in Dfg (#7013)
Add a new Dfg pass 'pushDownSel'. This will try to move selects through
a tree of concatenations in order to eliminate temporary nodes holding
intermediate concatenation results. This can get rid of a lot of
variables when packed arrays are assigned in parts (e.g. bit-wise).
2026-02-07 18:06:12 +00:00
github action abdac02b50 Apply 'make format' 2026-02-07 15:07:33 +00:00
Leela Pakanati 8922794088
Tests: Add test cases for interface array access with loop variable index (#1418 tests) (#7011) 2026-02-07 10:06:37 -05:00
Geza Lore 6100c39764
Internals: Assign trace codes starting from zero (#7007)
Use uint32_t max value instead of zero as sentinel value for a trace
code being unassigned. Prep for follow on patch.

Note the actual trace file will still start codes from one, the codes
in the model are just an offset from the base code.
2026-02-07 14:01:53 +00:00
Igor Zaworski dc26dd601d
Fix internal error - virtual interface not found (#7010) 2026-02-06 22:20:10 +00:00
Pawel Kojma 9a8538fafa
Support signed multiplication in constraints (#7008) 2026-02-06 10:14:54 -05:00
github action 60b52a4986 Apply 'make format' 2026-02-06 11:39:13 +00:00
Leela Pakanati b14d65a787
Support modport expression syntax + nested (#2601) (#5581) (#7005) 2026-02-06 06:38:16 -05:00
Leela Pakanati 2215d01d6b
Fix hierarchical interface/modport issues (#5941) (#6997) 2026-02-05 22:15:30 -05:00
Veripool API Bot b82f6beffb Verilog format 2026-02-05 17:45:24 -05:00
Wilson Snyder c83ae4a3ca Commentary: Changes update 2026-02-05 17:43:33 -05:00
Wilson Snyder 9fab6bfcf0 Tests: Fix t_assert_elab_p.py reruns 2026-02-05 17:42:39 -05:00
Wilson Snyder bee456822e Internals: Fix missing newline on co_return output code 2026-02-05 12:57:26 -05:00
Wilson Snyder 1adedd0bfa Tests: Cover deassign 2026-02-05 12:57:26 -05:00
Geza Lore 4e9792c34c
Fix C++ types of non-inlined module ports (#7002)
We use special C++ types for ports, e.g. SystemC types in --sc mode, and native C arrays for unpacked arrays in --cc mode. These types are not substitutable for internal types, e.g. VlUnpacked, however all the runtime primitives expect internal types.

I think the intention was to use these special IO types only for top level ports, but the current implementation also uses them for the ports of all non-inlined modules. This means the output C++ will not compile if such a port is passed to a runtime primitive (e.g. array 'sort' as in the new test) or DPI import.

Changed to use the special IO types only on the top level ports.

Note these are likely still broken if attempting to invoke on a top level port (we might be saved by wrapTop, but later optimizations might eliminate the intermediary)
2026-02-05 14:49:07 +00:00
Geza Lore 4aa0ea3f27 Commentary: Changes update 2026-02-05 07:05:59 +00:00
github action 55eaa64386 Apply 'make format' 2026-02-04 21:27:14 +00:00
Leela Pakanati 57c3b8e51b
Support nested interface as port connection (#5066) (#6986) 2026-02-04 16:26:20 -05:00
Geza Lore 515841cf15 Commentary 2026-02-04 18:09:51 +00:00
Oleh Maksymenko 229a696ab8
Add decoded Verilog name in JSON output (#6919) (#6995) 2026-02-04 07:08:33 -05:00
Wilson Snyder 1dd80996cd Fix some error capitalization 2026-02-03 19:57:23 -05:00
Wilson Snyder aaa5c5e857 Tests: t_dist_warn_coverage.py: Understand wildcards (#6994 comment) 2026-02-03 19:51:23 -05:00
Christian Hecken 3c680ba5a4
Tests: Fix LCOV_EXCL matching in fully commented lines (#6994) 2026-02-03 19:03:43 -05:00
Christian Hecken a778870e69
Internals: Optimize VerilatedVpioVarBase::m_fullname (#6993) 2026-02-03 17:36:00 -05:00
Krzysztof Bieganski ad85d89817
Support `foreach` with nested dots (#6991)
Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2026-02-03 08:44:18 -05:00
Wilson Snyder f9c76e84a6 Fix purity of backtrace, from bb979a00 2026-02-02 22:47:24 -05:00
Wilson Snyder 0fcc68e4b8 Fix MSVC backtrace, from bb979a00 2026-02-02 21:00:56 -05:00
Wilson Snyder 76c4ae5683 Add back LICENSE file due to (f4pga/actions#49) 2026-02-02 19:34:10 -05:00
Wilson Snyder bb979a00c8 Fix `$stacktrace` to decode through internal-c++filt (#6985). 2026-02-02 19:01:24 -05:00
Wilson Snyder 9083b238e5 Tests: Fix execute file permissions. No test change. 2026-02-02 08:28:46 -05:00
github action 268f5c3367 Apply 'make format' 2026-02-02 03:38:19 +00:00
Leela Pakanati b2fa3fb54e
Fix parameterized class typedef as interface type parameter (#6983) (#6984) 2026-02-01 22:37:29 -05:00
Wilson Snyder 407fc74195 Internals: Use Var::isConst to allow constant substitution 2026-02-01 21:06:26 -05:00
Rodrigo Batista de Moraes c1e343d9cf
Fix variable randomization to better differ by seed (#6945) (#6956) 2026-02-01 14:53:33 -05:00
Wilson Snyder a05cbd8382 Support structure initial values (#6130).
Fixes #6130.
2026-02-01 13:44:20 -05:00
Geza Lore d3f608058f
Optimize expanded constant pool words (#6979)
Re-inline ConstPool entries in V3Subst that have been expanded into
word-wise accessed by V3Expand. This enables downstream constant folding
on the word-wise expressions.

As V3Subst now understands ConstPool entries, we can also omit expanding
straight assignments with a ConstPool entry on the RHS. This allows the
C++ compiler to see the memcpy directly.
2026-02-01 17:08:49 +00:00
Wilson Snyder 7ca113a84f Fix non-inlined function return value clearing (#6982). 2026-02-01 11:57:09 -05:00
Wilson Snyder 1b2e13a0d8 Tests: Improve t_uvm_hello.v 2026-02-01 11:42:32 -05:00
Wilson Snyder b9b0bf2e19 Tests: Rename some long-named test, no test change 2026-02-01 11:39:33 -05:00
Wilson Snyder 9c05c4d622 Commentary: Changes update 2026-02-01 11:39:07 -05:00
Geza Lore 5e5dcdbdbd
Optimize right shifts as clean (#6981) 2026-02-01 08:12:18 -05:00
Geza Lore ca17904a62
Internals: Improve readability of selects in output (#6980) 2026-02-01 07:29:56 -05:00
Geza Lore 197f11044e
Internals: Split reorder transfrom from V3Split to V3Reorder (#6976) 2026-02-01 05:09:40 +00:00
Geza Lore f0afcede10
Internals: Use pure expressions in V3Randomize (#6974) 2026-02-01 05:09:19 +00:00
Geza Lore 122ceb2258
Internals: Fix use of Expr as Stmt in V3Assert (#6280) (#6973) 2026-02-01 05:08:41 +00:00
Geza Lore bef709a235
Optimize wide word shifts by multiple of word size (#6970)
V3Expand wide SHIFTL and SHIFTR if the shift amount is know and is a
multiple of VL_EDATA_SIZE. This case results in each word requiring a
simple copy from the original, or store of a constant zero, which
subsequent V3Subst can then eliminate.
2026-02-01 05:07:57 +00:00
Geza Lore cea4c88e12
Optimize more wide operation temporaries with substitution (#6972)
A temporary introduced by V3Premit could not be eliminated in V3Subst if
it was involved in an expression that did a write back to a
non-temporary. To enables removing these, we need to track all variables
in V3Subst, not just the ones we would consider for elimination. Note
the new implementation is marginally faster than the old one even though
it does more work. It can eliminate ~5% more of wide temporaries on some
designs. Algorithm is largely the same.
2026-02-01 05:07:13 +00:00
Wilson Snyder 07ce0ac2ea
Internals: Move CReset under Assign (#6978) 2026-01-31 21:27:36 -05:00