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2175 Commits

Author SHA1 Message Date
Tomasz Michalak b5a4e6932e run_fuzzer.py: Adjust unit names output by free tool 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-09 09:33:22 +02:00
Tim 'mithro' Ansell fbec529926 Less verbose memory usage info. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-05-08 10:09:45 +02:00
Tim 'mithro' Ansell 1ca3f55b05 Fix doctest for Logger. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-05-08 10:09:45 +02:00
Tomasz Michalak 64c0a3c0b4
Merge pull request #824 from antmicro/043-clk-rebuf-pips-zynq 
Resolve missing CLK_REBUF PIPs bits for Zynq
 2019-05-08 07:55:02 +02:00
Tomasz Michalak f93ae0a3d2
Merge pull request #823 from antmicro/030-iob-zynq 
Resolve missing IOB bits for Zynq
 2019-05-08 07:54:31 +02:00
Tomasz Michalak af50a5f32a 043-clk-rebuf-pips: increase the number of specimen 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 15:58:53 +02:00
Tomasz Michalak c094640034 030-iob: don't create liob segbits file for zynq 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 13:53:17 +02:00
Tomasz Michalak 9bf9d4e0fd 030-iob: skip broken tile for zynq 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-05-07 13:36:50 +02:00
Tim Ansell 27bba88fc8
Merge pull request #810 from mithro/import-wiki 
Fixing issues from wiki import
 2019-04-29 09:30:05 -07:00
Tim Ansell 938f3788e8
Merge pull request #706 from antmicro/bel-timing 
fuzzers: Adding BEL timing fuzzer
 2019-04-29 09:16:18 -07:00
litghost 7750e38b3e
Merge pull request #789 from antmicro/prjxray_stabilization_054_pip_fan_alt 
054-pip-fan-alt: add BYP_ALT.GFAN PIPs calculation to fuzzer
 2019-04-29 07:43:08 -07:00
Tomasz Michalak c91ca7cf7f 054-pip-fan-alt: add solution of BYP_ALT.GFAN PIPs 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-29 08:05:08 +02:00
Tim 'mithro' Ansell 85060dd1d6 Fix the INT references. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 19:05:53 -07:00
Tim 'mithro' Ansell 4473789694 fuzzers: Disable timing fuzzer on Kintex. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 18:53:51 -07:00
Karol Gugala 1952b3df75 fuzzers: 007: create run.ok file 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 634ca791c7 fuzzers: 007: bel: merge slicel and slicem timigs 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 588be1c62a utils: sdfmerge: write ouptput sdf file 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 901e64ed83 third_party: bump pyhthon-sdf-timing 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 7154cfcf61 fuzzers: add timing fuzzer to global makefile 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 69cc63ea81 utils: add sdfmerge tool 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala caeeb04dc6 Makefile: install sdf_timing module in env target 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 4ea453437d third-party: add python-sdf-timing 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala ba62b6b9c9 fuzzers: 007: add BEL to Makefile 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 31903a222a utils: makesdf: fix SLOW and FAST paths grouping 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala f4a37af87d utils: makesdf: sort delays 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 4d5434f3d2 utils: makesdf: use only slow values in timingcheck section 
SDF spec assumes we have only one set of values in the timingcheck section

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala bf86b47d4a utils: makesdf: minor output sdf fixes 
Fix endfile parenthesis.
Remove spaces in delay definitions

Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 5d9da26f78 Fuzzers: 007: add bel timing fuzzer 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 3ccc2df586 utils: add makesdf tool 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Karol Gugala 64b39ffa29 utils.tcl: add get_tile_types function 
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
 2019-04-28 18:53:06 -07:00
Tim 'mithro' Ansell 50139c524d docs: Adding warning to FIXMEs. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 18:43:13 -07:00
Tim 'mithro' Ansell a1c629819c docs: Fixing the :term:`PIP` References. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 18:43:13 -07:00
Tim 'mithro' Ansell 3b498612cb docs: Strip trailing space. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-28 18:43:13 -07:00
Tim Ansell bb85f572c4
Merge pull request #757 from mithro/import-wiki 
Importing remaining wiki contents
 2019-04-27 12:37:40 -05:00
Tim 'mithro' Ansell c1fff54ef3 docs: Adding stuff from review. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-27 12:27:34 -05:00
Tim 'mithro' Ansell b75360584d docs: Import wiki pages. 
* Interconnect page.
 * Reference page.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-27 12:08:55 -05:00
Tim 'mithro' Ansell 31d81ad314 docs: Importing wiki/Database-Files. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-04-27 12:08:55 -05:00
Tim Ansell 7db569d4eb
Merge pull request #800 from SymbiFlow/dependabot/submodules/third_party/googletest-61cdca5 
Build(deps): Bump third_party/googletest from `a53e931` to `61cdca5`
 2019-04-27 10:48:13 -05:00
Tim Ansell a1b473431f
Merge pull request #801 from SymbiFlow/dependabot/submodules/third_party/abseil-cpp-cd86d0d 
Build(deps): Bump third_party/abseil-cpp from `d902eb8` to `cd86d0d`
 2019-04-27 10:47:45 -05:00
dependabot[bot] 01c43dff98
Build(deps): Bump third_party/abseil-cpp from `d902eb8` to `cd86d0d` 
Bumps [third_party/abseil-cpp](https://github.com/abseil/abseil-cpp) from `d902eb8` to `cd86d0d`.
- [Release notes](https://github.com/abseil/abseil-cpp/releases)
- [Commits](d902eb869b...cd86d0d20a)

Signed-off-by: dependabot[bot] <support@dependabot.com>
 2019-04-27 05:11:49 +00:00
dependabot[bot] c80058ad30
Build(deps): Bump third_party/googletest from `a53e931` to `61cdca5` 
Bumps [third_party/googletest](https://github.com/google/googletest) from `a53e931` to `61cdca5`.
- [Release notes](https://github.com/google/googletest/releases)
- [Commits](a53e931dcd...61cdca569b)

Signed-off-by: dependabot[bot] <support@dependabot.com>
 2019-04-27 05:11:28 +00:00
Tim Ansell 3b59402eb9
Merge pull request #799 from antmicro/prjxray_stabilization_052_pip_clkin 
052-pip-clkin: Exclude potentially conflicting PIP + nodes from a run.
 2019-04-26 12:14:56 -05:00
Tomasz Michalak 40f0ef6fa8 052-pip-clkin: run make format 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak d67cb4c250 052-pip-clkin: re-enable fuzzer 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak 8a47473bd1 052-pip-clkin: don't route PIPs with same wires in one run 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tomasz Michalak 6337cac12a 052-pip-clkin: use interconnect tiles with different x coordinates 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-25 09:36:52 +02:00
Tim Ansell 554f74daec
Merge pull request #788 from antmicro/prjxray_stabilization 
Disable currently flaky fuzzers to make CI go green again
 2019-04-25 00:27:45 -07:00
Tomasz Michalak 28729661ac fuzzers: disable 056-pip-rem until other instabilities are fixed 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-24 07:53:48 +02:00
Tomasz Michalak 6a5d048c4d fuzzers: disable 052-pip-clkin until fuzzer becomes stable 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-24 07:53:22 +02:00
Tomasz Michalak d07cfe457f fuzzers: disable harness generation for artix7 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-04-23 16:25:13 -07:00