Commit Graph

2969 Commits

Author SHA1 Message Date
Tomasz Michalak 2814254cbf 041-clk-hrow-pips: Balance todo list
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:20 +02:00
Tomasz Michalak 678f915467 041-clk-hrow-pips: Don't solve fake features
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-19 11:11:20 +02:00
Karol Gugala d5dc09948a fuzzers: 007: remove unused code
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-19 10:53:19 +02:00
Maciej Kurc 64a05b4fa2 Changed makefiles to use XRAY_DIR
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-19 09:19:28 +02:00
Karol Gugala 0f37f0c294
Merge pull request #857 from antmicro/fuzzer_007_ff_sr_to_q
Fixed fuzzer 007 to make it extract missing timings for FFs
2019-06-19 08:15:45 +02:00
Karol Gugala 0fe609353e fuzzers: 007: update docstring for find_aliased_pin
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 2d26781992 fuzzers: 007: tim2json: update docstrings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 37626d75e5 fuzzers: 007: fixup_timings: update docstrings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 9b04747da9 fuzzers: 007: bel: add README
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala afb0cc78da fuzzers: 007: add docstring and assert to line_fixup function
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 63e6d17b50 fuzzers: 007: rename pin alias property -> is_property_related
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala bb9bc7bfdd fuzzers: 007: refactor aliased pins detection
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 26614e5ed4 fuzzers: 007: restore missing continue
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala c9d661d161 fuzzers: 007: run make format
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 73979fdf04 fuzzers: 007: handle pin/pin and pin/prop aliases
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala b122f07896 fuzzers: 007: do not emit clk -> clk timing checks
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 209240e77f fuzzers: 007: handle output vector pins
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala cdcb759299 fuzzers: 007: remove commented code
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 83657adbb9 fuzzers: 007: fix clock inputs inferring
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala ecb4fa1289 fuzzers: 007: use timings fixup
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Karol Gugala 91e7f3910e fuzzers: 007: add timings_fixup script
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-18 18:30:48 +02:00
Maciej Kurc 8366e324af Code refactoring.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 18:30:48 +02:00
Maciej Kurc d05945ff81 Added support for aliases of pins with underscore in names. Added doctests
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 18:30:48 +02:00
Maciej Kurc 58898bb29f Removed explicit bel suffix map.
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 18:30:48 +02:00
Maciej Kurc 6e1efd4815 Fixed formatting
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 18:30:48 +02:00
Maciej Kurc 4a117330f2 Fixed fuzzer 007 so it can correctly extract SR -> Q timings in FF_INIT and REG_INIT_FF
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 18:30:48 +02:00
litghost e984015c45
Merge pull request #888 from antmicro/874_pip_seed
050-pip-seed: Don't solve BYP_ALT|IMUX.LOGIC_OUTS_ bits
2019-06-18 09:28:29 -07:00
Maciej Kurc bf1c7d3183 Fixed invication of prjxray scripts in Makefiles
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-18 13:00:23 +02:00
litghost 1097bdb58b
Merge pull request #869 from antmicro/todo_balancing
Implement todo lists balancing mechanism
2019-06-17 10:01:20 -07:00
Tomasz Michalak f28cf75d5c 050-pip-seed: Don't solve BYP_ALT|IMUX.LOGIC_OUTS_ bits
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-17 14:55:18 +02:00
Maciej Kurc 728a6a76d2 Added bitread and segprint to the Makefile flow
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-17 14:52:06 +02:00
Maciej Kurc 3783e7b2e3 Fixed the LiteX generated SoC to be Linux capable
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-17 13:45:11 +02:00
Tim Ansell 56aab72146
Merge pull request #882 from antmicro/empty-sdf-fix
007-timing: Do not emit SDF files for sites with no timings.
2019-06-16 18:02:00 +02:00
Karol Gugala c71d4a0f44 database: remove sdf files on clean-db
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-14 11:18:14 +02:00
Maciej Kurc 4798c08ad8 Changed Vivado invocation
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-14 09:40:21 +02:00
Maciej Kurc 4f459cfde3 Ran format-tcl
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-13 16:39:49 +02:00
Maciej Kurc 421af109b1 Added bit2fasm targets to Makefiles
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-13 16:29:20 +02:00
Maciej Kurc 0c244f242d Added submodule with Yosys and integrated it with the LiteX minitest
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-13 16:16:11 +02:00
Maciej Kurc 01f77fd2b2 Added LiteX SoC project (VexRiscV + DRAM + Ethernet for Arty board)
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-13 15:58:06 +02:00
Karol Gugala 278d2dba2c fuzzers: 007: do not emit sdfs for sites with no timings
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
2019-06-13 13:32:43 +02:00
Tomasz Michalak 0fee08e577 Add generic todo list balancing mechanism
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
2019-06-12 14:26:52 +02:00
Tim Ansell 991e7866b4
Merge pull request #870 from antmicro/missing_segbits_utility
An utility script that helps to find missing segbits
2019-06-12 13:55:03 +02:00
Tim Ansell 4fc78e9eb3
Merge pull request #856 from antmicro/kokoro_faillogs
kokoro: Pack failing test cases instead of vivado logs
2019-06-12 13:53:35 +02:00
Tim Ansell 5a3c5457ab
Merge pull request #872 from SymbiFlow/dependabot/submodules/third_party/cctz-74ca13c
Build(deps): Bump third_party/cctz from `fcad8d7` to `74ca13c`
2019-06-12 13:51:55 +02:00
Tim Ansell b167fd4331
Merge pull request #876 from SymbiFlow/dependabot/submodules/third_party/googletest-da10da0
Build(deps): Bump third_party/googletest from `8ffb7e5` to `da10da0`
2019-06-12 13:51:37 +02:00
Tim Ansell bae092cac3
Merge pull request #877 from SymbiFlow/dependabot/submodules/third_party/abseil-cpp-0238ab0
Build(deps): Bump third_party/abseil-cpp from `2f76a9b` to `0238ab0`
2019-06-12 13:32:57 +02:00
Tim Ansell bb8640bda9
Merge pull request #880 from litghost/add_back_hclk_ppips
Add HCLK ppips.
2019-06-12 09:29:18 +02:00
Maciej Kurc 1eae588d60 Added reporting presence of missing bits via exit code
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-12 09:07:17 +02:00
Maciej Kurc 53db46b2d5 Updated exit and input args handling
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-12 09:07:17 +02:00
Maciej Kurc 626c0f7e66 An utility script that helps to find missing segbits for PIPs
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
2019-06-12 09:07:17 +02:00