mirror of https://github.com/openXC7/prjxray.git
fuzzers: 007: do not emit clk -> clk timing checks
Signed-off-by: Karol Gugala <kgugala@antmicro.com>
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@ -345,7 +345,8 @@ def read_raw_timings(fin, properties, pins, site_pins, pin_alias_map):
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speed_model = delay_btype + speed_model_clean
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if sequential is not None:
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if bel_output is None and bel_clock is None:
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if bel_output is None and bel_clock is None or \
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bel_output is None and bel_clock == bel_input:
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delay_loc += 6
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continue
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else:
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