Commit Graph

15 Commits

Author SHA1 Message Date
Tomasz Michalak c66f4f4aa1 Add license headers to tcl files
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
2020-05-26 07:33:12 -07:00
Tomasz Michalak 159d6a8e88 Add licensing header to Makefiles
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
2020-05-26 07:33:12 -07:00
Jake Mercer c05b4b0406 MAKE - Format Trailing Whitespace
Add `make format-trailing-ws`.  This recipe finds all _files_ (not
links) known to Git and uses `sed` to remove trailing whitespace.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
2019-10-26 10:04:52 +01:00
litghost c94cb0224c
Revert "Whitespace" 2019-10-23 14:22:17 -07:00
Jake Mercer bf11f43390 FORMAT - Run `make format`
Changes after running `make format`.  Future commits which add
whitespace should be caught by CI at the PR stage.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
2019-10-22 19:35:24 +01:00
Alessandro Comodi 2fab112c71 docs: fixed some READMEs and removed empty .md file generation
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
2019-09-25 09:54:28 +02:00
Felix Held 0d6e327229 introduce vivado wrapper
This fixes the problem that when sourcing the vivado settings file the
library search path is modified resulting in non-vivado binaries not working
due to being dynamically linked against the vivado libraries instead of the
system ones.

Signed-off-by: Felix Held <felix-github@felixheld.de>
2018-12-28 19:05:49 +01:00
John McMaster 54dcdf1f2e tcl: reformat existing code
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
2018-12-05 16:52:56 -08:00
Rick Altherr ad150af4df minitests: partial_reconfig_flow: Remove init/final sequence hacks
Now that xc7series generates proper .bit files, the hacks need to be
removed.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-02-01 14:34:31 -08:00
Rick Altherr 6b7af3b168 minitests: partial_reconfig_flow: always save ROI bitstreams
Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-02-01 14:34:31 -08:00
Rick Altherr f108805a0f partial_reconfig_flow: Rework to allow any verilog for ROI
Change naming to clarify which files are related to synthesis vs
implementation. Rewrite ROI synthesis and implementation rules as
pattern rules to allow any .v to be used as an ROI design.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-01-25 21:10:05 -08:00
John McMaster bb9e8b8dc4 partial_config_flow: fix readme bad commands
Signed-off-by: John McMaster <johndmcmaster@gmail.com>
2018-01-25 17:22:55 -08:00
Rick Altherr b6f754dae7 Document how init_sequence and final_sequence offsets were determined.
Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-01-22 15:26:17 -08:00
Rick Altherr 554cf549c4 Use .bit and .bin consistently
Xilinx uses .bit for bitstreams that include an additional header that
appears to carry some build information (tool version, date built, etc).
For bitstreams without that header, they use .bin.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-01-22 15:23:48 -08:00
Rick Altherr 425c96c10d minitest: FASM and xc7patch proof of concept using partial reconfig flow
Harness is implemented using Vivado's Partial Reconfiguration flow.  ROI
designs are generated from FASM and patched into the harness to create a
programmable bitstream.

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
2018-01-22 14:15:31 -08:00