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Document how init_sequence and final_sequence offsets were determined. 

Signed-off-by: Rick Altherr <kc8apf@kc8apf.net>
This commit is contained in:
Rick Altherr 2018-01-22 15:26:17 -08:00
parent 554cf549c4
commit b6f754dae7
1 changed files with 12 additions and 0 deletions
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12
minitests/partial_reconfig_flow/Makefile
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@ -23,6 +23,16 @@
# insufficient to program a device. Grab the initialization and finalization
# sequences from the harness bitstream so they can be tacked on to the
# xc7patch-generated bitstream to create a programmable bitstream.
#
# The offsets used below were determined by manually inspecting
# harness_routed.bit with a hex editor. init_sequence.bit is the beginning of
# the file until just before the actual frame data is sent via a write to FDRI.
# final_sequence.bin is from just after the frame data write to the end of the
# file. Note that final_sequence.bin normally includes at least one CRC check.
# The sed command replaces any CRC checks with a Reset CRC command which is the
# same behavior as setting BITSTREAM.GENERAL.CRC to Disabled. These offset
# should not change unless you alter the bitstream format used (i.e. setting
# BITSTREAM.GENERAL.DEBUGBITSTREAM or BITSTREAM.GENERAL.PERFRAMECRC to YES).
init_sequence.bit: harness_routed.bit
# WARNING: these values need to be tweaked if anything about the
# Vivado-generated design changes.
@ -69,6 +79,8 @@ roi_inv_routed.dcp roi_inv_w_harness_routed.dcp harness_routed.dcp: harness.dcp
%.frm: %.fasm
${XRAY_DIR}/tools/fasm2frame.py $< $@
# This format is a human-readable representation of the configuration packets
# used to interact with 7-series chips over JTAG.
%.packets: %.bit
${XRAY_TOOLS_DIR}/bittool list_config_packets $< > $@