Gwenhael Goavec-Merou
|
dd4e3e40df
|
spiFlash: typo
|
2021-10-10 18:27:41 +02:00 |
Gwenhael Goavec-Merou
|
ddcf8fd1b1
|
spiFlash: add flash_model, method to convert len to block protect and block protect to len
|
2021-10-10 18:26:04 +02:00 |
Gwenhael Goavec-Merou
|
22c095547e
|
spi: introduce list of known spi flash devices (required for protection)
|
2021-10-10 18:25:09 +02:00 |
Gwenhael Goavec-Merou
|
4c2a091ab1
|
xilinx: introduce coolrunner-II support
|
2021-10-06 08:46:00 +02:00 |
Gwenhael Goavec-Merou
|
69ac10e2f7
|
Merge branch 'master' of github.com:trabucayre/openFPGALoader
|
2021-10-03 18:34:07 +02:00 |
Gwenhael Goavec-Merou
|
6858cabc7d
|
main: introduce vid/pid args
|
2021-10-03 18:33:55 +02:00 |
Gwenhael Goavec-Merou
|
2adf4d585e
|
dfu: throw exception when vid & pid == 0; change altsetting type
|
2021-10-03 18:33:07 +02:00 |
Gwenhael Goavec-Merou
|
e6c01f75ad
|
board: fix altsetting default for non-DFU boards, use signed type
|
2021-10-03 18:31:55 +02:00 |
Uwe Bonnes
|
f6dfee2db0
|
xilinx: Adapt wait times with JTAG frequency.
Allowed frequency is up to 10 MHz according to xc95XXXxl_1532.bsd
|
2021-10-03 17:37:28 +02:00 |
Gwenhael Goavec-Merou
|
c165154317
|
xilinxMapParser: typo
|
2021-10-03 16:46:12 +02:00 |
Gwenhael Goavec-Merou
|
1233459528
|
xilinxMapParser: fuse mapping for xc2c jed
|
2021-10-03 16:25:41 +02:00 |
Gwenhael Goavec-Merou
|
a38d0b2d36
|
board: force 0 for altsetting in non-DFU type
|
2021-10-03 15:23:21 +02:00 |
Gwenhael Goavec-Merou
|
144e376d36
|
board: add support for 1bitsquared iCEBreaker-bitsy
|
2021-10-03 12:42:35 +02:00 |
Gwenhael Goavec-Merou
|
ea613fa97a
|
dfu/main: add args to select altsetting and add filter to select corresponding interface
|
2021-10-03 12:39:06 +02:00 |
Gwenhael Goavec-Merou
|
abef1f4968
|
add verbose-level args: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
|
2021-10-03 08:22:35 +02:00 |
Gwenhael Goavec-Merou
|
28cbd1faad
|
spiFlash: workaround for dump > 1M
|
2021-10-02 19:25:04 +02:00 |
Gwenhael Goavec-Merou
|
fe1634897f
|
part: merge ECP5-12 & ECP5-25 (same idcode)
|
2021-10-02 15:20:55 +02:00 |
Gwenhael Goavec-Merou
|
2e64a52cb5
|
Merge pull request #118 from UweBonnes/mpsse_toggle
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
|
2021-09-29 06:31:50 +02:00 |
Uwe Bonnes
|
f9a62b418b
|
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
|
2021-09-28 21:06:46 +02:00 |
Uwe Bonnes
|
8ec009fcea
|
part.hpp: Fix wrong description of XC95288XL
|
2021-09-28 12:33:14 +02:00 |
Gwenhael Goavec-Merou
|
cee91fa5a1
|
jedParser: p2
|
2021-09-25 15:06:47 +02:00 |
Gwenhael Goavec-Merou
|
bd903be6b6
|
jedParser: fix checksum when configuration data size is not multiple of 8bits
|
2021-09-25 15:06:13 +02:00 |
Vegard Storheil Eriksen
|
36783d74c4
|
progressBar: Use only stdout.
The progress markers of the progress bar were output to stderr while the
rest was output to stdout. Move everything to stdout.
|
2021-09-20 15:14:23 +02:00 |
Gwenhael Goavec-Merou
|
3698b98976
|
ftdiJtagMPSSE: improve a bit USB transaction
|
2021-09-18 14:54:40 +02:00 |
Gwenhael Goavec-Merou
|
57c0f16be4
|
ftdipp_mpsse: typo in setClkFreq
|
2021-09-16 07:41:05 +02:00 |
Gwenhael Goavec-Merou
|
85b53b5918
|
add gowin external spi in bscan and --external-flash option
|
2021-09-15 20:18:49 +02:00 |
Gwenhael Goavec-Merou
|
ae2fcfdca1
|
main: args. Fix comments for load and write bitstream
|
2021-09-13 14:10:42 +02:00 |
Fabien Marteau
|
b70bd83ced
|
Merge branch 'trabucayre:master' into master
|
2021-09-03 08:52:18 +02:00 |
Gwenhael Goavec-Merou
|
2ef040774e
|
fsparser: gw1nsr-4c idcode/nb_line
|
2021-09-03 07:47:58 +02:00 |
Fabien Marteau
|
23cf631b85
|
fix part name GW1NSR-4 -> GW1NSR-4C
|
2021-09-02 14:56:22 +02:00 |
Fabien Marteau
|
11bdebd884
|
adding reference to Tang Nano 4K kit in doc
|
2021-09-02 13:54:34 +02:00 |
Fabien Marteau
|
94385a758e
|
adding IDCODE for GW1NSR, for Tang Nano 4K kit
|
2021-09-02 13:46:35 +02:00 |
Gwenhael Goavec-Merou
|
bb69297ed0
|
xilinx: with XCF reconfigure FPGA after write
|
2021-08-30 17:15:45 +02:00 |
Gwenhael Goavec-Merou
|
2606bf7017
|
xilinx/doc: add spartan3 and XCF flash
|
2021-08-30 15:08:11 +02:00 |
Gwenhael Goavec-Merou
|
92a4b9bcd8
|
jtag: fix idcode mask and display
|
2021-08-28 16:31:24 +02:00 |
Gwenhael Goavec-Merou
|
304ec0071c
|
mask idcode upper nibble (version in IEEE 1149.1)
|
2021-08-27 15:10:12 +02:00 |
Gwenhael Goavec-Merou
|
faedb0cfd7
|
lattice: throw exception when program fails
|
2021-08-23 16:27:28 +02:00 |
Gwenhael Goavec-Merou
|
74b8305730
|
xilinx: test parse return for jedec instead of catch exception
|
2021-08-20 09:54:43 +02:00 |
Gwenhael Goavec-Merou
|
db5d4e75d9
|
jedParser: fix checksum for xc9500
|
2021-08-20 09:44:38 +02:00 |
Gwenhael Goavec-Merou
|
521c703842
|
part: add xc95 family idcode
|
2021-08-18 15:41:39 +02:00 |
Gwenhael Goavec-Merou
|
b61884614e
|
xilinx: add support for XC95 CPLD family
|
2021-08-18 15:38:49 +02:00 |
Gwenhael Goavec-Merou
|
471fbb6a81
|
jedParser: add xilinx compatibility
|
2021-08-18 15:38:24 +02:00 |
Gwenhael Goavec-Merou
|
274d4ea2dc
|
main: fix display order for detect
|
2021-08-18 07:40:25 +02:00 |
Gwenhael Goavec-Merou
|
c47b494311
|
jtag: add access to targeted idcode
|
2021-08-18 07:39:23 +02:00 |
Gwenhael Goavec-Merou
|
630d4428c6
|
main: DFU mode: pass board vid/pid
|
2021-07-17 08:36:32 +02:00 |
Gwenhael Goavec-Merou
|
cbe2bf5494
|
dfu: try to open dfu vid/pid, next board vid/pid. without vid/pid download is forbidden. Simplify detection in not enumerate mode. Display iProduct
|
2021-07-17 08:36:13 +02:00 |
Gwenhael Goavec-Merou
|
b8e2939776
|
board: add vid/pid for DFU at board level
|
2021-07-17 08:34:44 +02:00 |
Gwenhael Goavec-Merou
|
7113f4b36b
|
part: add Gowin GW1N-2
|
2021-07-16 07:42:34 +02:00 |
Gwenhael Goavec-Merou
|
651fdd8beb
|
ftdixx: improve workaround for arty. Not required with a classic ft2232
|
2021-07-14 19:09:39 +02:00 |
Gwenhael Goavec-Merou
|
cd64bce4f2
|
fix warning in Debug mode
|
2021-07-14 17:59:02 +02:00 |
Gwenhael Goavec-Merou
|
be6ed217dd
|
main: display error message if program fails
|
2021-07-14 16:39:14 +02:00 |
Gwenhael Goavec-Merou
|
1e0a06288d
|
configBitstreamParser: don't compute reverseByte, use a precomputed table: gain: 200ms for arty @30MHz
|
2021-07-14 08:44:22 +02:00 |
Gwenhael Goavec-Merou
|
cc688d6db6
|
main: small fix
|
2021-07-14 08:07:51 +02:00 |
Gwenhael Goavec-Merou
|
894cda820f
|
board: add default frequency option for BITBANG and SPI boards
|
2021-07-14 08:05:36 +02:00 |
Gwenhael Goavec-Merou
|
13af012163
|
main: avoid potential miss with probe clock frequency
|
2021-07-14 08:04:43 +02:00 |
Gwenhael Goavec-Merou
|
fd329158de
|
Merge pull request #98 from ultraembedded/master
Add board specific default frequency
|
2021-07-14 07:53:13 +02:00 |
Gwenhael Goavec-Merou
|
acf7d2a0a8
|
ftdiJtagMPSSE: add work around to deal with freq >= 15MHz
|
2021-07-13 07:00:30 +02:00 |
Gwenhael Goavec-Merou
|
594f065116
|
ftdipp_mpsse: use runtime_error instead of simple exception
|
2021-07-12 08:05:25 +02:00 |
ultraembedded
|
f8831f329c
|
Only use board clock speed if user does not specify an alternate freq
|
2021-07-11 15:27:46 +01:00 |
ultraembedded
|
797785ce93
|
Allow board configuration table to contain a default clock speed (as some boards are known to work at higher speeds safely). Move Digilent Arty to 10MHz (tested).
|
2021-07-11 15:20:15 +01:00 |
Gwenhael Goavec-Merou
|
3983726a66
|
all devices: use spiFlash dump & verify
|
2021-07-11 11:34:14 +02:00 |
Gwenhael Goavec-Merou
|
f5254294eb
|
altera: add verify and dump
|
2021-07-11 11:32:35 +02:00 |
Gwenhael Goavec-Merou
|
b77c5a22df
|
spiFlash: add verify and dump method
|
2021-07-11 11:32:10 +02:00 |
Gwenhael Goavec-Merou
|
f19d0996a4
|
progressBar: limit resolution
|
2021-07-11 11:30:02 +02:00 |
Gwenhael Goavec-Merou
|
6639f0646a
|
board: pipistrello: add spi flash support
|
2021-07-11 08:58:40 +02:00 |
Gwenhael Goavec-Merou
|
c90a4b7734
|
altera: spi flash support for cycloneV and qmtech
|
2021-07-10 08:20:27 +02:00 |
Gwenhael Goavec-Merou
|
0c4aedcb23
|
altera: add spi flash support for de0nano (EP4CE22F17C6)
|
2021-07-09 07:40:55 +02:00 |
Gwenhael Goavec-Merou
|
c99f5aa4e6
|
main: update to pass device type and prog type to altera class
|
2021-07-08 20:54:12 +02:00 |
Gwenhael Goavec-Merou
|
84bd19b19a
|
board: cyc1000: add fpga model
|
2021-07-08 20:53:20 +02:00 |
Gwenhael Goavec-Merou
|
c29fbb15f9
|
altera: use new epcq interface, add device type and prog type. Now more generic and not specific to cyc1000
|
2021-07-08 20:52:46 +02:00 |
Gwenhael Goavec-Merou
|
0d4b6143b5
|
epcq,spiFlash: epcq is now a subclass of spiFlash (real different part is power_(up|down) and read_id
|
2021-07-08 20:51:51 +02:00 |
Billy Stevens
|
f937cb9ab5
|
Adds support for the xc6slx100fgg484.
Tested on a Pano Logic G2.
|
2021-07-03 05:01:56 -04:00 |
Gwenhael Goavec-Merou
|
8068c84ec8
|
board: add Fomu support
|
2021-06-29 13:49:33 +02:00 |
Gwenhael Goavec-Merou
|
8f95303daf
|
move to APACHE-2.0 license
|
2021-06-26 15:24:07 +02:00 |
Gwenhael Goavec-Merou
|
b2d2fa0127
|
ftdipp_mpsse: with 1.5 reatach may be automatic
|
2021-06-26 15:04:57 +02:00 |
Gwenhael Goavec-Merou
|
c1f18cd1d3
|
jtag: fix unsigned vs signed
|
2021-06-26 08:47:37 +02:00 |
Gwenhael Goavec-Merou
|
98a2e836fa
|
ice40: add support for verify and dump
|
2021-06-26 08:43:02 +02:00 |
Gwenhael Goavec-Merou
|
fb8f50cb52
|
ice40: indent
|
2021-06-26 08:34:41 +02:00 |
Gwenhael Goavec-Merou
|
79a0e84f1f
|
efinix: add support for verify and dump
|
2021-06-26 08:34:12 +02:00 |
Gwenhael Goavec-Merou
|
b92a9adca7
|
ftdispi: improve write/read
|
2021-06-26 08:06:26 +02:00 |
Gwenhael Goavec-Merou
|
d32b81037a
|
xilinx: add dumpFlash support
|
2021-06-25 11:28:19 +02:00 |
Gwenhael Goavec-Merou
|
2af64e9af4
|
all: propagate verify with a message when not supported
|
2021-06-25 08:58:45 +02:00 |
Gwenhael Goavec-Merou
|
fe0a315456
|
lattice,device: introduce method to dump flash content
|
2021-06-24 18:20:34 +02:00 |
Gwenhael Goavec-Merou
|
c471d25bb5
|
xilinx,lattice,device: add verify write into flash
|
2021-06-24 18:08:02 +02:00 |
Gwenhael Goavec-Merou
|
b150bbdd23
|
gowin: checks if fs is targeted for connected device
|
2021-06-24 08:57:18 +02:00 |
Vegard Storheil Eriksen
|
5e11b3cb67
|
cmsisDAP: Remove product string check.
|
2021-06-22 23:59:57 +02:00 |
Vegard Storheil Eriksen
|
7fc0703167
|
cable: Add support for Orbtrace.
|
2021-06-22 23:59:46 +02:00 |
Gwenhael Goavec-Merou
|
40d9bc3ea7
|
dirtyJtag: cpplint/cppcheck
|
2021-06-20 16:39:19 +02:00 |
Gwenhael Goavec-Merou
|
0a7fd93a08
|
dirtyJtag: update _clkHZ with current frequency
|
2021-06-20 16:28:46 +02:00 |
Gwenhael Goavec-Merou
|
8d20c09791
|
dirtyJtag: fix toggleClk call (TMS is high, TDI depends on last_bit)
|
2021-06-20 16:28:18 +02:00 |
Gwenhael Goavec-Merou
|
26f5dd3ee5
|
Merge pull request #92 from phdussud/master
dirtyJtag optimizations to cut the number of USB requests
|
2021-06-20 16:26:53 +02:00 |
Gwenhael Goavec-Merou
|
827767b99f
|
add proof of concept / draft for DFU protocol. Add orangeCrab in DFU mode
|
2021-06-20 10:26:05 +02:00 |
phdussud
|
80f642a0a4
|
Fix a buffer overflow per code review
|
2021-06-19 12:39:25 -07:00 |
phdussud
|
cbbac0bff8
|
Changes per code review.
|
2021-06-19 09:40:33 -07:00 |
Gwenhael Goavec-Merou
|
dddfcbc973
|
board: add support for colorlight I5
|
2021-06-19 17:30:47 +02:00 |
Gwenhael Goavec-Merou
|
53c5d35da6
|
add cmsis dap (hid) support
|
2021-06-19 17:30:23 +02:00 |
Gwenhael Goavec-Merou
|
00289503dd
|
README: add ZedBoard, de0nanoSoc and de10nano support
|
2021-06-19 15:33:26 +02:00 |
Gwenhael Goavec-Merou
|
b4fe045060
|
fsparser: don't try to analyze header after then end of header area
|
2021-06-18 13:33:40 +02:00 |
phdussud
|
f84cb403e4
|
dirtyJtag optimizations to cut the number of USB requests
|
2021-06-13 11:38:30 -07:00 |
ultraembedded
|
eaed746cf2
|
Add a few more Spartan6 based parts and boards (tested on an old miniSpartan6+).
|
2021-06-13 17:55:56 +01:00 |
Gwenhael Goavec-Merou
|
2bf7b255b3
|
lattice: move directly to run_test_idle with last tx packet in program_mem
|
2021-06-12 09:27:16 +02:00 |
Gwenhael Goavec-Merou
|
2214a7e720
|
Merge remote-tracking branch 'origin/master' into JTAG_chain
|
2021-06-12 08:44:18 +02:00 |
Gwenhael Goavec-Merou
|
b5f2506fd1
|
clkHZ: be more generic
|
2021-06-12 08:40:40 +02:00 |
ultraembedded
|
dc003f6212
|
As per feedback, allow 232H devices to have upper bank pins configured on init.
|
2021-06-11 11:24:57 +01:00 |
ultraembedded
|
291f1b6d6f
|
Add support for Digilent Digital Discovery and Analog Discovery 2 (openFPGALoader -c digilent_ad)
|
2021-06-10 22:38:17 +01:00 |
GEORGIOS KARNAS
|
3abc591bd5
|
Add LCMXO2-1200HC
|
2021-06-06 13:30:13 -07:00 |
Gwenhael Goavec-Merou
|
0cae46b367
|
configBitstreamParser: fix CRLF vs LF: use fread with FILE (or stdin) instead of c++ stream
|
2021-05-26 17:56:21 +02:00 |
Gwenhael Goavec-Merou
|
b28ae236a1
|
fsparser: drop CR at the end of line
|
2021-05-26 17:40:16 +02:00 |
Gwenhael Goavec-Merou
|
d3a5b712b4
|
part: cycloneV Soc 5CEMA4 -> 5CSEMA4, add 5CSEBA6 idcode
|
2021-05-21 12:37:16 +02:00 |
Gwenhael Goavec-Merou
|
fc08249630
|
lattice: don't use read_write
|
2021-05-18 08:27:34 +02:00 |
Gwenhael Goavec-Merou
|
c36d29e5e3
|
gowin: don't use read_write
|
2021-05-16 12:13:31 +02:00 |
Gwenhael Goavec-Merou
|
a160cc6431
|
board: add terasic de0nanoSoc
|
2021-05-15 19:32:49 +02:00 |
Gwenhael Goavec-Merou
|
a96fbcc99a
|
board: add digilent zedboard
|
2021-05-15 19:31:39 +02:00 |
Gwenhael Goavec-Merou
|
ba92456597
|
part: add zynq 7020
|
2021-05-15 19:31:20 +02:00 |
Gwenhael Goavec-Merou
|
2f38461826
|
main: fix default args.index_chain
|
2021-05-15 19:30:45 +02:00 |
Gwenhael Goavec-Merou
|
9e260c1e05
|
xilinx: don't use read_write
|
2021-05-15 18:43:54 +02:00 |
Gwenhael Goavec-Merou
|
181303ce8c
|
anlogic: don't use read_write
|
2021-05-15 15:39:37 +02:00 |
Gwenhael Goavec-Merou
|
27af85dc19
|
main: add option to specify device index
|
2021-05-15 15:26:09 +02:00 |
Gwenhael Goavec-Merou
|
acf4ab270c
|
main: rework fpga detection to allows more than one device in a chain, but only FPGA is allowed
|
2021-05-15 15:08:27 +02:00 |
Gwenhael Goavec-Merou
|
8b34448ed0
|
jtag: add logic to handle multiple device in JTAG chain
|
2021-05-15 14:59:06 +02:00 |
Gwenhael Goavec-Merou
|
a242168e7f
|
jtag: shiftxR: don't try to move to shift when not required
|
2021-05-15 09:05:48 +02:00 |
Gwenhael Goavec-Merou
|
5da47a0200
|
jtag: propagate getClkFreq
|
2021-05-15 08:46:21 +02:00 |
Gwenhael Goavec-Merou
|
3d60cd647f
|
altera: adapt delay according to clock freq
|
2021-05-15 08:35:16 +02:00 |
Gwenhael Goavec-Merou
|
610a76f653
|
jtagInterface/cables: introduce getClkFreq
|
2021-05-15 08:32:51 +02:00 |
Gwenhael Goavec-Merou
|
c4e58073c1
|
part: add irlength and introduce new structure for device not handled (CPU) mainly for irlength
|
2021-05-14 16:35:26 +02:00 |
Gwenhael Goavec-Merou
|
49ba5f265a
|
add support for usb-blasterII
|
2021-05-13 16:11:22 +02:00 |
Gwenhael Goavec-Merou
|
42b7279a4b
|
main: add optional probe-firmware
|
2021-05-13 16:07:40 +02:00 |
Gwenhael Goavec-Merou
|
167d430c34
|
usbBlaster: add a low level to support both usbBlasterI(ftdi) and usbBlasterII(fx2)
|
2021-05-13 16:06:29 +02:00 |
Gwenhael Goavec-Merou
|
dc884b86c8
|
fx2_ll: cypress fx2 low level
|
2021-05-13 15:28:00 +02:00 |
Gwenhael Goavec-Merou
|
c09bc0662b
|
ihexParser: new parser for (i)hex files
|
2021-05-13 12:14:52 +02:00 |
Gwenhael Goavec-Merou
|
6ae29125ed
|
spiFlash: add a workaround for microchip SST26VF032B / SST26VF032BA
|
2021-05-05 06:59:02 +02:00 |
Gwenhael Goavec-Merou
|
c82257c9ba
|
spiFlash: introduce jedec_id
|
2021-05-05 06:25:00 +02:00 |
Gwenhael Goavec-Merou
|
200bc6364e
|
fsparser: fix checksum with GW1NS-2C, when configuration data is smaller than theory
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2021-04-26 19:28:44 +02:00 |
Gwenhael Goavec-Merou
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e2b40e1350
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xilinx: supress useless test in spi_wait
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2021-04-22 19:06:36 +02:00 |
Gwenhael Goavec-Merou
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a4ccdae7df
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add basys3 support
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2021-04-20 21:28:14 +02:00 |
Gwenhael Goavec-Merou
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7039465353
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rework xilinx fpga spiOverJtag to respect model/package
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2021-04-19 21:17:08 +02:00 |
Gwenhael Goavec-Merou
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65a1e995ec
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xilinx: be more verbose when spiOverJtag not available
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2021-04-19 21:08:11 +02:00 |
Gwenhael Goavec-Merou
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858d9e6273
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add support for Alchitry Au
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2021-04-16 21:20:30 +02:00 |
Gwenhael Goavec-Merou
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4defec0db1
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add support for artix 7 75t
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2021-04-15 15:38:36 +02:00 |
Gwenhael Goavec-Merou
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4e2b1aa73e
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cable: add SecuringHardware Tigard programmer
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2021-03-27 18:43:56 +01:00 |
Gwenhael Goavec-Merou
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32d3872f69
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part.hpp: sort altera cyclone V device by alphabetical order
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2021-03-27 18:31:39 +01:00 |
Gwenhael Goavec-Merou
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508635f788
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Merge pull request #80 from emard/master
recognize altera cyclone V 5CEBA4 FPGA
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2021-03-27 18:30:28 +01:00 |
Gwenhael Goavec-Merou
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fa70a9a3b2
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part.hpp: sort xilinx device by alphabetical order
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2021-03-27 18:25:52 +01:00 |
emard
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52efdab421
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recognize altera cyclone V 5CEBA4 FPGA
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2021-03-27 02:00:18 +01:00 |
Giuseppe Gebbia
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16f85fff63
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add support for kintex xc7k325t
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2021-03-24 17:25:05 +01:00 |
Gwenhael Goavec-Merou
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f33d30dbce
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main: fix bitbang check: config pins must be the shift value
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2021-03-21 18:51:13 +01:00 |
Gwenhael Goavec-Merou
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630a976884
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add support for cycloneIII and Terasic DE0 board
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2021-03-20 12:23:17 +01:00 |
phdussud
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ea141fdcfe
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Remove spurious files in previous commit
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2021-02-27 13:25:22 -08:00 |
phdussud
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e9b1a2e610
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fix for space
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2021-02-27 13:19:25 -08:00 |
phdussud
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6e96d8f6d0
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Conditionalization of ftdi_tcioflush
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2021-02-27 13:12:21 -08:00 |