bc610383cd
part: add support for Anlogic ELF2 EF2M45
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Anlogic EF2M45 is a FPGA with a co-packaged 4Mbit SPI Flash, and the
JTAG interface is the same with EG4S20.
Add support for it by adding it to the part database.
SPI Flash programming and SRAM programming are both tested.
The support of EF2M45 is also documented in this commit.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
2021-12-11 02:12:32 +08:00
d09e5da0ba
colognechip integration: initial commit
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This commit adds support for the Cologne Chip GateMate FPGA series. Both
Evaluation Board and Programmer Cable are supported. Configurations can be
loaded into the FPGA with both devices via JTAG or SPI. In addition to
reading/writing data from/to flashes directly via SPI, this can also be done
via the built-in JTAG-SPI-bypass. A direct wiring between programming hardware
and flash is no longer necessary in this case.
Signed-off-by: Patrick Urban <patrick.urban@web.de>
2021-12-10 12:12:32 +01:00
e182a53659
dfu: don't check filename -> let configBitstreamParser to do check
2021-12-07 14:17:09 +01:00
dfed1d1799
configBitstreamParser: cleanup
2021-12-03 07:21:22 +01:00
9005b2880b
CMakeList/configBitstreamParser: add optional zlib-ng support. No zlibxx is required
2021-12-02 07:20:58 +01:00
7ceaab0126
spiOverJtag: add bitstream for ECP4CE15F23
2021-11-28 16:51:42 +01:00
49b6bc6ce3
device: check if it's a compressed file -> extract real extension
2021-11-26 07:35:03 +01:00
ac09ac9b96
Merge branch 'trabucayre:master' into master
2021-11-25 15:10:14 +00:00
8fc67762f6
merged
2021-11-25 15:09:38 +00:00
c06e920143
updated to set authentication mode
2021-11-25 14:59:37 +00:00
7fe0a5ab66
wip: adding pubkey programming
2021-11-25 14:50:33 +00:00
7e7e030661
wip: adding pubkey programming
2021-11-25 14:13:17 +00:00
7a19f94f19
add zlib support (currently limited to altera spiOverJtag)
2021-11-25 08:11:50 +01:00
70e9671b3a
device: if filename has no extension -> use raw type
2021-11-24 07:35:33 +01:00
533cd64f37
lattice: if unknown file type, fails only for SRAM
2021-11-24 07:35:10 +01:00
98a025d68e
lattice: improve message for idcode mismatch
2021-11-22 07:01:19 +01:00
9f4ed8aaf6
latticeBitParser: fix loop type
2021-11-20 18:36:09 +01:00
2e2e325a9b
lattice: check matching idcode between bitstream and FPGA
2021-11-20 17:01:40 +01:00
ab43af7f0e
latticeBitParser: extract FPGA idcode from configuration data
2021-11-20 17:01:13 +01:00
1637d6f484
lattice: fix REG_STATUS_CNF_CHK_MASK offset: not the same for machXO3D and others
2021-11-20 16:57:31 +01:00
7f6a68ae2c
lattice: cppcheck/lint
2021-11-20 16:07:53 +01:00
5f78204f22
Merge pull request #130 from abacomartin/master
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adding support for MachXO3D
2021-11-20 15:35:01 +01:00
482141c556
verbose/verify modifications + common code moved to calling func + more white space!
2021-11-19 15:21:52 +00:00
393bf1d28b
Unused variables (plus some more white space fixes)
2021-11-19 15:11:02 +00:00
7ed432cba2
board: add QMTECH Cyclone IV Core Board
2021-11-14 08:45:11 +01:00
48c326130a
part: EP3C16 and EP4CE15 have same idcode
2021-11-14 08:44:39 +01:00
952084cd1d
all jtag interface: don't convert verbosity level to bool
2021-11-11 17:42:51 +01:00
8df01663ff
main: raise error when board name is provided but not found
2021-11-11 17:20:51 +01:00
07752c37e2
fix up line endings and white space issues - also moved the flash sector if block into MachXO3D family - as not required for other types
2021-11-11 09:04:50 +00:00
b6979f54f7
adding support for MachXO3D
2021-11-09 08:54:09 +00:00
3b15a633fa
ch552_jtag: cleanup and fix buffer flush with previous libftdi version
2021-11-06 10:52:53 +01:00
745844f0a0
ftdipp_mpsse: check mpsse_write return value
2021-11-06 10:33:48 +01:00
f843dc2eb2
ch552_jtag: driver for ch552_jtag firmware (ft2232c clone)
2021-11-06 10:33:25 +01:00
fb6a3b9f03
all cables: writeTMS len int -> uint32_t
2021-11-06 10:31:00 +01:00
28620f8ce9
altera: check file type: for an unknown type user has to explicitly provides flash mode fails otherwise
2021-11-06 08:37:14 +01:00
b27422cbe9
Merge branch 'master' of github.com:trabucayre/openFPGALoader
2021-10-23 08:44:28 +02:00
649554f3fd
efinix: add jtag support, introduce oe_pin in board configuration, add xyloni jtag interface
2021-10-23 08:44:23 +02:00
859c1a1a0f
spiFlash: erase using 4 or 64Kb
2021-10-20 08:00:21 +02:00
c043da874c
spiFlash: enable_protection method
2021-10-20 07:43:47 +02:00
3730e8189d
spiFlash: extract status register display from read_status_reg
2021-10-19 07:06:46 +02:00
6714400909
spiFlashdb: introduce tb_register to know tb location register
2021-10-19 06:55:30 +02:00
d8b8afce99
spiFlash: fix len_to_bp mask
2021-10-18 07:34:27 +02:00
7d8c8b2dcb
Add Trion T120 BGA 576 Dev Kit support.
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This Dev Kit uses a FT2232 chip, so also rename efinix_spi with efinix_spi_ft4232
and introduce efinix_spi_ft2232.
2021-10-15 09:20:36 +02:00
103de667f7
protection descriptor for IS25LP128
2021-10-14 20:55:42 +02:00
eb545b5256
typo
2021-10-14 20:52:46 +02:00
4b3755f368
cmsisDAP: fix buffer length
2021-10-13 07:16:30 +02:00
b1b1e5a4a8
main: don't limit vid/pid to dfu
2021-10-13 06:51:22 +02:00
de88698b0c
cmsisDAP: close device and context after use/ when fail
2021-10-13 06:46:05 +02:00
2d26b9d485
cmsisDAP: typo
2021-10-12 16:38:03 +02:00
6a4d24cf7a
cmsisDAP: send disconnect after use
2021-10-12 07:52:38 +02:00
dd4e3e40df
spiFlash: typo
2021-10-10 18:27:41 +02:00
ddcf8fd1b1
spiFlash: add flash_model, method to convert len to block protect and block protect to len
2021-10-10 18:26:04 +02:00
22c095547e
spi: introduce list of known spi flash devices (required for protection)
2021-10-10 18:25:09 +02:00
4c2a091ab1
xilinx: introduce coolrunner-II support
2021-10-06 08:46:00 +02:00
69ac10e2f7
Merge branch 'master' of github.com:trabucayre/openFPGALoader
2021-10-03 18:34:07 +02:00
6858cabc7d
main: introduce vid/pid args
2021-10-03 18:33:55 +02:00
2adf4d585e
dfu: throw exception when vid & pid == 0; change altsetting type
2021-10-03 18:33:07 +02:00
e6c01f75ad
board: fix altsetting default for non-DFU boards, use signed type
2021-10-03 18:31:55 +02:00
f6dfee2db0
xilinx: Adapt wait times with JTAG frequency.
...
Allowed frequency is up to 10 MHz according to xc95XXXxl_1532.bsd
2021-10-03 17:37:28 +02:00
c165154317
xilinxMapParser: typo
2021-10-03 16:46:12 +02:00
1233459528
xilinxMapParser: fuse mapping for xc2c jed
2021-10-03 16:25:41 +02:00
a38d0b2d36
board: force 0 for altsetting in non-DFU type
2021-10-03 15:23:21 +02:00
144e376d36
board: add support for 1bitsquared iCEBreaker-bitsy
2021-10-03 12:42:35 +02:00
ea613fa97a
dfu/main: add args to select altsetting and add filter to select corresponding interface
2021-10-03 12:39:06 +02:00
abef1f4968
add verbose-level args: -1 quiet, 0 normal mode, 1 verbose, 2 debug lowlevel
2021-10-03 08:22:35 +02:00
28cbd1faad
spiFlash: workaround for dump > 1M
2021-10-02 19:25:04 +02:00
fe1634897f
part: merge ECP5-12 & ECP5-25 (same idcode)
2021-10-02 15:20:55 +02:00
2e64a52cb5
Merge pull request #118 from UweBonnes/mpsse_toggle
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ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-29 06:31:50 +02:00
f9a62b418b
ftdiJtagMPSSE: Fix TCK toggle for large numbers.
2021-09-28 21:06:46 +02:00
8ec009fcea
part.hpp: Fix wrong description of XC95288XL
2021-09-28 12:33:14 +02:00
cee91fa5a1
jedParser: p2
2021-09-25 15:06:47 +02:00
bd903be6b6
jedParser: fix checksum when configuration data size is not multiple of 8bits
2021-09-25 15:06:13 +02:00
36783d74c4
progressBar: Use only stdout.
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The progress markers of the progress bar were output to stderr while the
rest was output to stdout. Move everything to stdout.
2021-09-20 15:14:23 +02:00
3698b98976
ftdiJtagMPSSE: improve a bit USB transaction
2021-09-18 14:54:40 +02:00
57c0f16be4
ftdipp_mpsse: typo in setClkFreq
2021-09-16 07:41:05 +02:00
85b53b5918
add gowin external spi in bscan and --external-flash option
2021-09-15 20:18:49 +02:00
ae2fcfdca1
main: args. Fix comments for load and write bitstream
2021-09-13 14:10:42 +02:00
b70bd83ced
Merge branch 'trabucayre:master' into master
2021-09-03 08:52:18 +02:00
2ef040774e
fsparser: gw1nsr-4c idcode/nb_line
2021-09-03 07:47:58 +02:00
23cf631b85
fix part name GW1NSR-4 -> GW1NSR-4C
2021-09-02 14:56:22 +02:00
11bdebd884
adding reference to Tang Nano 4K kit in doc
2021-09-02 13:54:34 +02:00
94385a758e
adding IDCODE for GW1NSR, for Tang Nano 4K kit
2021-09-02 13:46:35 +02:00
bb69297ed0
xilinx: with XCF reconfigure FPGA after write
2021-08-30 17:15:45 +02:00
2606bf7017
xilinx/doc: add spartan3 and XCF flash
2021-08-30 15:08:11 +02:00
92a4b9bcd8
jtag: fix idcode mask and display
2021-08-28 16:31:24 +02:00
304ec0071c
mask idcode upper nibble (version in IEEE 1149.1)
2021-08-27 15:10:12 +02:00
faedb0cfd7
lattice: throw exception when program fails
2021-08-23 16:27:28 +02:00
74b8305730
xilinx: test parse return for jedec instead of catch exception
2021-08-20 09:54:43 +02:00
db5d4e75d9
jedParser: fix checksum for xc9500
2021-08-20 09:44:38 +02:00
521c703842
part: add xc95 family idcode
2021-08-18 15:41:39 +02:00
b61884614e
xilinx: add support for XC95 CPLD family
2021-08-18 15:38:49 +02:00
471fbb6a81
jedParser: add xilinx compatibility
2021-08-18 15:38:24 +02:00
274d4ea2dc
main: fix display order for detect
2021-08-18 07:40:25 +02:00
c47b494311
jtag: add access to targeted idcode
2021-08-18 07:39:23 +02:00
630d4428c6
main: DFU mode: pass board vid/pid
2021-07-17 08:36:32 +02:00
cbe2bf5494
dfu: try to open dfu vid/pid, next board vid/pid. without vid/pid download is forbidden. Simplify detection in not enumerate mode. Display iProduct
2021-07-17 08:36:13 +02:00
b8e2939776
board: add vid/pid for DFU at board level
2021-07-17 08:34:44 +02:00
7113f4b36b
part: add Gowin GW1N-2
2021-07-16 07:42:34 +02:00
651fdd8beb
ftdixx: improve workaround for arty. Not required with a classic ft2232
2021-07-14 19:09:39 +02:00
cd64bce4f2
fix warning in Debug mode
2021-07-14 17:59:02 +02:00
Icenowy Zheng
Patrick Urban
Gwenhael Goavec-Merou
abacomartin
Martin Beynon
Florent Kermarrec
emard
Uwe Bonnes
Vegard Storheil Eriksen
Fabien Marteau
Fabien Marteau