Merge branch 'master' into netgen-1.5

has been shuffled to the beginning of the cell, which requires
different handling.

.gitignore

@@ -12,3 +12,5 @@ scripts/config.status
 *~
 *.log
 UPDATE_ME
+tcltk/netgen.sh
+tcltk/netgen.tcl

VERSION

@@ -1 +1 @@
-1.5.158
+1.5.174

base/flatten.c

@@ -193,17 +193,19 @@ void flattenCell(char *name, int file)
 	if (Debug) Printf("Renaming %s to %s\n", tmp->name, tmpstr);
 	FreeString(tmp->name);
 	tmp->name = strsave(tmpstr);
-#if OLDPREFIX
-	sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
-		tmp->instance.name);
-#else
-	strcpy(tmpstr+prefixlength,tmp->instance.name);
-#endif
-	FreeString(tmp->instance.name);
-	tmp->instance.name = strsave(tmpstr);
 	HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
-	if (tmp->type == FIRSTPIN) 
-	  HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+	if ((tmp->type != NODE) && (tmp->instance.name != NULL)) {
+#if OLDPREFIX
+	   sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
+		    tmp->instance.name);
+#else
+	   strcpy(tmpstr+prefixlength,tmp->instance.name);
+#endif
+	   FreeString(tmp->instance.name);
+	   tmp->instance.name = strsave(tmpstr);
+	   if (tmp->type == FIRSTPIN) 
+	      HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+        }
       }
 
       /* splice instance out of parent */
@@ -253,7 +255,7 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
 {
   struct objlist *ParentParams;
   struct objlist *ParentProps;
-  struct objlist *NextObj;
+  struct objlist *NextObj, *LastObj, *prepp;
   struct objlist *ChildObjList;
   struct nlist *ThisCell;
   struct  nlist *ChildCell;
@@ -296,21 +298,35 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
   while (notdone) {
     notdone = 0;
     ParentParams = ThisCell->cell;
+    LastObj = NULL;
+
     for (ParentParams = ThisCell->cell; ParentParams != NULL;
-	 ParentParams = NextObj) {
+		ParentParams = NextObj) {
       if (Debug) Printf("Parent = %s, type = %d\n",
 			ParentParams->name, ParentParams->type);
       NextObj = ParentParams->next;
-      if (ParentParams->type != FIRSTPIN) continue;
-      if (!(*matchfunc)(ParentParams->model.class, instance)) continue;
+      if (ParentParams->type != FIRSTPIN) {
+	  LastObj = ParentParams;
+	  continue;
+      }
+      if (!(*matchfunc)(ParentParams->model.class, instance)) {
+	  LastObj = ParentParams;
+	  continue;
+      }
 
       ChildCell = LookupCellFile(ParentParams->model.class, ThisCell->file);
       if (Debug)
 	 Printf(" Flattening instance: %s, primitive = %s\n",
 			ParentParams->instance.name, (ChildCell->class == 
 			CLASS_SUBCKT) ? "no" : "yes");
-      if (ChildCell->class != CLASS_SUBCKT) continue;
-      if (ChildCell == ThisCell) continue;	// Avoid infinite loop
+      if ((ChildCell->class != CLASS_SUBCKT) && (ChildCell->class != CLASS_MODULE)) {
+	   LastObj = ParentParams;
+	   continue;
+      }
+      if (ChildCell == ThisCell) {
+	   LastObj = ParentParams;
+	   continue;	// Avoid infinite loop
+      }
 
       /* Does the parent cell have properties?  If so, save a pointer to them */
       for (ParentProps = ParentParams->next; ParentProps &&
@@ -373,10 +389,10 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
 	  }
 
 	/* in pathological cases, the lengths of the port lists may
-           change.  This is an error, but that is no reason to allow
-           the code to core dump.  We avoid this by placing a 
-           superfluous check on ob2->type
-        */
+         * change.  This is an error, but that is no reason to allow
+         * the code to core dump.  We avoid this by placing a 
+         * superfluous check on ob2->type
+         */
 
 	  if (ob2 != NULL)
 	    ob2 = ob2->next;
@@ -456,17 +472,19 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
 	if (Debug) Printf("Renaming %s to %s\n", tmp->name, tmpstr);
 	FreeString(tmp->name);
 	tmp->name = strsave(tmpstr);
-#if OLDPREFIX
-	sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
-		tmp->instance.name);
-#else
-	strcpy(tmpstr+prefixlength,tmp->instance.name);
-#endif
-	FreeString(tmp->instance.name);
-	tmp->instance.name = strsave(tmpstr);
 	HashPtrInstall(tmp->name, tmp, &(ThisCell->objdict));
-	if (tmp->type == FIRSTPIN) 
-	  HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+	if ((tmp->type != NODE) && (tmp->instance.name != NULL)) {
+#if OLDPREFIX
+	   sprintf(tmpstr, "%s%s%s", ParentParams->instance.name, SEPARATOR,
+		    tmp->instance.name);
+#else
+	   strcpy(tmpstr+prefixlength,tmp->instance.name);
+#endif
+	   FreeString(tmp->instance.name);
+	   tmp->instance.name = strsave(tmpstr);
+	   if (tmp->type == FIRSTPIN) 
+	      HashPtrInstall(tmp->instance.name, tmp, &(ThisCell->instdict));
+        }
       }
 
       /* Do property inheritance */
@@ -497,10 +515,21 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
 	   for (ob2 = ChildObjList; ob2 && ob2->next != NULL; ob2 = ob2->next) ;
          }
          else {
-	   /* find ParentParams in ThisCell list */
-	   for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams; ob2=ob2->next); 
+	   /* find ParentParams in ThisCell list.  In most cases, LastObj   */
+	   /* should be pointing to it.					    */
+	   if (LastObj && (LastObj->next == ParentParams)) {
+	       ob2 = LastObj;
+	   }
+	   else {
+	      for (ob2 = LastObj; ob2 && ob2->next != ParentParams; ob2=ob2->next); 
+	      if (ob2 == NULL) {
+		 /* It should not happen that LastObj is ahead of ParentParams	*/
+		 /* but just in case, this long loop will find it.		*/
+	         for (ob2 = ThisCell->cell; ob2 && ob2->next != ParentParams; ob2=ob2->next); 
+	      }
+	   }
 	   if (ob2)
-	      for (ob2->next = ChildObjList; ob2->next != NULL; ob2 = ob2->next) ;
+	         for (ob2->next = ChildObjList; ob2->next != NULL; ob2 = ob2->next) ;
          }
          /* now, ob2 is last element in child list, so skip and reclaim parent */
 
@@ -1136,9 +1165,10 @@ int UniquePins(char *name, int filenum)
 struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 {
    struct nlist *ptr;
-   struct objlist *ob, *obt, *lob, *nob, *firstpin;
+   struct objlist *ob, *obt, *lob, *nob, *firstpin, *pob;
    struct nlist *tc = (struct nlist *)clientdata;
    int pinnum;
+   char *saveinst = NULL;
 
    ptr = (struct nlist *)(p->ptr);
    if (tc->file != ptr->file) return NULL;
@@ -1186,13 +1216,44 @@ struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 	        }
 
 		FREE(ob->name);
-		if (ob->instance.name != NULL) FREE(ob->instance.name);
+		if (ob->instance.name != NULL) {
+		    /* Keep a copy of the instance name (see below) */
+		    if (saveinst != NULL) FREE(saveinst);
+		    saveinst = ob->instance.name;
+		}
 		if (ob->model.class != NULL) FREE(ob->model.class);
 		FREE(ob);
 	     }
 	     else {
-		lob = ob;
-		ob->type = pinnum++;	// Renumber pins in order
+		if ((ob->type == PROPERTY) && (pinnum == 1))
+		{
+		    /* If this happens, then all the pins got removed,
+		     * and there is probably something very much wrong
+		     * with the setup.  However, to keep netgen from
+		     * blowing up, add back a "proxy(no pins)" record
+		     * in front; otherwise we'd have an orphaned
+		     * property record.
+		     */
+		    pob = GetObject();
+		    pob->name = (char *)MALLOC(15);
+		    sprintf(pob->name, "proxy(no pins)");
+		    pob->model.class = strsave(ob->model.class);
+		    if (saveinst != NULL)
+			pob->instance.name = strsave(saveinst);
+		    else
+			/* This should never happen */
+			pob->instance.name = strsave("error");
+		    pob->type = pinnum++;
+		    pob->node = -1;
+		    pob->next = ob;
+		    lob->next = pob;
+		    lob = ob;
+		}
+		else
+		{
+		    lob = ob;
+		    ob->type = pinnum++;	// Renumber pins in order
+		}
 	     }
 	     ob = nob;
 	     obt = obt->next;
@@ -1203,6 +1264,8 @@ struct nlist *cleanuppins(struct hashlist *p, void *clientdata)
 	     HashPtrInstall(firstpin->instance.name, firstpin, &(ptr->instdict));
       }
    }
+
+   if (saveinst != NULL) FREE(saveinst);
    return NULL;		/* Keep the search going */
 }
 
@@ -1660,7 +1723,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
     while (ecomp != NULL) {
 	if ((ecomp->num1 != ecomp->num2) && (ecomp->cell1 != NULL) &&
 			((ecomp->cell1->class == CLASS_RES) ||
-			(ecomp->cell1->class == CLASS_VSOURCE))) {
+			(ecomp->cell1->class == CLASS_VSOURCE) ||
+			(ecomp->cell1->class == CLASS_ISOURCE))) {
 	    int node1 = -1, node2 = -1;
 	    lob = NULL;
 	    for (ob1 = tc1->cell; ob1; ) {
@@ -1709,11 +1773,16 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 						tsub1->name,
 						tc1->name);
 
-					/* merge node of endpoints */
-					for (ob2 = tc1->cell; ob2; ob2 = ob2->next) {
-					    if (ob2->node == node2)
-						ob2->node = node1;
-					}
+					/* A current source is an open, while a	    */
+					/* resistor or voltage source is a short.   */
+
+					if (ecomp->cell1->class != CLASS_ISOURCE) {
+					    /* merge node of endpoints */
+					    for (ob2 = tc1->cell; ob2; ob2 = ob2->next) {
+						if (ob2->node == node2)
+						    ob2->node = node1;
+					    }
+					}	
 
 					/* snip, snip.  Excise this device */
 					if (lob == NULL) {
@@ -1765,7 +1834,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 
 	if ((ecomp->num1 != ecomp->num2) && (ecomp->cell2 != NULL) &&
 			((ecomp->cell2->class == CLASS_RES) ||
-			(ecomp->cell2->class == CLASS_VSOURCE))) {
+			(ecomp->cell2->class == CLASS_VSOURCE) ||
+			(ecomp->cell2->class == CLASS_ISOURCE))) {
 	    int node1 = -1, node2 = -1;
 	    lob = NULL;
 	    for (ob2 = tc2->cell; ob2; ) {
@@ -1815,9 +1885,11 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
 						tc2->name);
 
 					/* merge node of endpoints */
-					for (ob1 = tc2->cell; ob1; ob1 = ob1->next) {
-					    if (ob1->node == node2)
-						ob1->node = node1;
+					if (ecomp->cell2->class != CLASS_ISOURCE) {
+					    for (ob1 = tc2->cell; ob1; ob1 = ob1->next) {
+						if (ob1->node == node2)
+						    ob1->node = node1;
+					    }
 					}
 
 					/* snip, snip.  Excise this device */

base/netcmp.c

@@ -158,9 +158,6 @@ int right_col_end = 87;
 /* if TRUE, always partition ALL classes */
 int ExhaustiveSubdivision = 0;
 
-/* if TRUE, use fast symmetry breaking to resolve automorphisms */
-int FastSymmetryBreaking = 1;
-
 #ifdef TEST
 static void PrintElement_List(struct Element *E)
 {
@@ -1144,6 +1141,323 @@ Tcl_Obj *ListElementClasses(int legal)
 
 #endif
 
+/* 
+ *---------------------------------------------------------------------
+ *
+ * Sort the fanout lists of two formatted list entries so that they
+ * are as well aligned as they can be made, practically.  The matching
+ * is ad hoc as it does not affect LVS results but only how the results
+ * are organized and presented in the output.
+ *
+ *---------------------------------------------------------------------
+ */
+
+void
+SortFanoutLists(nlist1, nlist2)
+    struct FormattedList *nlist1, *nlist2;
+{
+    struct hashdict f1hash, f2hash;
+    int f1, f2, total;
+    struct FanoutList temp;
+    int *matched;
+    char pinname[1024], pinnameA[1024], pinnameB[1024];
+
+    InitializeHashTable(&f1hash, OBJHASHSIZE);
+    InitializeHashTable(&f2hash, OBJHASHSIZE);
+
+    if (nlist1->fanout < nlist2->fanout) {
+    	matched = (int *)CALLOC(nlist2->fanout, sizeof(int));
+	total = 0;
+
+    	for (f2 = 0; f2 < nlist2->fanout; f2++) {
+	    sprintf(pinname, "%s/%s", nlist2->flist[f2].model,
+			nlist2->flist[f2].name);
+	    HashPtrInstall(pinname, (void *)((long)f2 + 1), &f2hash);
+	}
+
+	for (f1 = 0; f1 < nlist1->fanout; f1++) {
+	    sprintf(pinname, "%s/%s", nlist1->flist[f1].model,
+			nlist1->flist[f1].name);
+	    f2 = (int)(long)HashLookup(pinname, &f2hash);
+	    if (f2 != 0) {
+	    	f2 -= 1;
+		matched[f1] = -1;
+		total++;
+	    	if (f2 != f1) {
+		    temp = nlist2->flist[f2];
+		    nlist2->flist[f2] = nlist2->flist[f1];
+		    nlist2->flist[f1] = temp;
+	    	    sprintf(pinnameA, "%s/%s", nlist2->flist[f1].model,
+				nlist2->flist[f1].name);
+	    	    sprintf(pinnameB, "%s/%s", nlist2->flist[f2].model,
+				nlist2->flist[f2].name);
+		    HashPtrInstall(pinnameA, (void *)((long)f1 + 1), &f2hash);
+		    HashPtrInstall(pinnameB, (void *)((long)f2 + 1), &f2hash);
+		}
+	    }
+	}
+
+	/* To do: If full pin names don't match, match by model name only */
+    }
+    else {
+    	matched = (int *)CALLOC(nlist1->fanout, sizeof(int));
+	total = 0;
+
+    	for (f1 = 0; f1 < nlist1->fanout; f1++) {
+	    sprintf(pinname, "%s/%s", nlist1->flist[f1].model,
+			nlist1->flist[f1].name);
+	    HashPtrInstall(pinname, (void *)((long)f1 + 1), &f1hash);
+	}
+
+	for (f2 = 0; f2 < nlist2->fanout; f2++) {
+	    sprintf(pinname, "%s/%s", nlist2->flist[f2].model,
+			nlist2->flist[f2].name);
+	    f1 = (int)(long)HashLookup(pinname, &f1hash);
+	    if (f1 != 0) {
+	    	f1 -= 1;
+		matched[f2] = -1;
+		total++;
+	    	if (f1 != f2) {
+		    temp = nlist1->flist[f1];
+		    nlist1->flist[f1] = nlist1->flist[f2];
+		    nlist1->flist[f2] = temp;
+	    	    sprintf(pinnameA, "%s/%s", nlist1->flist[f1].model,
+				nlist1->flist[f1].name);
+	    	    sprintf(pinnameB, "%s/%s", nlist1->flist[f2].model,
+				nlist1->flist[f2].name);
+		    HashPtrInstall(pinnameA, (void *)((long)f1 + 1), &f1hash);
+		    HashPtrInstall(pinnameB, (void *)((long)f2 + 1), &f1hash);
+		}
+	    }
+	}
+
+	/* To do:  If full pin names don't match, match by model name only */
+    }
+
+    FREE(matched);
+    HashKill(&f1hash);
+    HashKill(&f2hash);
+}
+
+/* 
+ *---------------------------------------------------------------------
+ *
+ * Determine the match between two entries in a bad node fragment
+ * according to an ad hoc metric of how many fanout entries are
+ * the same between the two.  This is not used to match circuits
+ * for LVS, but is used to sort the dump of unmatched nets generated
+ * for an unmatched subcell, so that the end-user is not presented
+ * with a list in a confusingly arbitrary order.
+ *
+ * Score is normalized to 100.
+ * If a model/pin has an equivalent on the other size, add 1
+ * If a model/pin equivalent has the same count, add 1
+ * Total values and normalize to a 100 score for an exact match.
+ *
+ *---------------------------------------------------------------------
+ */
+
+int
+NodeMatchScore(nlist1, nlist2)
+    struct FormattedList *nlist1, *nlist2;
+{
+    struct hashdict f1hash, f2hash;
+    char pinname[1024];
+    int f1, f2, maxfanout;
+    int score = 0;
+
+    InitializeHashTable(&f1hash, OBJHASHSIZE);
+    InitializeHashTable(&f2hash, OBJHASHSIZE);
+
+    if (nlist1->fanout < nlist2->fanout) {
+    	for (f2 = 0; f2 < nlist2->fanout; f2++) {
+	    sprintf(pinname, "%s/%s", nlist2->flist[f2].model,
+			nlist2->flist[f2].name);
+	    HashPtrInstall(pinname, (void *)((long)f2 + 1), &f2hash);
+	}
+
+	for (f1 = 0; f1 < nlist1->fanout; f1++) {
+	    sprintf(pinname, "%s/%s", nlist1->flist[f1].model,
+			nlist1->flist[f1].name);
+	    f2 = (int)(long)HashLookup(pinname, &f2hash);
+	    if (f2 != 0) {
+	    	f2 -= 1;
+		score++;
+		if (nlist1->flist[f1].count == nlist2->flist[f2].count)
+		    score++;
+	    }
+	}
+    }
+    else {
+    	for (f1 = 0; f1 < nlist1->fanout; f1++) {
+	    sprintf(pinname, "%s/%s", nlist1->flist[f1].model,
+			nlist1->flist[f1].name);
+	    HashPtrInstall(pinname, (void *)((long)f1 + 1), &f1hash);
+	}
+
+	for (f2 = 0; f2 < nlist2->fanout; f2++) {
+	    sprintf(pinname, "%s/%s", nlist2->flist[f2].model,
+			nlist2->flist[f2].name);
+	    f1 = (int)(long)HashLookup(pinname, &f1hash);
+	    if (f1 != 0) {
+	    	f1 -= 1;
+		score++;
+		if (nlist2->flist[f2].count == nlist1->flist[f1].count)
+		    score++;
+	    }
+	}
+    }
+
+    HashKill(&f1hash);
+    HashKill(&f2hash);
+
+    maxfanout = (nlist1->fanout < nlist2->fanout) ? nlist2->fanout : nlist1->fanout;
+    score = (50 * score) / maxfanout;
+
+    return score;
+}
+
+/* 
+ *---------------------------------------------------------------------
+ *
+ * Sort node list 2 to match the entries in list 1, to the extent
+ * possible.  Exact name matching is preferred, followed by matching
+ * of the largest percentage of components.  
+ *
+ *---------------------------------------------------------------------
+ */
+
+void SortUnmatchedLists(nlists1, nlists2, n1max, n2max)
+    struct FormattedList **nlists1, **nlists2;
+    int n1max, n2max;
+{
+    struct FormattedList *temp;
+    int n1, n2;
+    int *matched, total, best, ibest;
+
+    struct hashdict n1hash, n2hash;
+
+    InitializeHashTable(&n1hash, OBJHASHSIZE);
+    InitializeHashTable(&n2hash, OBJHASHSIZE);
+
+    if (n1max < n2max) {
+    	matched = (int *)CALLOC(n2max, sizeof(int));
+	total = 0;
+
+    	for (n2 = 0; n2 < n2max; n2++)
+	    HashPtrInstall(nlists2[n2]->name, (void *)((long)n2 + 1), &n2hash);
+
+	/* Match by name */
+    	for (n1 = 0; n1 < n1max; n1++) {
+	    n2 = (int)(long)HashLookup(nlists1[n1]->name, &n2hash);
+	    if (n2 != 0) {
+	    	n2 -= 1;
+		matched[n1] = -1;
+		total++;
+	    	if (n2 != n1) {
+		    temp = nlists2[n2];
+		    nlists2[n2] = nlists2[n1];
+		    nlists2[n1] = temp;
+		    HashPtrInstall(nlists2[n1]->name, (void *)((long)n1 + 1), &n2hash);
+		    HashPtrInstall(nlists2[n2]->name, (void *)((long)n2 + 1), &n2hash);
+		    SortFanoutLists(nlists1[n1], nlists2[n1]);
+		}
+	    }
+	}
+
+	/* For all nets that didn't match by name, match by content */
+#if 0
+	/* This is ifdef'd out because the improvement in the presentation
+	 * of the output is minimal, but the amount of computation is huge.
+	 * There are numerous ways to optimize this.
+	 */
+	if (total < n1max) {
+    	    for (n1 = 0; n1 < n1max; n1++) {
+		if (matched[n1] != -1) {
+		    best = 0;
+		    ibest = -1;
+		    for (n2 = 0; n2 < n2max; n2++) {
+			if (matched[n2] != -1) {
+			    matched[n2] = NodeMatchScore(nlists1[n1], nlists2[n2]);
+			    if (matched[n2] > best) {
+				best = matched[n2];
+				ibest = n2;
+			    }
+		 	}
+		    }
+		    if (ibest >= 0) {
+		       matched[n1] = -1;
+		       temp = nlists2[ibest];
+		       nlists2[ibest] = nlists2[n1];
+		       nlists2[n1] = temp;
+		       SortFanoutLists(nlists1[n1], nlists2[n1]);
+		    }
+		}
+	    }
+	}
+#endif
+    }
+    else {
+    	matched = (int *)CALLOC(n1max, sizeof(int));
+	total = 0;
+
+        for (n1 = 0; n1 < n1max; n1++)
+	    HashPtrInstall(nlists1[n1]->name, (void *)((long)n1 + 1), &n1hash);
+
+        for (n2 = 0; n2 < n2max; n2++) {
+	    n1 = (int)(long)HashLookup(nlists2[n2]->name, &n1hash);
+	    if (n1 != 0) {
+	    	n1 -= 1;
+		matched[n2] = -1;
+		total++;
+	    	if (n1 != n2) {
+		    temp = nlists1[n1];
+		    nlists1[n1] = nlists1[n2];
+		    nlists1[n2] = temp;
+		    HashPtrInstall(nlists1[n1]->name, (void *)((long)n1 + 1), &n1hash);
+		    HashPtrInstall(nlists1[n2]->name, (void *)((long)n2 + 1), &n1hash);
+		    SortFanoutLists(nlists2[n2], nlists1[n2]);
+		}
+	    }
+	}
+	/* For all nets that didn't match by name, match by content */
+#if 0
+	/* This is ifdef'd out because the improvement in the presentation
+	 * of the output is minimal, but the amount of computation is huge.
+	 * There are numerous ways to optimize this.
+	 */
+	if (total < n2max) {
+    	    for (n2 = 0; n2 < n2max; n2++) {
+		if (matched[n2] != -1) {
+		    best = 0;
+		    ibest = -1;
+		    for (n1 = 0; n1 < n1max; n1++) {
+			if (matched[n1] != -1) {
+			    matched[n1] = NodeMatchScore(nlists2[n2], nlists1[n1]);
+			    if (matched[n1] > best) {
+				best = matched[n1];
+				ibest = n1;
+			    }
+		 	}
+		    }
+		    if (ibest >= 0) {
+		       matched[n2] = -1;
+		       temp = nlists1[ibest];
+		       nlists1[ibest] = nlists1[n2];
+		       nlists1[n2] = temp;
+		       SortFanoutLists(nlists2[n2], nlists1[n2]);
+		    }
+		}
+	    }
+	}
+#endif
+    }
+
+    FREE(matched);
+    HashKill(&n1hash);
+    HashKill(&n2hash);
+}
+
 /* 
  *---------------------------------------------------------------------
  *---------------------------------------------------------------------
@@ -1222,8 +1536,9 @@ void FormatIllegalElementClasses()
 	   n2++;
 	}
       }
-      Fprintf(stdout, "\n");
+      SortUnmatchedLists(elist1, elist2, n1, n2);
 
+      Fprintf(stdout, "\n");
       for (n = 0; n < ((n1 > n2) ? n1 : n2); n++) {
 	 if (n != 0) {
 	    for (i = 0; i < left_col_end; i++) *(ostr + i) = ' ';
@@ -1525,6 +1840,12 @@ void FormatIllegalNodeClasses()
   ostr = CALLOC(right_col_end + 2, sizeof(char));
   found = 0;
 
+  /* 
+   * To do: match net names across partitions, to make it much clearer how
+   * two nets are mismatched, when they have been dropped into different
+   * partitions.
+   */
+
   for (nscan = NodeClasses; nscan != NULL; nscan = nscan->next)
     if (!(nscan->legalpartition)) {
       struct Node *N;
@@ -1577,8 +1898,9 @@ void FormatIllegalNodeClasses()
 	   n2++;
 	}
       }
-      Fprintf(stdout, "\n");
+      SortUnmatchedLists(nlists1, nlists2, n1, n2);
 
+      Fprintf(stdout, "\n");
       for (n = 0; n < ((n1 > n2) ? n1 : n2); n++) {
 	 if (n != 0) {
             for (i = 0; i < left_col_end; i++) *(ostr + i) = ' ';
@@ -5363,6 +5685,40 @@ PropertyMatch(struct objlist *ob1, int file1,
 #endif
    }
 
+   /* WIP---Check for no-connect pins in merged devices on both sides.	*/
+   /* Both sides should either have no-connects marked, or neither.	*/
+   /* (Permutable pins may need to be handled correctly. . .		*/
+
+   for (tp1 = ob1, tp2 = ob2; (tp1 != NULL) && tp1->type >= FIRSTPIN &&
+	    (tp2 != NULL) && tp2->type >= FIRSTPIN; tp1 = tp1->next, tp2 = tp2->next)
+   {
+      struct objlist *node1, *node2;
+
+      if (file1 == Circuit1->file)
+	 node1 = Circuit1->nodename_cache[tp1->node];
+      else
+	 node1 = Circuit2->nodename_cache[tp1->node];
+
+      if (file2 == Circuit1->file)
+         node2 = Circuit1->nodename_cache[tp2->node];
+      else
+         node2 = Circuit2->nodename_cache[tp2->node];
+
+      if (node1->instance.flags != node2->instance.flags)
+      {
+	 Fprintf(stdout, "  Parallelized instances disagree on pin connections.\n");
+	 Fprintf(stdout, "    Circuit1 instance %s pin %s connections are %s (%d)\n",
+		    tp1->instance.name, node1->name,
+		    (node1->instance.flags == 0) ? "tied together" : "no connects",
+		    node1->instance.flags);
+	 Fprintf(stdout, "    Circuit2 instance %s pin %s connections are %s (%d)\n",
+		    tp2->instance.name, node2->name,
+		    (node2->instance.flags == 0) ? "tied together" : "no connects",
+		    node2->instance.flags);
+	 mismatches++;
+      }
+   }
+
    // Attempt to organize devices by series and parallel combination
    if (t1type == PROPERTY && t2type == PROPERTY)
       PropertySortAndCombine(obn1, tc1, obn2, tc2);
@@ -5865,16 +6221,19 @@ int ResolveAutomorphsByProperty()
 /*
  *-------------------------------------------------------------------------
  *
- * ResolveAutormorphismsFull --
+ * ResolveAutormorphisms --
  *
- * Arbitrarily equivalence one pair of elements within an automorphic class
+ * Do symmetry breaking of automorphisms.
+ *
+ * Arbitrarily equivalence all pairs of elements and nodes within all
+ * automorphic classes, and run to completion.
  *
  * Return value is the same as VerifyMatching()
  *
  *-------------------------------------------------------------------------
  */
 
-int ResolveAutomorphismsFull()
+int ResolveAutomorphisms()
 {
   struct ElementClass *EC;
   struct Element *E;
@@ -5936,172 +6295,6 @@ int ResolveAutomorphismsFull()
   return(VerifyMatching());
 }
 
-/*
- *-------------------------------------------------------------------------
- *
- * ResolveElementAutomorphismsFast --
- *
- * Apply arbitrary symmetry breaking to symmetric element lists, then
- * iterate exhaustively to resolve all automorphisms.
- *
- * Return value is the same as VerifyMatching()
- *
- *-------------------------------------------------------------------------
- */
-
-int ResolveElementAutomorphismsFast()
-{
-  struct ElementClass *EC;
-  struct Element *E;
-  int C1, C2;
-
-  for (EC = ElementClasses; EC != NULL; EC = EC->next) {
-    struct Element *E1, *E2;
-    C1 = C2 = 0;
-    E1 = E2 = NULL;
-    for (E = EC->elements; E != NULL; E = E->next) {
-      if (E->graph == Circuit1->file) {
-	C1++;
-	E1 = E;
-      }
-      else {
-	C2++;
-	E2 = E;
-      }
-    }
-    if (C1 == C2 && C1 != 1) {
-      unsigned long newhash;
-
-      /* Do all of them at once. */
-      /* NOTE:  If this were to fail for some reason, it would	*/
-      /* probably be necessary to do this the original slow way	*/
-      /* which is to rehash one pair at a time and iterate to	*/
-      /* convergence, and repeat.				*/
-
-      E1 = E2 = EC->elements;
-      while (E1 != NULL && E2 != NULL) {
-          while (E1->graph != Circuit1->file) E1 = E1->next;
-          while (E2->graph != Circuit2->file) E2 = E2->next;
-	  Magic(newhash);
-	  E1->hashval = newhash;
-	  E2->hashval = newhash;
-	  E1 = E1->next;
-	  E2 = E2->next;
-      }
-    }
-  }
-
-  FractureElementClass(&ElementClasses); 
-  FractureNodeClass(&NodeClasses); 
-  ExhaustiveSubdivision = 1;
-  while (!Iterate() && VerifyMatching() != -1); 
-  return(VerifyMatching());
-}
-
-/*
- *-------------------------------------------------------------------------
- *
- * ResolveNodeAutomorphismsFast --
- *
- * Apply arbitrary symmetry breaking to symmetric node lists, then iterate
- * exhaustively to resolve all automorphisms.  Normally, all automorphisms
- * should be resolved by ResolveElementAutomorphisms().  It is likely true
- * that this routine will never run, by definition.
- *
- * Return value is the same as VerifyMatching()
- *
- *-------------------------------------------------------------------------
- *
- */
-
-int ResolveNodeAutomorphismsFast()
-{
-  struct Node *N;
-  struct NodeClass *NC;
-  int C1, C2;
-
-  for (NC = NodeClasses; NC != NULL; NC = NC->next) {
-    struct Node *N1, *N2;
-    C1 = C2 = 0;
-    N1 = N2 = NULL;
-    for (N = NC->nodes; N != NULL; N = N->next) {
-      if (N->graph == Circuit1->file) {
-	C1++;
-	N1 = N;
-      }
-      else {
-	C2++;
-	N2 = N;
-      }
-    }
-    if (C1 == C2 && C1 != 1) {
-      unsigned long newhash;
-
-      /* Do all of them at once */
-      /* NOTE:  If this were to fail for some reason, it would	*/
-      /* probably be necessary to do this the original slow way	*/
-      /* which is to rehash one pair at a time and iterate to	*/
-      /* convergence, and repeat.				*/
-
-      N1 = N2 = NC->nodes;
-      while (N1 != NULL && N2 != NULL) {
-          while (N1->graph != Circuit1->file) N1 = N1->next;
-          while (N2->graph != Circuit2->file) N2 = N2->next;
-	  Magic(newhash);
-	  N1->hashval = newhash;
-	  N2->hashval = newhash;
-	  N1 = N1->next;
-	  N2 = N2->next;
-      }
-    }
-  }
-
-  FractureElementClass(&ElementClasses); 
-  FractureNodeClass(&NodeClasses); 
-  ExhaustiveSubdivision = 1;
-  while (!Iterate() && VerifyMatching() != -1); 
-  return(VerifyMatching());
-}
-
-/*
- *-------------------------------------------------------------------------
- *
- * ResolveAutormorphisms --
- *
- * Do symmetry breaking of automorphisms.  If FastSymmetryBreaking is
- * False (not the default), then run ResolveAutomorphismsFull() (q.v.).
- * Otherwise, run the fast symmetry breaking method:
- *
- * Arbitrarily equivalence all pairs of elements and nodes within all
- * automorphic classes, and run to completion.  Note that this is a
- * fast version of ResolveAutomorphismsFull(), and can run many orders
- * of magnitude faster.  However, it can also produce an incorrect
- * result, declaring a global mismatch where none exists.  In that
- * case, the matching should be re-run with ResolveAutomorphismsFull().
- *
- * Some investigation needs to be done to determine if there is a way
- * to execute faster symmetry breaking without the possibility of
- * producing an incorrect result.
- *
- * Return value is the same as VerifyMatching()
- *
- *-------------------------------------------------------------------------
- */
-
-int ResolveAutomorphisms()
-{
-    int result;
-
-    if (FastSymmetryBreaking == 0)
-	return ResolveAutomorphismsFull();
-
-    result = ResolveElementAutomorphismsFast();
-    if (result != 0)
-	result = ResolveNodeAutomorphismsFast();
-
-    return result;
-}
-
 /*------------------------------------------------------*/
 /* PermuteSetup --					*/
 /* Add an entry to a cell's "permutes" linked list.	*/
@@ -6715,24 +6908,45 @@ struct nlist *addproxies(struct hashlist *p, void *clientdata)
        firstpin = ob;
        while (tob && (tob->type == PORT || tob->type == UNKNOWN)) {
 	  if (tob->type == UNKNOWN) {
-	     obn = (struct objlist *)CALLOC(1, sizeof(struct objlist));
-	     obn->name = (char *)MALLOC(strlen(firstpin->instance.name)
-			+ strlen(tob->name) + 2);
-	     sprintf(obn->name, "%s/%s", firstpin->instance.name, tob->name);
-	     obn->instance.name = strsave(firstpin->instance.name);
-	     obn->model.class = strsave(tc->name);
-	     obn->type = i++;
-	     obn->node = numnodes++;
-	     obn->next = ob;	// Splice into object list
-	     lob->next = obn;
-	     lob = obn;
+	     /* Do not do anything with (no pins) entries (in the reference cell) */
+	     if (strcmp(tob->name, "proxy(no pins)")) {
+		/* But if the target cell instance has proxy(no pins), then reuse
+		 * the record and modify it.
+		 */
+	        if (ob && !strcmp(ob->name, "proxy(no pins)")) {
+		   obn = ob;
+		   FREE(ob->name);
+		   obn->name = (char *)MALLOC(strlen(ob->instance.name)
+				+ strlen(tob->name) + 2);
+		   sprintf(obn->name, "%s/%s", ob->instance.name, tob->name);
+		   ob = obn->next;
+		}
+		else {
+		   obn = (struct objlist *)CALLOC(1, sizeof(struct objlist));
+		   obn->name = (char *)MALLOC(strlen(firstpin->instance.name)
+				+ strlen(tob->name) + 2);
+		   sprintf(obn->name, "%s/%s", firstpin->instance.name, tob->name);
+		   obn->instance.name = strsave(firstpin->instance.name);
+		   obn->model.class = strsave(tc->name);
+		   obn->next = ob;	// Splice into object list
+		   lob->next = obn;
+		}
+		obn->type = i++;
+		obn->node = numnodes++;
+		lob = obn;
 
-	     // Hash the new pin record for "LookupObject()"
-	     HashPtrInstall(obn->name, obn, &(ptr->objdict));
+		// Hash the new pin record for "LookupObject()"
+		HashPtrInstall(obn->name, obn, &(ptr->objdict));
 
-	     if (tob == tc->cell) {
-		// Rehash the instance in instdict
-		HashPtrInstall(firstpin->instance.name, firstpin, &(ptr->instdict));
+		if (tob == tc->cell) {
+		    // Rehash the instance in instdict
+		    HashPtrInstall(firstpin->instance.name, firstpin, &(ptr->instdict));
+		}
+	     }
+	     else {
+		lob = ob;
+		ob->type = i++;
+		ob = ob->next;
 	     }
 	  }
 	  else if (ob == NULL) {

base/netcmp.h

@@ -7,7 +7,6 @@ extern struct nlist *Circuit1;
 extern struct nlist *Circuit2;
 
 extern int ExhaustiveSubdivision;
-extern int FastSymmetryBreaking;
 
 extern int left_col_end;
 extern int right_col_end;

base/netgen.c

@@ -50,6 +50,7 @@ int NextNode;
 int Composition = NONE;
 int QuickSearch = 0;
 int GlobalParallelNone = FALSE;
+int GlobalParallelOpen = TRUE;
 
 int AddToExistingDefinition = 0;  /* default: overwrite cell when reopened */
 
@@ -1337,7 +1338,7 @@ void Node(char *name)
 	tp->name = strsave(name);
 	tp->type = NODE;  /* internal node type */
 	tp->model.class = NULL;
-	tp->instance.name = NULL;
+	tp->instance.flags = 0;
 	tp->node = -1;  /* null node */
 	tp->next = NULL;
 	AddToCurrentCell (tp);
@@ -2470,7 +2471,8 @@ void CopyProperties(struct objlist *obj_to, struct objlist *obj_from)
       kvcur->value.ival = 0;
 
       obj_to->instance.props = kvcopy;
-      obj_to->model.class = strsave(obj_from->model.class);
+      if (obj_from->model.class)
+         obj_to->model.class = strsave(obj_from->model.class);
    }
 }
 
@@ -3131,6 +3133,9 @@ int remove_group_tags(struct objlist *ob)
 /* If the device has permutable pins, then duplicate hashes are made	*/
 /* for each permutation.						*/
 /*									*/
+/* If the device has isolated (unconnected) pins, then treat them as	*/
+/* all belonging to the same net for the purpose of parallel merging.	*/
+/*									*/
 /* Return the number of devices merged.					*/
 /*----------------------------------------------------------------------*/
 
@@ -3145,6 +3150,7 @@ int CombineParallel(char *model, int file)
    size_t pcnt;
    int i, dcnt = 0, hastag;
    char *pstr, *p2str, *pptr;
+   int *nodecount;
    struct valuelist *kv;
 
    if ((tp = LookupCellFile(model, file)) == NULL) {
@@ -3154,6 +3160,20 @@ int CombineParallel(char *model, int file)
 
    InitializeHashTable(&devdict, OBJHASHSIZE);
 
+   /* Make one pass to count the number of times each node number is	*/
+   /* used.  This list indicates which pins are no-connects, so they	*/
+   /* can be treated as equivalent for the purpose of parallelization.	*/
+
+   nodecount = (int *)CALLOC((tp->nodename_cache_maxnodenum + 1), sizeof(int));
+
+   if (GlobalParallelOpen) {
+      for (ob = tp->cell; ob; ob = ob->next) {
+         if (ob->node >= 0)
+            if (ob->type != NODE)
+	       nodecount[ob->node]++;
+      }
+   }
+
    lob = NULL;
    for (ob = tp->cell; ob; ) {
       if (ob->type == FIRSTPIN) {
@@ -3200,7 +3220,14 @@ int CombineParallel(char *model, int file)
 	 pptr += pstr - (char *)2;
 	 
 	 for (ob2 = ob; ob2 && (ob2->type > FIRSTPIN || ob2 == ob); ob2 = ob2->next) {
-	    sprintf(pptr, "_%d", ob2->node);
+	    if ((ob2->node >= 0) && (nodecount[ob2->node] == 1))
+	    {
+	       nob = (tp->nodename_cache)[ob2->node];
+	       nob->instance.flags = NO_CONNECT;
+	       strcat(pptr, "_nc");
+	    }
+	    else
+	       sprintf(pptr, "_%d", ob2->node);
 	    pptr += strlen(pptr);
 	 }
 
@@ -3236,11 +3263,26 @@ int CombineParallel(char *model, int file)
 		for (ob2 = ob; ob2 && (ob2->type > FIRSTPIN || ob2 == ob);
 				ob2 = ob2->next) {
 		    if (ob2 == pob1)
-		        sprintf(pptr, "_%d", pob2->node);
+		    {
+	     		if ((pob2->node >= 0) && (nodecount[pob2->node] == 1))
+	       		   strcat(pptr, "_nc");
+			else
+		           sprintf(pptr, "_%d", pob2->node);
+		    }
 		    else if (ob2 == pob2)
-		        sprintf(pptr, "_%d", pob1->node);
+		    {
+	     		if ((pob1->node >= 0) && (nodecount[pob1->node] == 1))
+	       		   strcat(pptr, "_nc");
+			else
+		           sprintf(pptr, "_%d", pob1->node);
+		    }
 		    else
-		        sprintf(pptr, "_%d", ob2->node);
+		    {
+	     		if ((ob2->node >= 0) && (nodecount[ob2->node] == 1))
+	       		   strcat(pptr, "_nc");
+			else
+		           sprintf(pptr, "_%d", ob2->node);
+		    }
 		    pptr += strlen(pptr);
 		}
 		HashPtrInstall(p2str, ob, &devdict);
@@ -3256,7 +3298,7 @@ int CombineParallel(char *model, int file)
 	 else {
 	    /* Find parallel device "ob" and append properties of	*/
 	    /* "sob" to it.  If "ob" does not have properties, then	*/
-	    /* create a property record and set property "M" to 2.	*/
+	    /* create a property record and set property "M" to 1.	*/
 
 	    /* Find last non-property record of sob ( = pob) */
 	    /* Find first property record of sob ( = spropfirst) */
@@ -3364,6 +3406,7 @@ int CombineParallel(char *model, int file)
    if (dcnt > 0) {
       Fprintf(stdout, "Class %s:  Merged %d devices.\n", model, dcnt);
    }
+   FREE(nodecount);
    return dcnt;
 }
 
@@ -3583,18 +3626,27 @@ int CombineSeries(char *model, int file)
 
 	    /* Excise the 2nd instance.  instlist[i][1] remains as the	*/
 	    /* only pointer to it.					*/
-            for (obp = instlist[i][0]; obp->next->type > FIRSTPIN ||
-			obp->next->type == PROPERTY; obp = obp->next);
+            for (obp = instlist[i][0]; obp->next && (obp->next->type > FIRSTPIN ||
+			obp->next->type == PROPERTY); obp = obp->next);
             for (ob2 = obp; ob2 && ob2->next != instlist[i][1]; ob2 = ob2->next);
 
 	    /* Device may have been moved by the above code.  If so, look for	*/
 	    /* it from the beginning of the list. */
-	    if (ob2 == NULL)
-               for (ob2 = tp->cell; ob2->next != instlist[i][1]; ob2 = ob2->next);
-
-	    for (obs = ob2->next; obs->next && (obs->next->type > FIRSTPIN
+	    if ((ob2 == NULL) && (tp->cell == instlist[i][1]))
+	    {
+	       ob2 = tp->cell;
+	       for (obs = ob2; obs->next && (obs->next->type > FIRSTPIN
 			|| obs->next->type == PROPERTY); obs = obs->next);
-	    ob2->next = obs->next;
+	       tp->cell = obs->next;
+	    }
+	    else
+	    {
+	       if (ob2 == NULL)
+                  for (ob2 = tp->cell; ob2->next != instlist[i][1]; ob2 = ob2->next);
+	       for (obs = ob2->next; obs->next && (obs->next->type > FIRSTPIN
+			|| obs->next->type == PROPERTY); obs = obs->next);
+	       ob2->next = obs->next;
+	    }
 	    if (obs->next) obs->next = NULL;	// Terminate 2nd instance record
 
 	    /* If 1st device has unbalanced 'open' records, then add 'close'	*/

base/netgen.h

@@ -65,6 +65,15 @@ extern void AssignCircuits(char *name1, int file1, char *name2, int file2);
 /* flatten.c */
 extern int PrematchLists(char *, int, char *, int);
 
+/* verilog.c */
+struct cellstack {
+	char *cellname;
+	struct cellstack *next;
+};
+
+void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
+	int blackbox);
+
 /* Define (enumerate) various device classes, largely based on SPICE	*/
 /* model types, mixed with some ext/sim types.				*/
 
@@ -140,6 +149,7 @@ extern int NoOutput;      /* set this to 1 to disable stdout output */
 extern int Composition;	  /* direction of composition */
 extern int UnixWildcards; /* TRUE if *,?,{},[] only; false if full REGEXP */
 extern int GlobalParallelNone;	/* If TRUE, don't parallel combine any cells */
+extern int GlobalParallelOpen;	/* If TRUE, parallel combine cells w/no-connects */
 /* magic internal flag to restrict searches to recently placed cells */
 extern int QuickSearch;
 /* does re"CellDef"ing a cell add to it or overwrite it??? */

base/objlist.c

@@ -975,7 +975,10 @@ struct objlist *CopyObjList(struct objlist *oldlist, unsigned char doforall)
           newob->model.class = NULL;
        else
           newob->model.class = strsave(tmp->model.class);
-       newob->instance.name = (tmp->instance.name) ?
+       if (newob->type == NODE)
+	  newob->instance.flags = tmp->instance.flags;
+       else
+          newob->instance.name = (tmp->instance.name) ?
 		strsave(tmp->instance.name) : NULL;
     }
     newob->node = tmp->node;
@@ -1095,8 +1098,8 @@ void FreeObject(struct objlist *ob)
 	FREE(ob->instance.props);
      }
   }
-  else {
-     /* All other records */
+  else if (ob->type != NODE) {
+     /* All other records except NODE, which uses this for flags */
      if (ob->instance.name != NULL) FreeString(ob->instance.name);
   }
   if (ob->model.class != NULL) FreeString(ob->model.class);

base/objlist.h

@@ -28,6 +28,8 @@
 
 #define PROXY (0)		/* Used in model.port record of ports */
 
+#define NO_CONNECT	1	/* Use in object list to flag an isolated net */
+
 /* Lists of device properties.  Order is defined at the time of	*/
 /* the cell definition; values are sorted at the time instances	*/
 /* are read.							*/
@@ -160,6 +162,7 @@ struct objlist {
   union {
      char *name;		/* unique name for the instance, or */
 				/* (string) value of property for properties */
+     int  flags;		/* Used by NODE type to flag isolated net */
      struct valuelist *props;	/* Property record */
   } instance;
   int node;		/* the electrical node number of the port/node/pin */
@@ -192,9 +195,8 @@ struct Permutation {
     struct Permutation *next;
 };
 
-#define OBJHASHSIZE 997 /* the size of the object and instance hash lists */
+#define OBJHASHSIZE 42073 /* the size of the object and instance hash lists */
                         /* prime numbers are good choices as hash sizes */
-                        /* 101 is a good number for IBMPC */
 
 /* cell definition for hash table */
 /* NOTE: "file" must come first for the hash matching by name and file */

base/spice.c

@@ -473,15 +473,6 @@ void CleanupSubcell() {
       SetClass(CLASS_MODULE);
 }
 
-/*------------------------------------------------------*/
-/* Structure for stacking nested subcircuit definitions */
-/*------------------------------------------------------*/
-
-struct cellstack {
-   char *cellname;
-   struct cellstack *next;
-};
-
 /*------------------------------------------------------*/
 /* Push a subcircuit name onto the stack		*/
 /*------------------------------------------------------*/
@@ -874,6 +865,17 @@ skip_ends:
       }
     }
 
+    /* Ignore anything in a .CONTROL ... .ENDC block */
+    else if (matchnocase(nexttok, ".CONTROL")) {
+	while (1) {
+	    SpiceSkipNewLine();
+	    SkipTok(NULL);
+	    if (EndParseFile()) break;
+	    if (matchnocase(nexttok, ".ENDC"))
+	       break;
+	}
+    }
+
     // Blackbox (library) mode---parse only subcircuits and models;
     // ignore all components.
 
@@ -1184,7 +1186,7 @@ skip_ends:
            else if (CountPorts(model, filenum) != 2) {
 	      /* Modeled device:  Make sure it has the right number of ports */
 	      Fprintf(stderr, "Device \"%s\" has wrong number of ports for a "
-			"resistor.\n");
+			"resistor.\n", model);
 	      goto baddevice;
            }
 	   usemodel = 1;

base/verilog.c

@@ -553,9 +553,43 @@ void CleanupModule() {
    int maxnode = 0;
    int has_submodules = FALSE;
    struct objlist *sobj, *nobj, *lobj, *pobj;
+   struct objlist *myLastPort, *object_it, *myNextObject;
 
    if (CurrentCell == NULL) return;
 
+   myLastPort = NULL;
+
+   /* Reorder objects so that all ports come first, before nodes, because
+    * parts of the code depend on it.
+    */
+
+   for (object_it = CurrentCell->cell; object_it && object_it->type <= 0;
+		object_it = myNextObject ) {
+
+       myNextObject = object_it->next;
+       if (!myNextObject)	// end of list
+           continue;
+
+       if (myLastPort == NULL) {
+           if (object_it->type == PORT) {
+               myLastPort = object_it;	    // port at begining of list
+               myNextObject = object_it;    // otherwise skips one
+           }
+           else if (myNextObject->type == PORT) {
+               object_it->next = myNextObject->next;
+               myNextObject->next = CurrentCell->cell;
+               CurrentCell->cell = myNextObject;
+               myLastPort = myNextObject;
+           }
+       }
+       else if (myNextObject->type == PORT) {
+	   object_it->next = myNextObject->next;
+	   myNextObject->next = myLastPort->next;
+	   myLastPort->next = myNextObject;
+	   myLastPort = myNextObject;
+       }
+   }
+
    for (sobj = CurrentCell->cell; sobj; sobj = sobj->next)
       if (sobj->node > maxnode)
 	 maxnode = sobj->node + 1;
@@ -598,11 +632,6 @@ void CleanupModule() {
 /* Structure for stacking nested module definitions	*/
 /*------------------------------------------------------*/
 
-struct cellstack {
-   char *cellname;
-   struct cellstack *next;
-};
-
 /* Forward declarations */
 extern void IncludeVerilog(char *, int, struct cellstack **, int);
 
@@ -1946,7 +1975,9 @@ nextinst:
 		  sprintf(localnet, "_noconnect_%d_", localcount++);
 		  Node(localnet);
 		  join(localnet, obptr->name);
-		  Fprintf(stderr, "Note:  Implicit pin %s\n", obpinname);
+		  Fprintf(stderr,
+			 "Note:  Implicit pin %s in instance %s of %s in cell %s\n",
+			 obpinname, locinst, modulename, CurrentCell->name);
 	       }
 	       else if (GetBus(scan->net, &wb) == 0) {
 		   char *bptr2;

tcltk/netgen.sh

@@ -1,60 +0,0 @@
-#!/bin/bash
-#
-# For installation, put this file (netgen.sh) in a standard executable path.
-# Put startup script "netgen.tcl" and shared library "tclnetgen.so"
-# in ${CAD_ROOT}/netgen/tcl/, with a symbolic link from file
-# ".wishrc" to "netgen.tcl".
-#
-# This script starts irsim under the Tcl interpreter,
-# reading commands from a special .wishrc script which
-# launches irsim and retains the Tcl interactive interpreter.
-
-# Parse for the argument "-c[onsole]".  If it exists, run netgen
-# with the TkCon console.  Strip this argument from the argument list.
-
-TKCON=true
-BATCH=
-GUI=
-NETGEN_WISH=/usr/bin/wish
-export NETGEN_WISH
-
-# Hacks for Cygwin
-if [ ${TERM:=""} = "cygwin" ]; then
-   export PATH="$PATH:/usr/lib"
-   export DISPLAY=${DISPLAY:=":0"}
-fi
-
-# Preserve quotes in arguments (thanks, Stackoverflow!)
-arglist=''
-for i in "$@" ; do
-   case $i in
-      -noc*) TKCON=;;
-      -bat*) BATCH=true; TKCON=;;
-      -gui) GUI=true; TKCON=;;
-      *) arglist="$arglist${arglist:+ }\"${i//\"/\\\"}\"";;
-   esac
-done 
-
-if [ $TKCON ]; then
-
-   exec /usr/local/lib/netgen/tcl/tkcon.tcl \
-	-eval "source /usr/local/lib/netgen/tcl/console.tcl" \
-	-slave "package require Tk; set argc $#; set argv [list $arglist]; \
-	source /usr/local/lib/netgen/tcl/netgen.tcl"
-
-# Run the Python LVS manager GUI
-
-elif [ $GUI ]; then
-    exec /usr/local/lib/netgen/python/lvs_manager.py $@
-
-#
-# Run the stand-in for wish (netgenexec), which acts exactly like "wish"
-# except that it replaces ~/.wishrc with netgen.tcl.  This executable is
-# *only* needed when running without the console; the console itself is
-# capable of sourcing the startup script.
-#
-
-else
-   exec /usr/local/lib/netgen/tcl/netgenexec -- "$@"
-
-fi

tcltk/netgen.tcl

@@ -1,753 +0,0 @@
-# Wishrc startup for ToolScript (netgen)
-#
-# For installation:  Put this file and also tclnetgen.so into
-# directory ${CAD_ROOT}/netgen/tcl/, and set the "load" line below
-# to point to the location of tclnetgen.so.  Also see comments
-# in shell script "netgen.sh".
-#
-
-# Check namespaces for existence of other applications
-set UsingMagic 0
-set UsingXCircuit 0
-set UsingIRSIM 0
-set batchmode 0
-set nlist [namespace children]
-foreach i $nlist {
-   switch $i {
-      ::magic { set UsingMagic 1 }
-      ::xcircuit { set UsingXCircuit 1 }
-      ::irsim { set UsingIRSIM 1 }
-   }
-}
-
-# -lazy option not needed if stubs libraries are handled correctly
-# load -lazy /usr/local/lib/netgen/tcl/tclnetgen.so
-
-load /usr/local/lib/netgen/tcl/tclnetgen.so
-
-#----------------------------------------------------------------
-# Convert LVS list result into a JSON file 
-#----------------------------------------------------------------
-
-proc netgen::convert_to_json {filename lvs_final} {
-   set pidx [string last . $filename]
-   set jsonname [string replace $filename $pidx end ".json"]
-   if {![catch {open $jsonname w} fjson]} {
-      puts $fjson "\["
-      # Outer list is of each cell compared
-      set clen [llength $lvs_final]
-      set cidx 0
-      foreach circuit $lvs_final {
-         incr cidx
-         puts $fjson "  \{"
-         set nkeys [llength $circuit]
-         set kidx 0
-	 foreach {key value} $circuit {
-            incr kidx 2
-	    switch $key {
-	       name {
-	          puts $fjson "   \"${key}\": \["
-		  set cktval [lindex $value 0]
-		  puts $fjson "      \"${cktval}\","
-		  set cktval [lindex $value 1]
-		  puts $fjson "      \"${cktval}\""
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       pins {
-	          puts $fjson "   \"${key}\": \["
-	          puts $fjson "      \["
-		  set cktval [lindex $value 0]
-		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
-		  }
-		  set pin [lindex $cktval end]
-		  puts $fjson "        \"$pin\""
-	          puts $fjson "      \], \["
-		  set cktval [lindex $value 1]
-		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
-		  }
-		  set pin [lindex $cktval end]
-		  puts $fjson "        \"$pin\""
-	          puts $fjson "      \]"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-               nets {
-	          puts $fjson "   \"${key}\": \["
-		  set cktval [lindex $value 0]
-		  puts $fjson "    $cktval,"
-		  set cktval [lindex $value 1]
-		  puts $fjson "    $cktval"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-               }
-	       devices {
-	          puts $fjson "   \"${key}\": \["
-	          puts $fjson "       \["
-		  set cktval [lindex $value 0]
-		  foreach dev [lrange $cktval 0 end-1] {
-		     set devname [lindex $dev 0]
-		     set devnum  [lindex $dev 1]
-		     puts $fjson "         \[\"${devname}\", ${devnum}\],"
-		  }
-		  set dev [lindex $cktval end]
-		  set devname [lindex $dev 0]
-		  set devnum  [lindex $dev 1]
-		  puts $fjson "         \[\"${devname}\", ${devnum} \]"
-	          puts $fjson "       \], \["
-		  set cktval [lindex $value 1]
-		  foreach dev [lrange $cktval 0 end-1] {
-		     set devname [lindex $dev 0]
-		     set devnum  [lindex $dev 1]
-		     puts $fjson "         \[\"${devname}\", ${devnum} \],"
-		  }
-		  set dev [lindex $cktval end]
-		  set devname [lindex $dev 0]
-		  set devnum  [lindex $dev 1]
-		  puts $fjson "         \[\"${devname}\", ${devnum} \]"
-	          puts $fjson "       \]"
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       goodnets -
-	       badnets {
-	          puts $fjson "   \"${key}\": \["
-		  set glen [llength $value]
-		  set gidx 0
-		  foreach group $value {
-		     incr gidx
-	             puts $fjson "      \["
-	             puts $fjson "        \["
-		     set cktval [lindex $group 0]
-		     set nlen [llength $cktval]
-		     set nidx 0
-		     foreach net $cktval {
-			incr nidx
-	                puts $fjson "          \["
-			set netname [string map {"\\" "\\\\"} [lindex $net 0]]
-		        puts $fjson "            \"$netname\","
-		        puts $fjson "            \["
-			set netconn [lindex $net 1]
-			foreach fanout [lrange $netconn 0 end-1] {
-			   set devname [lindex $fanout 0]
-			   set pinname [lindex $fanout 1]
-			   set count [lindex $fanout 2]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$devname\", \"$pinname\", $count \],"
-			}
-			set fanout [lindex $netconn end]
-			set devname [lindex $fanout 0]
-			set pinname [lindex $fanout 1]
-			set count [lindex $fanout 2]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$devname\", \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$nidx == $nlen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \], \["
-		     set cktval [lindex $group 1]
-		     set nlen [llength $cktval]
-		     set nidx 0
-		     foreach net $cktval {
-			incr nidx
-	                puts $fjson "          \["
-			set netname [string map {"\\" "\\\\"} [lindex $net 0]]
-		        puts $fjson "            \"$netname\","
-		        puts $fjson "            \["
-			set netconn [lindex $net 1]
-			foreach fanout [lrange $netconn 0 end-1] {
-			   set devname [lindex $fanout 0]
-			   set pinname [lindex $fanout 1]
-			   set count [lindex $fanout 2]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$devname\", \"$pinname\", $count \],"
-			}
-			set fanout [lindex $netconn end]
-			set devname [lindex $fanout 0]
-			set pinname [lindex $fanout 1]
-			set count [lindex $fanout 2]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$devname\", \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$nidx == $nlen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \]"
-		     if {$gidx == $glen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       goodelements -
-	       badelements {
-	          puts $fjson "   \"${key}\": \["
-		  set glen [llength $value]
-		  set gidx 0
-		  foreach group $value {
-		     incr gidx
-	             puts $fjson "      \["
-	             puts $fjson "        \["
-		     set cktval [lindex $group 0]
-		     set ilen [llength $cktval]
-		     set iidx 0
-		     foreach inst $cktval {
-			incr iidx
-	                puts $fjson "          \["
-			set instname [string map {"\\" "\\\\"} [lindex $inst 0]]
-		        puts $fjson "            \"$instname\","
-		        puts $fjson "            \["
-			set instpins [lindex $inst 1]
-			foreach fanout [lrange $instpins 0 end-1] {
-			   set pinname [lindex $fanout 0]
-			   set count [lindex $fanout 1]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$pinname\", $count \],"
-			}
-			set fanout [lindex $instpins end]
-			set pinname [lindex $fanout 0]
-			set count [lindex $fanout 1]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$iidx == $ilen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \], \["
-		     set cktval [lindex $group 1]
-		     set ilen [llength $cktval]
-		     set iidx 0
-		     foreach inst $cktval {
-			incr iidx
-	                puts $fjson "          \["
-			set instname [string map {"\\" "\\\\"} [lindex $inst 0]]
-		        puts $fjson "            \"$instname\","
-		        puts $fjson "            \["
-			set instpins [lindex $inst 1]
-			foreach fanout [lrange $instpins 0 end-1] {
-			   set pinname [lindex $fanout 0]
-			   set count [lindex $fanout 1]
-			   if {$count == {}} {set count 0}
-		           puts $fjson "              \[ \"$pinname\", $count \],"
-			}
-			set fanout [lindex $instpins end]
-			set pinname [lindex $fanout 0]
-			set count [lindex $fanout 1]
-			if {$count == {}} {set count 0}
-		        puts $fjson "              \[ \"$pinname\", $count \]"
-		        puts $fjson "            \]"
-			if {$iidx == $ilen} {
-	                   puts $fjson "          \]"
-			} else {
-	                   puts $fjson "          \],"
-			}
-		     }
-	             puts $fjson "        \]"
-		     if {$gidx == $glen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	       properties {
-	          puts $fjson "   \"${key}\": \["
-		  set plen [llength $value]
-                  set pidx 0
-		  foreach instance $value {
-		     incr pidx
-	             puts $fjson "      \["
-		     set instnames [string map {"\\" "\\\\"} [lindex $instance 0]]
-		     set instname0 [string map {"\\" "\\\\"} [lindex $instnames 0]]
-	             puts $fjson "         \["
-		     puts $fjson "           \"${instname0}\","
-	             puts $fjson "           \["
-		     foreach property [lrange $instance 1 end-1] {
-		        set prop0 [lindex $property 0]
-			set propname [lindex $prop0 0]
-			set propval [lindex $prop0 1]
-		        puts $fjson "             \[\"${propname}\", \"${propval}\"\],"
-		     }
-		     set property [lindex $instance end]
-		     set prop0 [lindex $property 0]
-		     set propname [lindex $prop0 0]
-		     set propval [lindex $prop0 1]
-		     puts $fjson "             \[\"${propname}\", \"${propval}\"\]"
-	             puts $fjson "           \]"
-	             puts $fjson "         \],"
-		     set instname1 [string map {"\\" "\\\\"} [lindex $instnames 1]]
-	             puts $fjson "         \["
-		     puts $fjson "           \"${instname1}\","
-	             puts $fjson "           \["
-		     foreach property [lrange $instance 1 end-1] {
-		        set prop1 [lindex $property 1]
-			set propname [lindex $prop1 0]
-			set propval [lindex $prop1 1]
-		        puts $fjson "             \[\"${propname}\", \"${propval}\"\],"
-		     }
-		     set property [lindex $instance end]
-		     set prop1 [lindex $property 1]
-		     set propname [lindex $prop1 0]
-		     set propval [lindex $prop1 1]
-		     puts $fjson "             \[\"${propname}\", \"${propval}\"\]"
-	             puts $fjson "           \]"
-	             puts $fjson "         \]"
-		     if {$pidx == $plen} {
-	                puts $fjson "      \]"
-		     } else {
-	                puts $fjson "      \],"
-		     }
-		  }
-		  if {$kidx == $nkeys} {
-		     puts $fjson "   \]"
-		  } else {
-		     puts $fjson "   \],"
-		  }
-	       }
-	    }
-	 }
-         if {$cidx == $clen} {
-            puts $fjson "  \}"
-	 } else {
-            puts $fjson "  \},"
-	 }
-      }
-      puts $fjson "\]"
-   }
-   close $fjson
-}
-
-#----------------------------------------------------------------
-# Define the "lvs" command as a way of calling the netgen options
-# for standard compare, essentially the same as the old "netcomp"
-# standalone program.
-#
-# Use the "canonical" command to parse the file and cell names,
-# although if the cells have not been read in yet, then the
-# original syntax of filename or {filename cellname} is required.
-#
-# "args" is passed to verify and may therefore contain only the
-# value "-list" or nothing.  If "-list", then output is returned
-# as a nested list.
-#----------------------------------------------------------------
-
-proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
-   set dolist 0
-   set dojson 0
-   foreach arg $args {
-      if {$arg == "-list"} {
-	 puts stdout "Generating list result"
-	 set dolist 1
-	 set lvs_final {}
-      } elseif {$arg == "-json"} {
-	 puts stdout "Generating JSON file result"
-	 set dolist 1
-	 set dojson 1
-	 set lvs_final {}
-      } elseif {$arg == "-blackbox"} {
-	 puts stdout "Treating empty subcircuits as black-box cells"
-	 netgen::model blackbox on
-      } elseif {$arg == "-full"} {
-	 puts stdout "Using full symmetry breaking method"
-	 netgen::symmetry full
-      }
-   }
-
-   # Allow name1 or name2 to be a list of {filename cellname},
-   # A single <filename>, or any valid_cellname form if the
-   # file has already been read.
-
-   if {[catch {set flist1 [canonical $name1]}]} {
-      if {[llength $name1] == 2} {
-         set file1 [lindex $name1 0]
-         set cell1 [lindex $name1 1]
-      } else {
-         set file1 $name1
-         set cell1 $name1
-      }
-      puts stdout "Reading netlist file $file1"
-      set fnum1 [netgen::readnet $file1]
-   } else {
-      set cell1 [lindex $flist1 0]
-      set fnum1 [lindex $flist1 1]
-      set flist1 [canonical $fnum1]
-      set file1 [lindex $flist1 0]
-   }
-
-   if {[catch {set flist2 [canonical $name2]}]} {
-      if {[llength $name2] == 2} {
-         set file2 [lindex $name2 0]
-         set cell2 [lindex $name2 1]
-      } else {
-         set file2 $name2
-         set cell2 $name2
-      }
-      puts stdout "Reading netlist file $file2"
-      set fnum2 [netgen::readnet $file2]
-   } else {
-      set cell2 [lindex $flist2 0]
-      set fnum2 [lindex $flist2 1]
-      set flist2 [canonical $fnum2]
-      set file2 [lindex $flist2 0]
-   }
-
-   if {$fnum1 == $fnum2} {
-      puts stderr "Both cells are in the same netlist:  Cannot compare!"
-      return
-   }
-
-   set clist1 [cells list $fnum1]
-   set cidx [lsearch -regexp $clist1 ^$cell1$]
-   if {$cidx < 0} {
-      puts stderr "Cannot find cell $cell1 in file $file1"
-      return
-   } else {
-      set cell1 [lindex $clist1 $cidx]
-   }
-   set clist2 [cells list $fnum2]
-   set cidx [lsearch -regexp $clist2 ^$cell2$]
-   if {$cidx < 0} {
-      puts stderr "Cannot find cell $cell2 in file $file2"
-      return
-   } else {
-      set cell2 [lindex $clist2 $cidx]
-   }
-
-   netgen::compare assign "$fnum1 $cell1" "$fnum2 $cell2"
-
-   if {[file exists $setupfile]} {
-      puts stdout "Reading setup file $setupfile"
-      # Instead of sourcing the setup file, run each line so we can
-      # catch individual errors and not let them halt the LVS process
-      set perrors 0
-      if {![catch {open $setupfile r} fsetup]} {
-	 set sline 0
-	 set command {}
-	 while {[gets $fsetup line] >= 0} {
-	    incr sline
-	    append command $line "\n"
-	    if {[info complete $command]} {
-	       if {[catch {uplevel 1 [list namespace eval netgen $command]} msg]} {
-		  set msg [string trimright $msg "\n"]
-		  puts stderr "Error $setupfile:$sline (ignoring), $msg"
-		  incr perrors
-	       }
-	       set command {}
-	    }
-	 }
-	 close $fsetup
-      } else {
-	 puts stdout "Error:  Cannot read the setup file $setupfile"
-      }
-	
-      if {$perrors > 0} {
-	 puts stdout "Warning:  There were errors reading the setup file"
-      }
-   } elseif {[string first nosetup $setupfile] < 0} {
-      netgen::permute default	;# transistors and resistors
-      netgen::property default
-   }
-
-   if {[string first nolog $logfile] < 0} {
-      puts stdout "Comparison output logged to file $logfile"
-      netgen::log file $logfile
-
-      netgen::log start
-      netgen::log echo off
-      set dolog true
-   } else {
-      set dolog false
-   }
-
-   if {$dolist == 1} {
-      set endval [netgen::compare -list hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
-   } else {
-      set endval [netgen::compare hierarchical "$fnum1 $cell1" "$fnum2 $cell2"]
-   }
-   if {$endval == {}} {
-      netgen::log put "No cells in queue!\n"
-      return
-   }
-   set properr {}
-   set pinsgood 0
-   while {$endval != {}} {
-      if {$dolist == 1} {
-         netgen::run -list converge
-      } else {
-         netgen::run converge
-      }
-      netgen::log echo on
-      if {[verify equivalent]} {
-	 # Resolve automorphisms by pin and property
-	 if {$dolist == 1} {
-            netgen::run -list resolve
-	 } else {
-            netgen::run resolve
-	 }
-	 set uresult [verify unique]
-         if {$uresult == 0} {
-	    netgen::log put "   Networks match locally but not globally.\n"
-	    netgen::log put "   Probably connections are swapped.\n"
-	    netgen::log put "   Check the end of logfile ${logfile} for implicated nodes.\n"
-	    if {$dolist == 1} {
-	       verify -list nodes
-	    } else {
-	       verify nodes
-	    }
-
-	    # Flatten the non-matching subcircuit (but not the top-level cells)
-            if {[netgen::print queue] != {}} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
-	       netgen::flatten class "[lindex $endval 0] $fnum1"
-	       netgen::flatten class "[lindex $endval 1] $fnum2"
-	    }
-	 } else {
-	    # Match pins
-            netgen::log echo off
-	    if {$dolist == 1} {
-		set result [equate -list pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    } else {
-		set result [equate pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    }
-	    if {$result != 0} {
-		equate classes "$fnum1 [lindex $endval 0]" \
-			 "$fnum2 [lindex $endval 1]"
-	    }
-	    set pinsgood $result
-            netgen::log echo on
-	 }
-	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
-      } else {
-	 # Flatten the non-matching subcircuit (but not the top-level cells)
-         if {[netgen::print queue] != {}} {
-	    netgen::log put "  Flattening non-matched subcircuits $endval"
-	    netgen::flatten class "[lindex $endval 0] $fnum1"
-	    netgen::flatten class "[lindex $endval 1] $fnum2"
-	 }
-      }
-      netgen::log echo off
-      if {$dolist == 1} {
-         catch {lappend lvs_final $lvs_out}
-         set lvs_out {}
-         set endval [netgen::compare -list hierarchical]
-      } else {
-         set endval [netgen::compare hierarchical]
-      }
-   }
-   netgen::log echo off
-   puts stdout "Result: " nonewline
-   netgen::log echo on
-   if {$pinsgood == 0} {
-      netgen::log put "The top level cell failed pin matching.\n"
-   } else {
-      verify only
-   }
-   if {$properr != {}} {
-      netgen::log put "The following cells had property errors: $properr\n"
-   }
-   if {$dolog} {
-      netgen::log end
-   }
-   puts stdout "LVS Done."
-   if {$dojson == 1} {
-      netgen::convert_to_json $logfile $lvs_final
-   } elseif {$dolist == 1} {
-      return $lvs_final
-   }
-}
-
-# It is important to make sure no netgen commands overlap with Tcl built-in
-# commands, because otherwise the namespace import will fail.
-
-proc pushnamespace { name } {
-
-   set y [namespace eval ${name} info commands ::${name}::*]
-   set z [info commands]
-
-   foreach v $y {
-      regsub -all {\*} $v {\\*} i
-      set x [namespace tail $i]
-      if {[lsearch $z $x] < 0} {
-         namespace import $i
-      } else {
-            puts "Warning: ${name} command '$x' use fully-qualified name '$v'"
-      }
-   }
-}
-
-proc popnamespace { name } {
-   set z [info commands]
-   set l [expr [string length ${name}] + 5]
-
-   while {[set v [lsearch $z ${name}_tcl_*]] >= 0} {
-      set y [lindex $z $v]
-      set w [string range $y $l end]
-      interp alias {} ::$w {}
-      rename ::$y ::$w
-      puts "Info: replacing ::$w with ::$y"
-   }
-   namespace forget ::${name}::*
-}
-
-set auto_noexec 1       ;# don't EVER call UNIX commands w/o "shell" in front
-
-#----------------------------------------------------------------------
-# Cross-Application section
-#----------------------------------------------------------------------
-
-# Setup IRSIM assuming that the Tcl version is installed.
-# We do not need to rename procedure irsim to NULL because it is
-# redefined in a script, which simply overwrites the original.
-
-proc irsim { args } {
-   global CAD_ROOT
-   set irsimscript [glob -nocomplain ${CAD_ROOT}/irsim/tcl/irsim.tcl]
-   if { ${irsimscript} == {} } {
-      puts stderr "\"irsim\" requires Tcl-based IRSIM version 9.6 or newer."
-      puts stderr "Could not find script \"irsim.tcl\".  If IRSIM is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/irsim.tcl\" before doing \"irsim\"."
-   } else {
-      source $irsimscript
-      eval {irsim} $args
-   }
-}
-
-# Setup Xcircuit assuming that the Tcl version is installed.
-
-proc xcircuit { args } {
-   global CAD_ROOT
-   global argc
-   global argv
-   set xcircscript [glob -nocomplain ${CAD_ROOT}/xcircuit*/xcircuit.tcl]
-   if { ${xcircscript} == {} } {
-      puts stderr "\"xcircuit\" requires Tcl-based XCircuit version 3.1 or newer."
-      puts stderr "Could not find script \"xcircuit.tcl\".  If XCircuit is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/xcircuit.tcl\"."
-   } else {
-      # if there are multiple installed versions, choose the highest version.
-      if {[llength $xcircscript] > 1} {
-        set xcircscript [lindex [lsort -decreasing -dictionary $xcircscript] 0]
-      }
-      set argv $args
-      set argc [llength $args]
-      uplevel #0 source $xcircscript
-   }
-}
-
-# Setup Magic assuming that the Tcl version is installed.
-
-proc magic { args } {
-   global CAD_ROOT
-   global argc
-   global argv
-   set magicscript [glob -nocomplain ${CAD_ROOT}/magic/tcl/magic.tcl]
-   if { ${magicscript} == {} } {
-      puts stderr "\"magic\" requires Tcl-based Magic version 7.2 or newer."
-      puts stderr "Could not find script \"magic.tcl\".  If Magic is installed in a"
-      puts stderr "place other than CAD_ROOT (=${CAD_ROOT}), use the command"
-      puts stderr "\"source <path>/magic.tcl\"."
-   } else {
-      set argv $args
-      set argc [llength $args]
-      uplevel #0 source $magicscript
-   }
-}
-
-#----------------------------------------------------------------------------
-# Have we called netgen from tkcon or a clone thereof?  If so, set NetgenConsole
-#----------------------------------------------------------------------------
-
-if {! $UsingMagic } {
-   if {[lsearch [interp aliases] tkcon] != -1} {
-      set NetgenConsole tkcon
-      wm withdraw .
-   }
-}
-
-pushnamespace netgen
-
-#----------------------------------------------------------------------------
-# For now, if we are standalone, pop down the default Tk window.
-# Sometime later we may wish to provide a standalone GUI frontend in Tk
-# to improve upon the original X11 "xnetgen" frontend.  If so, its
-# definitions would go below.
-
-if {! $UsingMagic } {
-   if {[lsearch [interp aliases] tkcon] != -1} {
-      if {[string range [wm title .] 0 3] == "wish"} {
-	 wm withdraw .
-      }
-   }
-}
-
-#----------------------------------------------------------------------------
-# No-console mode drops "--" in front of the argument list and "-noc"
-# is retained, so remove them.  Internally, the console will be determined
-# by checking for a slave interpreter, so there is no need for any
-# action here other than removing the argument.
-
-if {[lindex $argv 0] == "--"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-}
-
-if {[string range [lindex $argv 0] 0 3] == "-noc"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-}
-
-if {[string range [lindex $argv 0] 0 3] == "-bat"} {
-   incr argc -1
-   set argv [lrange $argv 1 end]
-   set batchmode 1
-}
-
-#----------------------------------------------------------------------------
-# Anything on the command line is assumed to be a netgen command to evaluate
-
-if {[catch {eval $argv}]} {
-   puts stdout "$errorInfo"
-}
-if {$batchmode == 1} {quit}
-
-#----------------------------------------------------------------------------
-# Netgen start function drops back to interpreter after initialization & setup

tcltk/netgen.tcl.in

@@ -352,7 +352,7 @@ proc netgen::convert_to_json {filename lvs_final} {
    close $fjson
 }
 
-#----------------------------------------------------------------
+#-----------------------------------------------------------------------
 # Define the "lvs" command as a way of calling the netgen options
 # for standard compare, essentially the same as the old "netcomp"
 # standalone program.
@@ -361,14 +361,20 @@ proc netgen::convert_to_json {filename lvs_final} {
 # although if the cells have not been read in yet, then the
 # original syntax of filename or {filename cellname} is required.
 #
-# "args" is passed to verify and may therefore contain only the
-# value "-list" or nothing.  If "-list", then output is returned
-# as a nested list.
-#----------------------------------------------------------------
+# "args" may be "-list", "-json", or "-blackbox".
+#    "-list" returns output as a nested list.
+#    "-json" creates a .json-format output file in addition to stdout.
+#    "-blackbox" treats empty cells as black-box entries.
+#    "-noflatten={list}" is a list of cells not to flatten if mismatched.
+#    i.e., the cells are expected to match and any mismatch cannot be
+#    expected to be resolved by flattening the contents of the mismatched
+#    cells.
+#-----------------------------------------------------------------------
 
 proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
    set dolist 0
    set dojson 0
+   set noflat {}
    foreach arg $args {
       if {$arg == "-list"} {
 	 puts stdout "Generating list result"
@@ -382,9 +388,30 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       } elseif {$arg == "-blackbox"} {
 	 puts stdout "Treating empty subcircuits as black-box cells"
 	 netgen::model blackbox on
-      } elseif {$arg == "-full"} {
-	 puts stdout "Using full symmetry breaking method"
-	 netgen::symmetry full
+      } elseif {[string first "-noflatten=" $arg] == 0} {
+	 set value [string range $arg 11 end]
+	 # If argument is a filename then read the list of cells from it;
+	 # otherwise, argument is the list of files itself in quotes or
+	 # braces.
+	 if {![catch {file exists $value}]} {
+	    if {![catch {open $value r} fnf]} {
+	       while {[gets $fnf line] >= 0} {
+		  if {[lindex $line 0] != "#"} {
+		     foreach cell $line {
+		    	lappend noflat $cell
+		     }
+		  }
+	       }
+	       close $fnf
+	    } else {
+	       puts stderr "Cannot open file $value for reading cell list."
+	    }
+	 } else {
+	    set noflat [string trim $value \"\{\}]
+	 }
+	 if {[llength $noflat] > 0} {
+	    puts stdout "Will not flatten these subcells: $noflat"
+	 }
       }
    }
 
@@ -504,6 +531,7 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       return
    }
    set properr {}
+   set matcherr {}
    set pinsgood 0
    while {$endval != {}} {
       if {$dolist == 1} {
@@ -532,9 +560,30 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
 
 	    # Flatten the non-matching subcircuit (but not the top-level cells)
             if {[netgen::print queue] != {}} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
-	       netgen::flatten class "[lindex $endval 0] $fnum1"
-	       netgen::flatten class "[lindex $endval 1] $fnum2"
+	       if {([lsearch $noflat [lindex $endval 0]] == -1) &&
+			([lsearch $noflat [lindex $endval 1]] == -1)} {
+	           netgen::log put "  Flattening non-matched subcircuits $endval"
+	           netgen::flatten class "[lindex $endval 0] $fnum1"
+	           netgen::flatten class "[lindex $endval 1] $fnum2"
+	       } else {
+	           netgen::log put "  Continuing with black-boxed subcircuits $endval"
+		   lappend matcherr [lindex $endval 0]
+	           # Match pins
+                   netgen::log echo off
+	           if {$dolist == 1} {
+		       set result [equate -list -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	           } else {
+		       set result [equate -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	           }
+	           if {$result != 0} {
+		       equate classes "$fnum1 [lindex $endval 0]" \
+			        "$fnum2 [lindex $endval 1]"
+	           }
+	           set pinsgood $result
+                   netgen::log echo on
+	       }
 	    }
 	 } else {
 	    # Match pins
@@ -557,9 +606,32 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       } else {
 	 # Flatten the non-matching subcircuit (but not the top-level cells)
          if {[netgen::print queue] != {}} {
-	    netgen::log put "  Flattening non-matched subcircuits $endval"
-	    netgen::flatten class "[lindex $endval 0] $fnum1"
-	    netgen::flatten class "[lindex $endval 1] $fnum2"
+	    if {([lsearch $noflat [lindex $endval 1]] == -1) &&
+		    ([lsearch $noflat [lindex $endval 1]] == -1)} {
+	       netgen::log put "  Flattening non-matched subcircuits $endval"
+	       netgen::flatten class "[lindex $endval 0] $fnum1"
+	       netgen::flatten class "[lindex $endval 1] $fnum2"
+	    } else {
+	       netgen::log put "  Continuing with black-boxed subcircuits $endval"
+	       lappend matcherr [lindex $endval 0]
+	       netgen::log put "  Continuing with black-boxed subcircuits $endval"
+	       lappend matcherr [lindex $endval 0]
+	       # Match pins
+               netgen::log echo off
+	       if {$dolist == 1} {
+		   set result [equate -list -force pins "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"]
+	       } else {
+		   set result [equate -force pins "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"]
+	       }
+	       if {$result != 0} {
+		   equate classes "$fnum1 [lindex $endval 0]" \
+			    "$fnum2 [lindex $endval 1]"
+	       }
+	       set pinsgood $result
+               netgen::log echo on
+	    }
 	 }
       }
       netgen::log echo off
@@ -582,6 +654,9 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
    if {$properr != {}} {
       netgen::log put "The following cells had property errors: $properr\n"
    }
+   if {$matcherr != {}} {
+      netgen::log put "The following subcells failed to match: $matcherr\n"
+   }
    if {$dolog} {
       netgen::log end
    }

tcltk/tclnetgen.c

@@ -246,8 +246,7 @@ Command netcmp_cmds[] = {
 		"\n   "
 		"toggle exhaustive subdivision"},
 	{"symmetry",		_netcmp_symmetry,
-		"[fast|full]\n   "
-		"apply method for symmetry breaking"},
+		"(deprecated)"},
 	{"restart",		_netcmp_restart,
 		"\n   "
 		"start over (reset data structures)"},
@@ -2828,11 +2827,13 @@ _netcmp_equate(ClientData clientData,
    char *name1 = NULL, *name2 = NULL, *optstart;
    struct nlist *tp1, *tp2, *SaveC1, *SaveC2;
    struct objlist *ob1, *ob2;
+   struct ElementClass *saveEclass = NULL;
+   struct NodeClass *saveNclass = NULL;
    int file1, file2;
-   int i, l1, l2, ltest, lent, dolist = 0;
+   int i, l1, l2, ltest, lent, dolist = 0, doforce = 0;
    Tcl_Obj *tobj1, *tobj2, *tobj3;
 
-   if (objc > 1) {
+   while (objc > 1) {
       optstart = Tcl_GetString(objv[1]);
       if (*optstart == '-') optstart++;
       if (!strcmp(optstart, "list")) {
@@ -2840,6 +2841,13 @@ _netcmp_equate(ClientData clientData,
 	 objv++;
 	 objc--;
       }
+      else if (!strcmp(optstart, "force")) {
+	 doforce = 1;
+	 objv++;
+	 objc--;
+      }
+      else
+	 break;
    }
 
    if ((objc != 2) && (objc != 4) && (objc != 6)) {
@@ -2997,6 +3005,12 @@ _netcmp_equate(ClientData clientData,
 	 break;
 
       case PINS_IDX:
+	 if ((ElementClasses != NULL) && (doforce == TRUE)) {
+	    saveEclass = ElementClasses;
+	    saveNclass = NodeClasses;
+	    ElementClasses = NULL;
+	    NodeClasses = NULL;
+	 }
 	 if ((ElementClasses == NULL) && (auto_blackbox == FALSE)) {
 	    if (CurrentCell == NULL) {
 		Fprintf(stderr, "Equate elements:  no current cell.\n");
@@ -3059,6 +3073,12 @@ _netcmp_equate(ClientData clientData,
 	    /* Recover temporarily set global variables (see above) */
 	    Circuit1 = SaveC1;
 	    Circuit2 = SaveC2;
+
+	    /* Recover ElementClasses if forcing pins on mismatched circuits */
+	    if (doforce == TRUE) {
+	       ElementClasses = saveEclass;
+	       NodeClasses = saveNclass;
+	    }
 	 }
 	 break;
 
@@ -3418,9 +3438,15 @@ _netcmp_property(ClientData clientData,
 	    GlobalParallelNone = FALSE;
 	    SetParallelCombine(TRUE);
 	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "connected")) {
+	    GlobalParallelOpen = FALSE;
+	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "open")) {
+	    GlobalParallelOpen = TRUE;
+	}
 	else {
-	    Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
-			NULL);
+	    Tcl_SetResult(interp, "Bad option, should be property parallel "
+			"none|all|connected", NULL);
 	    return TCL_ERROR;
 	}
 	return TCL_OK;
@@ -3982,39 +4008,14 @@ _netcmp_permute(ClientData clientData,
 /* Formerly: x						*/
 /* Results:						*/
 /* Side Effects:					*/
+/* Notes:  Deprecated, retained for compatibility.	*/
 /*------------------------------------------------------*/
 
 int
 _netcmp_symmetry(ClientData clientData,
     Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
 {
-   char *fastfull[] = {
-      "fast", "full", NULL
-   };
-   enum OptionIdx {
-      FAST_IDX, FULL_IDX
-   };
-   int result, index;
-
-   if (objc == 1)
-      index = -1;
-   else {
-      if (Tcl_GetIndexFromObj(interp, objv[1], (CONST84 char **)fastfull,
-		"option", 0, &index) != TCL_OK)
-         return TCL_ERROR;
-   }
-
-   switch(index) {
-      case FAST_IDX:
-	 FastSymmetryBreaking = TRUE;
-	 break;
-      case FULL_IDX:
-	 FastSymmetryBreaking = FALSE;
-	 break;
-   }
-   Printf("Symmetry breaking method: %s.\n", 
-	     FastSymmetryBreaking ? "FAST" : "FULL");
-
+   Printf("Symmetry breaking method has been deprecated.\n");
    return TCL_OK;
 }