Merge branch 'master' into netgen-1.5

VERSION

@@ -1 +1 @@
-1.5.147
+1.5.148

base/verilog.c

@@ -1786,7 +1786,7 @@ nextinst:
 	       // Net is bit-sliced across array of instances.
 
 	       if (wb.start > wb.end) {
-		  char *bptr, *cptr = NULL, cchar, *netname;
+		  char *bptr = NULL, *cptr = NULL, cchar, *netname;
 		  unsigned char is_bundle = 0;
 		  struct bus wbb;
 
@@ -1918,11 +1918,15 @@ nextinst:
 		  scan = scan->next;
 	       }
 	       if (scan == NULL) {
-		  Fprintf(stderr, "Error:  No match in call for pin %s\n", obpinname);
-		  break;
-	       }
+		  char localnet[100];
 
-	       if (GetBus(scan->net, &wb) == 0) {
+		  /* Assume an implicit unconnected pin */
+		  sprintf(localnet, "_noconnect_%d_", localcount++);
+		  Node(localnet);
+		  join(localnet, obptr->name);
+		  Fprintf(stderr, "Note:  Implicit pin %s\n", obpinname);
+	       }
+	       else if (GetBus(scan->net, &wb) == 0) {
 		   char *bptr2;
 		   char *scanroot;
 		   scanroot = strsave(scan->net);

tcltk/tclnetgen.c

@@ -2982,8 +2982,7 @@ _netcmp_equate(ClientData clientData,
 	    else {
 		Fprintf(stdout, "Equate pins:  cell %s and/or %s "
 			"has no elements.\n", name1, name2);
-		Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
-		return TCL_OK;
+		/* This is not necessarily an error, so go ahead and match pins. */
 	    }
 	 }
 	 if (ElementClasses == NULL) {