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313 Commits

Author SHA1 Message Date
Matthias Koefferlein 48b55f142a WIP: flat region tests, partially working 2023-01-16 02:06:21 +01:00
Matthias Koefferlein db870614ab [CONSIDER MERGING] grid check markers are not exactly aligned with vertexes in deep mode 2023-01-16 01:35:08 +01:00
Matthias Koefferlein 765c22e55b WIP: added missing files 2023-01-16 01:01:57 +01:00
Matthias Koefferlein 13874986b2 Bugfix, tests updated 2022-11-28 23:40:11 +01:00
Matthias Koefferlein f6f4dbeb67 Edges#in/in_and_out: tests added 2022-11-27 15:31:25 +01:00
Matthias Koefferlein 0304930136 WIP: introducing Region#in_and_out and Edges#in_and_out, support for hierachical Edges#in, Tests updated 2022-11-27 14:53:30 +01:00
Matthias Koefferlein 25e61205d2 Deep implementation of in/not_in 2022-11-27 10:37:43 +01:00
Matthias Koefferlein 9008464268 WIP: hierarchical mode for Region#in and Region#not_in 2022-11-27 10:26:01 +01:00
Matthias Koefferlein 90df9451b6 WIP: reworked log enabling in LVS, added 'no_lvs_hints' feature, updated tests 2022-08-13 18:30:02 +02:00
Matthias Koefferlein 38d2b8378d Merge remote-tracking branch 'origin/master' into wip 2022-08-10 20:40:27 +02:00
Matthias Köfferlein 7ffdc211e5
Fixed issue-1135 (LVS mismatch on parallel devices) (#1136) 
* Fixed issue-1135 (LVS mismatch on parallel devices)

The fix consists of a more elaborate device identity analysis
following the topological matching. In this step, the devices
are identified according to their connections and parameters.
It is important to properly identify devices taking their
parameters into account as well as their connections.

* Second part of issue fixed (inverter chain ambiguity)

* Added test

* Updated tests

* Updated golden test results

* Updated golden test data for Windows

Co-authored-by: klayoutmatthias <matthias@klayout.org>
 2022-08-10 20:27:11 +02:00
Matthias Koefferlein 0083021220 [Consider merging] Some refactoring of L2N and LVSDB readers for more future compatibility 2022-08-07 00:24:05 +02:00
Matthias Köfferlein 716369de63
Issue 1126 (#1128) 
* First attempt to fix. Rather experimental.

* Debugging and bug fixing

The basic issue was a missing break
However, correct computation of cache results for instance-to-instance cluster
interaction is implemented
Plus: identical and overlapping instances are no longer ignored except in the
case of exact duplicates. Otherwise these instance generate dead nets which
are not connected elsewhere.

* Added tests, fixed duplicate cells test, added missing files.

* Code simplification (removed invariant from transformation in cluster-to-cluster interaction cache)

* Skipping cell instance duplicates as some real-world testcases mandate so

* Updated test data
 2022-08-01 18:50:07 +02:00
Matthias Köfferlein 4a06bc1bb5
Another change related to issue-1011 (aligning flat and deep mode text representation for LVS) (#1037) 2022-03-16 23:33:08 +01:00
Matthias Koefferlein 834dfa6614 Bug fixes, enhancements, tests for snap and scale improvements. 2022-02-18 14:22:16 +01:00
Matthias Koefferlein 812e26aff9 Added missing file 2021-12-26 11:14:40 +01:00
Matthias Koefferlein e1cd6aaeb1 Bugfix for #954 
The bug was that while iterating a Region during the gate traversal,
the "select_interacting" was triggering a sort() which changed the
order.

Solution is to pre-sort when iterators are issued also when the
iterator is non-region selecting. This way, plain and region query
iterators can be used together. In addition, the dirty flag scheme
of Cell+Shapes was cleaned up a little for bboxes.
 2021-12-26 01:12:36 +01:00
Matthias Koefferlein a0367c1530 More specific clip variants after bounding boxes have been reduced in RecursiveShapeIterator 2021-11-01 17:27:52 +01:00
Matthias Koefferlein abe40ae99f Bugfix plus more tests 2021-10-19 20:48:13 +02:00
Matthias Koefferlein 411869d255 Added missing test file 2021-08-29 21:14:08 +02:00
Matthias Koefferlein 2b447854f9 Enhanced matching of blackbox/pin ambiguities 
Previously: matching of blackbox pins was enforced
by using pin names for passive nets in the compare.
Problem: no match was achieved when pins are not
named or not named consistently.

In this case, it's desirable to treat them as
ambiguous.

The new solution is to let the ambiguity resolver handle
that using an extended definition of the net names:
it will take the pin name into account if an unnamed net
is attached to a pin.

In addition, net ambiguities are projected to pin
equivalence now. This also will propagate symmetry
through nested blocks (dbNetlistCompareTests:20_BusLikeConnections).
 2021-07-08 23:54:20 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein 24c34f1d60 Updated test data 2021-07-05 22:29:33 +02:00
Matthias Koefferlein 79c552b300 Fixed #858 (+ line continuation after blanks in Spice reader) 2021-07-02 23:31:54 +02:00
Matthias Koefferlein 19b28982e7 WIP: updated test data (bugfix: bulk does not have layer properties), Fixed Region::count and Region::hier_count (was counting non-polygons too) 2021-05-25 23:08:38 +02:00
Matthias Koefferlein ff033893e0 Added missing file. 2021-05-13 21:13:54 +02:00
Matthias Koefferlein aea8c4d1ad 3-terminal C's and R's for Spice writer too, using different default models for 2- and 3-terminal R and C 2021-05-13 21:13:41 +02:00
Matthias Koefferlein 2f204eaa21 Some refactoring of the instance-to-instance test in hier processor: gives some performance improvement with less memory for cache. 2021-04-26 23:15:27 +02:00
Matthias Koefferlein 9b7879b2a9 Faster hierarchical edges. 2021-04-06 21:05:02 +02:00
Matthias Koefferlein 94556c1448 Merge branch 'master' into lvs-enhancements 2021-03-30 18:56:27 +02:00
Matthias Koefferlein 3f37b0e5a4 Fill cell box introduced as a concept, added tests, overlapping fill cells supported. 2021-03-29 22:12:47 +02:00
Matthias Koefferlein 8fda92a9c4 Merge branch 'drc-enhancements' into fill-enhancements 2021-03-29 15:07:47 +02:00
Matthias Koefferlein 9f295523e4 explicit net joining - preparations 2021-03-27 21:56:53 +01:00
Matthias Koefferlein 94ffc0483e Added missing files 2021-03-22 14:27:30 +01:00
Matthias Köfferlein 184f2bee50
Smooth bug (#740) 
* Smoothing function: provide ability to keep horizontal/vertical lines (important for cut lines)

* Introducting API compatibility macros for generic plugins.
 2021-03-14 12:27:36 +01:00
Matthias Koefferlein f2d106651b Reworked the fill scheme for better support of skewed fill repetitions. 2021-03-11 21:27:49 +01:00
Matthias Koefferlein 637968cbc4 Centering of bounding box in fill tool - this allows using step vectors alone without a boundary layer 2021-03-06 00:31:05 +01:00
Matthias Koefferlein 0d04937c91 Added tests for fill tool 2021-03-05 16:27:57 +01:00
Matthias Koefferlein dbeee1531e Matrix2d and Matrix3d generalized for integer coordinates, added transformation methods for polygons, regions, boxes, edges, etc. Fill enhancements basically implemented. Needs testing. 2021-03-05 15:31:40 +01:00
Matthias Koefferlein 63d19bdb4c More robustness against test variations on different platforms. 2021-01-19 21:49:38 +01:00
Matthias Koefferlein db6b3d280e Merge branch 'master' into complex_drc_ops 2020-11-22 09:31:15 +01:00
Matthias Koefferlein 50ee44b6e2 Addressed issue #663 by internal merging of the intruders. 2020-10-28 23:01:54 +01:00
Matthias Köfferlein 591d4a5c37
Fixed #652 (M scaling not working sometimes for Spice), provided test… (#653) 
* Fixed #652 (M scaling not working sometimes for Spice), provided testcases

* One more patch (bugfix, Spice reader)
 2020-10-10 23:16:02 +02:00
Matthias Köfferlein 52f54ab39e
Fixed #648 (join_nets should work on global nets too) (#655) 2020-10-10 23:15:36 +02:00
Matthias Koefferlein ec01c9b72b WIP: tests for local processor flat mode 2020-09-26 17:11:13 +02:00
Matthias Koefferlein 2953ad3329 Merge branch 'master' into drc-enhancements 2020-08-30 23:35:37 +02:00
Matthias Koefferlein 1d74cf19dc Added missing file 2020-07-18 00:02:45 +02:00
Matthias Koefferlein 848fd3e1bb Added testcase 2020-07-07 21:21:33 +02:00
Matthias Koefferlein cc31b19188 Another golden testdata update for Windows. 2020-06-27 20:41:57 +02:00
Matthias Koefferlein 43ceeecf6e Golden test data for Ubuntu 20 and Windows, pipe output stream for Windows. 2020-06-27 09:50:55 +02:00
Matthias Koefferlein 7a26768d8a Updated testdata 2020-06-26 17:46:41 +02:00
Matthias Koefferlein 03dacbd2f5 Updated testdata 2020-06-26 17:46:39 +02:00
Matthias Koefferlein d141c0895d Added tests for Region's andnot. 2020-06-14 18:12:17 +02:00
Matthias Koefferlein 41fe04bbc8 WIP: twobool local processor 2020-06-14 17:00:54 +02:00
Matthias Koefferlein 4390a80dda Added test cases for multiple-outputs local processors. 2020-06-13 23:57:40 +02:00
Matthias Köfferlein 2d0a9418f9
Implemented #579 (perimeter_only mode for antenna check) (#582) 
* WIP: added basic feature and tests.

* WIP: provide tests are GSI binding of new antenna check

* Fixed issue #579 (perimeter_only mode for antenna check)

* Updated DRC doc for 'perimeter_only'
 2020-06-05 10:55:07 +02:00
Matthias Koefferlein 156e325e71 Updated unit test golden data 2020-05-31 02:12:00 +02:00
Matthias Köfferlein 6601d472bf
Implemented #570 (perimeter included in antenna check) (#572) 
* First implementation of the perimeter factor for antenna check, unit tests.

* Bugfix and unit tests for GSI binding of new antenna check version.

* DRC integration of perimeter-enabled antenna check.

* Enhanced DRC doc for antenna rule
 2020-05-30 21:45:48 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567) 
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
 2020-05-26 23:47:59 +02:00
Matthias Koefferlein b84a9df2da Persisting texts now for .l2n format 2020-05-22 00:58:46 +02:00
Matthias Koefferlein c682cc85d0 Generalized concept of region, texts etc. into 'shape collections'. Fixed LVS and DRC tests. 2020-05-21 23:59:30 +02:00
Matthias Koefferlein 854320d52d Debugging: proper assignment of net names through labels. 2020-05-20 23:27:06 +02:00
Matthias Koefferlein e9af72ee28 Tests for texts as net names, fixed Shapes test (order of texts) 2020-05-20 01:05:19 +02:00
Matthias Koefferlein 7dab87b881 Added tests, Region#pull_interacting with texts 2020-05-15 23:48:21 +02:00
Matthias Koefferlein 16d6c75b0e Fixed build, added tests for filter in deep texts object. 2020-05-13 17:58:00 +02:00
Matthias Koefferlein 4e7d0a81b8 'interact' between regions and texts. 2020-05-13 17:29:10 +02:00
Matthias Koefferlein c1b1ce6951 Provide unit test for DeepTexts. 2020-05-12 21:43:11 +02:00
Matthias Köfferlein 9b0362d03d
Fixed #544 (ignore duplicate global nets in SPICE reader) (#545) 2020-04-26 16:54:13 +02:00
Matthias Koefferlein c640347570 MERGE: added Spice reader testcase for resistors with model names. 2020-04-01 23:19:21 +02:00
Matthias Koefferlein b35429291e WIP: join_nets implemented, join_symmetric_nets: enhanced detection of symmetric nets. 2020-02-27 00:52:03 +01:00
Matthias Köfferlein 6a996b6f5b
Merge pull request #465 from KLayout/issue-462 
Implemented #462 (Generalize MOS transistor extraction to other gate …
 2020-01-05 01:02:54 +01:00
Matthias Koefferlein 811560094a Updated tests. 2020-01-04 21:19:06 +01:00
Matthias Koefferlein 833edf53b2 Implemented #462 (Generalize MOS transistor extraction to other gate figures) 2020-01-02 22:20:45 +01:00
Matthias Koefferlein 6a47437702 Updated test data. 2019-12-18 17:28:46 +01:00
Matthias Koefferlein 3441070908 Merge branch 'issue-448' into dvb 2019-12-15 23:57:42 +01:00
Matthias Koefferlein 3e32ca1ada Updated test data for Windows. 2019-12-15 23:54:17 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein b802220ae9 Updated test data 2019-12-15 10:48:11 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 06a68b77d2 Updated test data for windows. 2019-12-15 10:17:10 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much 
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
 2019-12-15 01:29:56 +01:00
Matthias Koefferlein 07daed2878 WIP: further updates of test data. 2019-12-15 00:24:17 +01:00
Matthias Koefferlein 96e591cba9 WIP: further updates of test data. 2019-12-15 00:23:05 +01:00
Matthias Koefferlein da1ac3661f WIP: bugfix of refactoriung, update test data. 2019-12-15 00:16:47 +01:00
Matthias Koefferlein 07a85e3ec3 Added test data. 2019-12-09 21:40:24 +01:00
Matthias Koefferlein 3b9beb0d49 Fixed #438 (error on redefinition of subcircuit in SPICE) 2019-12-07 23:39:39 +01:00
Matthias Koefferlein 64bb01d80d Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway. 2019-11-24 00:23:19 +01:00
Matthias Koefferlein 1a92bae3a8 Another update of golden data. 2019-11-23 23:38:38 +01:00
Matthias Koefferlein ed00503d41 Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data. 2019-11-23 23:36:52 +01:00
Matthias Koefferlein 1309aa59cb Merge branch 'master' into issue-425 2019-11-23 01:55:28 +01:00
Matthias Koefferlein dd7309ee9d Added missing test file. 2019-11-23 01:23:41 +01:00
Matthias Koefferlein 18b80489ed Added test data. 2019-11-23 01:20:59 +01:00
Matthias Koefferlein 2757b22da6 Resolved conflicts for issue-419 merge 2019-11-22 23:34:03 +01:00
Matthias Köfferlein ac7e17ffcb
Merge pull request #422 from KLayout/issue-406 
Issue 406
 2019-11-22 23:12:16 +01:00
Matthias Köfferlein c8cf8122b6
Merge pull request #414 from KLayout/issue-411 
Issue 411
 2019-11-22 23:11:24 +01:00
Matthias Koefferlein 6648b53822 Fixed issue #419 (multiple top circuits after flatten of netlist) 
The problem is solved by always producing subcircuits for cell
instances, even if there are no connections.

The netlist comparer had to be adjusted too because subcircuits
without pins were used for representing "unknown" subcircuit pairing.

In addition, this patch should lead to a better matching of
parallel subcircuit configurations where two different subcircuits
are entirely parallel.
 2019-11-20 21:56:12 +01:00
Matthias Koefferlein 6c7ceb74dc Enhanced intersections algorithm so that the generated points won't overlay with finite edges from the AND part 2019-11-19 21:19:36 +01:00
Matthias Koefferlein 990961e5f4 Fixed #411 (multiple device extractors for same class) 2019-11-17 23:12:50 +01:00
Matthias Koefferlein 8dddc4000f Also write the net properties to GDS or OASIS 
"build_nets" will now write the net's properties
to the generated net shapes.
This might enable interesting applications.
 2019-11-13 23:09:09 +01:00
Matthias Koefferlein 7309688944 More robustness of snap algorithm for unit tests 2019-11-12 20:13:35 +01:00