Matthias Koefferlein
7d6237a90a
Unescaping of net names on Spice reader -> writer/reader should be self-compatible.
2019-05-31 22:55:09 +02:00
Matthias Koefferlein
985cffc099
Unique net names for Spice netlist writer
2019-05-31 22:19:51 +02:00
Matthias Koefferlein
c684633dd6
Some enhancements for netlist extraction and writer
...
* Spice writer can now be configure to skip the debug
comments
* < and > are allowed chars in spice names now
* global net names have second prio over labels now
2019-05-31 00:11:28 +02:00
Matthias Koefferlein
1764ce04af
Special golden data for MSVC/dev ex test
2019-05-29 23:37:50 +02:00
Matthias Koefferlein
9bf1263efa
Special golden data for MSVC/LVS test
2019-05-29 23:34:55 +02:00
Matthias Koefferlein
1935ee7ff9
Tried to fix unit tests for MSVC
2019-05-29 22:09:39 +02:00
Matthias Koefferlein
dea2b76dc8
Added unit tests for res and cap device extractors.
2019-05-29 21:35:02 +02:00
Matthias Koefferlein
10667d8e35
Bugfixed last commit, fixed unit tests.
2019-05-29 00:51:42 +02:00
Matthias Koefferlein
f8646412ca
Added missing files
2019-05-25 01:19:32 +02:00
Matthias Koefferlein
252622e3f8
Fixed unit tests, support floating pins for netlist compare
2019-05-20 23:48:07 +02:00
Matthias Koefferlein
625b173379
Reworked l2n and lvsdb format such that reading/writing gets more reproducible: maintain unnamed state of devices, subcircuits and pins
2019-05-20 22:33:23 +02:00
Matthias Koefferlein
834dcc7474
WIP: LVSDB reader/writer fixes
2019-05-19 23:42:31 +02:00
Matthias Koefferlein
ea8320dcf8
WIP: LVSDB reader/writer: bugfixes, refactoring, tests.
2019-05-19 22:55:03 +02:00
Matthias Koefferlein
ea28530c55
L2N: combined device persistance (complex concept - needs simplification?)
2019-05-10 00:15:51 +02:00
Matthias Koefferlein
c33fd40ec9
Switched l2n format to relative mode by default (relative mode is an option and maybe shorter)
2019-05-04 23:06:18 +02:00
Matthias Koefferlein
548f16f1df
WIP: tried to provide a more consistent net building feature (here: building hierarchical nets with properties as net annotation - needs cell variants if properties are assigned to subcells too)
2019-05-04 00:37:38 +02:00
Matthias Koefferlein
2aaec56adb
WIP: netlist browser - extended the net export scheme of build_net to support net annotation and flattening.
2019-05-03 23:33:37 +02:00
Matthias Koefferlein
e661bac0a7
Netlist browser: fixed a segfault on 'unload all'
2019-04-28 22:57:06 +02:00
Matthias Koefferlein
7f9da5e8de
Introduced concept of device class templates
...
This concept allows to persist at least the standard
(built-in) device classes into L2N DB files. This way
device classes are persisted.
2019-04-23 19:44:07 +02:00
Matthias Koefferlein
f6836b96a2
WIP: some enhancements
...
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
2019-04-07 10:15:57 +02:00
Matthias Koefferlein
52fb8b0f65
Merge remote-tracking branch 'remotes/origin/master' into dvb
2019-04-04 07:35:43 +02:00
Matthias Koefferlein
89ffd7e3da
WIP: Simple SPICE reader.
2019-04-01 22:46:33 +02:00
Matthias Koefferlein
9613ad72c8
WIP: netlist compare - using it for more tests
...
Issue solved: some circuit pins may not have a net - these
need to be ignored.
Requirement: all pins with a net must be mapped.
Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.
Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
2019-03-31 23:59:43 +02:00
Matthias Koefferlein
e545d6af3f
Refined solution for issue-245 by providing a better name mapping (checked with ngspice)
2019-03-22 00:05:17 +01:00
Matthias Koefferlein
9356f32026
Fixed issue-245 (support Spice netlist with names instead of numbers)
...
The option is in the Spice writer (writer.use_net_names=true).
2019-03-21 23:34:16 +01:00
Matthias Koefferlein
ab8107de2d
Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS
2019-03-10 01:26:52 +01:00
Matthias Koefferlein
8b29b30ff9
WIP: more consistent text handling
...
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.
However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.
The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.
A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
2019-03-06 00:34:56 +01:00
Matthias Koefferlein
bacd565d05
Bugfix: Spice writer added one pin too much to MOS4 transistors.
2019-03-04 17:26:35 +01:00
Matthias Koefferlein
8d3b94201e
Antenna check: tests added, 'catchall' diode protection
2019-03-01 23:07:28 +01:00
Matthias Koefferlein
9f4f2d58d7
First version of antenna check.
2019-02-28 23:56:49 +01:00
Matthias Koefferlein
d4ed21f42a
Just new tests
2019-02-25 22:34:06 +01:00
Matthias Koefferlein
3c6aafcc0c
Region: hierarchical text object detection implementated.
2019-02-23 00:56:55 +01:00
Matthias Koefferlein
18f74bac1e
Enabled transformations for deep regions/edges/edge pairs - important for handling layouts with different DBUs in DRC
2019-02-22 01:02:48 +01:00
Matthias Koefferlein
91407ddaa9
Added tests for region processors.
2019-02-20 21:40:43 +01:00
Matthias Koefferlein
496b695ef0
Refactoring of the polygon processing in Region
2019-02-19 22:11:55 +01:00
Matthias Koefferlein
9ec6b44c93
Added some tests for the previous commit.
2019-02-18 00:15:26 +01:00
Matthias Koefferlein
311318c578
Ported edge/edge DRC functions to hierarchical mode.
2019-02-17 18:54:33 +01:00
Matthias Koefferlein
c40f147dc7
Edge/edge and edge/polygon interaction test ported to hierarchical mode.
2019-02-17 18:36:15 +01:00
Matthias Koefferlein
7ef0451ca8
Partial segments of edges converted to hierarchical operations.
2019-02-17 17:53:21 +01:00
Matthias Koefferlein
74006b6208
Hierarchical implementation of extended method for edges
2019-02-17 17:34:31 +01:00
Matthias Koefferlein
ae783a2245
Hiearchical implementation of edge filter.
2019-02-17 16:18:24 +01:00
Matthias Koefferlein
61d766bd4c
Hierarchical implementation of edge to region operations.
2019-02-17 16:05:39 +01:00
Matthias Koefferlein
e6ee1c064e
Hierarchical implementation of edge/edge booleans.
2019-02-17 15:07:16 +01:00
Matthias Koefferlein
8e5bffcf18
Hierarchical angle check.
2019-02-17 11:42:30 +01:00
Matthias Koefferlein
a7bfaac424
Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation)
2019-02-17 10:59:04 +01:00
Matthias Koefferlein
6e35e80963
Hierarchical implementation of polygon vs. edge interact
2019-02-15 23:43:45 +01:00
Matthias Koefferlein
78617930dd
Hierarchical implementation of self-overlap merge.
2019-02-13 22:41:12 +01:00
Matthias Koefferlein
ddcfda8761
Some optimization: keep merged state in deep region.
2019-02-13 17:17:03 +01:00
Matthias Koefferlein
68947bedd2
Updated golden test data.
2019-02-13 01:11:15 +01:00
Matthias Koefferlein
b0fc2be96e
Deep regions: some more operations implemented hierarchically
...
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
2019-02-13 01:07:32 +01:00
Matthias Koefferlein
6404ca6b1d
WIP: Deep edge pairs
2019-02-12 00:08:47 +01:00
Matthias Koefferlein
a81a8cdbc8
Modified edge transformation to maintain the orientation paradigm
...
When the transformation is mirroring, edges now swap their
points to maintain the right-is-inside paradigm.
2019-02-10 16:03:46 +01:00
Matthias Koefferlein
4abc38a5cc
Test for deep/flat collaboration
2019-02-10 08:28:48 +01:00
Matthias Koefferlein
e8e45b7272
Some tests, smooth and round method of deep region
2019-02-09 23:51:35 +01:00
Matthias Koefferlein
404f0f8328
Added a missing test golden data.
2019-02-09 22:56:44 +01:00
Matthias Koefferlein
b6dd149f53
Changed variant suffix to to be consistent with cell name suffix generation in KLayout.
2019-02-09 19:21:14 +01:00
Matthias Koefferlein
1f3af7bbfe
Hierarchical area and perimeter and sizing
...
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.
Sizing is implemented hierarchically.
For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
2019-02-09 19:13:54 +01:00
Matthias Koefferlein
bbf7b2768b
WIP: cell variant collecting and building.
2019-02-09 16:29:34 +01:00
Matthias Koefferlein
ac7baf96ff
Added golden data for deep region regression test.
2019-02-07 21:08:52 +01:00
Matthias Koefferlein
decc5ede13
Robustification of Region
...
- Tests for merge
- Locking the layout when writing back the data for
performance improvement
2019-02-05 23:39:31 +01:00
Matthias Koefferlein
9c0123df20
Implemented implicit joining of nets with the same label.
2019-02-03 21:34:23 +01:00
Matthias Koefferlein
3f1cd226a5
Made net name optional in l2n format.
2019-02-03 13:33:58 +01:00
Matthias Koefferlein
f9c33733b9
l2n format writer and reader: more compact output
2019-02-03 01:49:48 +01:00
Matthias Koefferlein
99f111fe01
Attempt to achieve reproducibility between MSVC and gcc
...
Applies to dbHierProcessor.cc:
The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.
Using ordered sets where possible and explicit
sorting might help.
2019-02-02 22:43:42 +01:00
Matthias Koefferlein
c90f7e4af9
Introduced perimeter parameters for MOS3/MOS4
2019-02-02 01:29:28 +01:00
Matthias Koefferlein
57305977a4
Spice writer delegate fix
...
- Changed to const & objects in the Spice writer delegate
to non-const & for Ruby/Python reimplementation (as const/non-const
ambiguity is an issue for Ruby/Python we cannot efficiently
work with const refs)
- Updated test data because the previous implementation wasn't
using refs but rather copies of device and device class
objects.
2019-01-31 22:23:58 +01:00
Matthias Koefferlein
4068478887
Implemented SPICE writer + tests.
2019-01-31 00:07:10 +01:00
Matthias Koefferlein
29264013b0
WIP: more consistent handling of polygon splitting parameters.
2019-01-25 22:28:25 +01:00
Matthias Koefferlein
6da9bc5e85
Updated tests after switching to boolean core.
2019-01-25 21:38:45 +01:00
Matthias Koefferlein
f83e1dae43
Refactoring, some bugfixes, GSI bindings for L2N methods.
2019-01-20 23:12:27 +01:00
Matthias Koefferlein
4c7f43d749
More l2n reader tests.
2019-01-20 17:31:58 +01:00
Matthias Koefferlein
dd39168dc8
WIP: Enabled layout generation from read l2n data.
2019-01-20 02:50:23 +01:00
Matthias Koefferlein
a5e2cf58c3
l2n dump format is leaner (device terminal shapes dropped from nets as they are contained in the device abstracts). Some refactoring.
2019-01-19 23:00:19 +01:00
Matthias Koefferlein
8213e71a79
WIP: l2n reader implementation, some bug fixes, refactoring.
2019-01-19 22:19:08 +01:00
Matthias Koefferlein
56bb39a273
LayoutToNetlist enhancements in the area of the dumper.
2019-01-16 22:45:58 +01:00
Matthias Koefferlein
5962d66940
WIP: major enhancements with respect to device handling
...
The device handling in the netlist extractor was now
entirely moved to device cells. New options are introduced
for exporting these cells. Tests have been updated.
2019-01-15 21:33:41 +01:00
Matthias Koefferlein
1af81b74d2
WIP: refactoring - turning devices into cells for better backannotation.
2019-01-14 00:59:47 +01:00
Matthias Koefferlein
9fa5618034
Added test for device combination.
2019-01-08 23:49:12 +01:00
Matthias Koefferlein
294f1701b5
Added a test for joining of layers through multiple global net assignment.
2019-01-07 23:57:52 +01:00
Matthias Koefferlein
315bcdd016
WIP: bugfixed netlist extractor with global nets.
2019-01-07 23:33:57 +01:00
Matthias Koefferlein
c80e335cd6
WIP: global nets integration in cluster builder.
2019-01-07 02:08:59 +01:00
Matthias Koefferlein
a4f0fd665e
Provided a solution for connectivity through global nets.
2019-01-06 17:50:51 +01:00
Matthias Koefferlein
261b14a260
WIP: GSI binding of LayoutToNetlist::build_nets
2019-01-06 02:15:04 +01:00
Matthias Koefferlein
8d51d1e4bb
WIP: better optimization of hierarchical net output.
2019-01-06 01:54:36 +01:00
Matthias Koefferlein
ec3a3b0f8c
WIP: added ability to export nets to layouts.
2019-01-06 01:32:20 +01:00
Matthias Koefferlein
bc4f9efa5d
One more test for probing with a slightly more complex hierarchy.
2019-01-05 23:21:37 +01:00
Matthias Koefferlein
f86f8149eb
Fixed a bug that caused a segfault in the Layout2Netlist object (array repo references to original layout rather than to the working layout)
2019-01-05 22:40:53 +01:00
Matthias Koefferlein
6e468b43e0
WIP: bugfix - local to instance interaction did shortcut too early.
2019-01-05 10:12:55 +01:00
Matthias Koefferlein
c31c87916c
WIP: bugfix - array reference were not always considered correctly.
2019-01-05 01:34:10 +01:00
Matthias Koefferlein
3fd99407a3
WIP: bugfix - hierarchical net extractor wasn't considering self-interactions between instance array elements.
2019-01-03 23:25:28 +01:00
Matthias Koefferlein
62d9941c4a
WIP: Bugfix - hierarchy was dropping instances.
2019-01-03 22:09:19 +01:00
Matthias Koefferlein
72a140957d
WIP: added test for recursive net shape retrieval
2018-12-30 18:22:45 +01:00
Matthias Koefferlein
2f48479838
WIP: a bit of simplification, renaming of methods, parents for subcircuits, devices. References for circuits pointing to subcircuits.
2018-12-28 22:51:11 +01:00
Matthias Koefferlein
8f568641e0
WIP: some refactoring, added label recognition to net extraction, test enhancements.
2018-12-27 00:20:21 +01:00
Matthias Koefferlein
024907e7ef
WIP: first test for device extraction.
2018-12-26 10:02:34 +01:00
Matthias Koefferlein
4e899d7d6c
WIP: Added a test layout
2018-12-26 00:36:54 +01:00
Matthias Koefferlein
ef0e0d38c2
WIP: property collection in net clusters, more tests.
2018-12-09 23:24:32 +01:00
Matthias Koefferlein
eb8abaf5a5
Some refactoring of net processor
...
- introduced concept of root cluster
- recursive shape iterator for clusters
2018-12-09 00:54:08 +01:00
Matthias Koefferlein
df44c364ea
WIP: network processor: net backannotation into original hierarchy.
2018-12-08 01:55:02 +01:00
Matthias Koefferlein
e894724605
Some more debugging and more test cases. Net processor starts getting stable ...
2018-12-05 23:14:06 +01:00
Matthias Koefferlein
111a1acdfc
WIP: added test cases for multi-level cross-hierarchy interactions.
2018-12-04 23:32:42 +01:00
Matthias Koefferlein
10f7750a89
WIP: more tests, some debugging.
2018-12-04 23:21:19 +01:00
Matthias Koefferlein
37fad6da97
WIP: hier network processor - some debugging, more tests.
2018-12-04 22:30:18 +01:00
Matthias Koefferlein
42f153672b
WIP: proceed with debugging of hier network processor
2018-12-03 23:02:01 +01:00
Matthias Koefferlein
e8c86834cb
WIP: hier network - a first testcase.
2018-12-03 00:17:04 +01:00
Matthias Koefferlein
7073a74aa5
WIP: More on deep regions & hier processor
...
- Splitting of shapes on output of booleans
- A bugfix: error happened when pulling intruders from second-next hier level
- Tests added
- Some TODO comments added
2018-11-22 01:26:03 +01:00
Matthias Koefferlein
06c11d0096
WIP: Deep region XOR implemented.
2018-11-21 00:32:14 +01:00
Matthias Koefferlein
fc729fc830
WIP: DeepRegion::add implemented.
2018-11-18 09:58:10 +01:00
Matthias Koefferlein
cfa0e8431c
WIP: implemented AND/NOT in deep region, added tests.
2018-11-17 01:33:58 +01:00
Matthias Koefferlein
a438dfd6f0
WIP: deep region debugged, GSI binding, tests.
2018-11-17 00:16:13 +01:00
Matthias Koefferlein
f29fd3dfc6
WIP: moved hierarchical processor into db.
2018-11-15 23:41:44 +01:00
Matthias Koefferlein
3f8825cfd1
WIP: Improved design of HierarchyBuilder, added tests.
2018-11-15 22:50:02 +01:00
Matthias Koefferlein
b28317fb69
Some enhancements to layer and cell mapping
...
* Modification of the mapping is possible now
(#map used to ignore mappings if there was one
already)
* Added DropCell mapping (also for RBA)
* Added unit tests for cell mapping, layer mapping
db::merge_layouts, db::copy_shapes and db::move_shapes
2017-08-30 01:11:38 +02:00