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472 Commits

Author SHA1 Message Date
Matthias Koefferlein 64bb01d80d Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway. 2019-11-24 00:23:19 +01:00
Matthias Koefferlein 1a92bae3a8 Another update of golden data. 2019-11-23 23:38:38 +01:00
Matthias Koefferlein ed00503d41 Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data. 2019-11-23 23:36:52 +01:00
Matthias Koefferlein ccb1871fb3 Updates for 'cheats' testcase which was entirely broken. 2019-11-23 19:24:59 +01:00
Matthias Koefferlein 1309aa59cb Merge branch 'master' into issue-425 2019-11-23 01:55:28 +01:00
Matthias Koefferlein dd7309ee9d Added missing test file. 2019-11-23 01:23:41 +01:00
Matthias Koefferlein 18b80489ed Added test data. 2019-11-23 01:20:59 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein 2757b22da6 Resolved conflicts for issue-419 merge 2019-11-22 23:34:03 +01:00
Matthias Köfferlein ac7e17ffcb
Merge pull request #422 from KLayout/issue-406 
Issue 406
 2019-11-22 23:12:16 +01:00
Matthias Köfferlein c8cf8122b6
Merge pull request #414 from KLayout/issue-411 
Issue 411
 2019-11-22 23:11:24 +01:00
Matthias Koefferlein 6648b53822 Fixed issue #419 (multiple top circuits after flatten of netlist) 
The problem is solved by always producing subcircuits for cell
instances, even if there are no connections.

The netlist comparer had to be adjusted too because subcircuits
without pins were used for representing "unknown" subcircuit pairing.

In addition, this patch should lead to a better matching of
parallel subcircuit configurations where two different subcircuits
are entirely parallel.
 2019-11-20 21:56:12 +01:00
Matthias Koefferlein 772b309d05 Fixed #406: finally added tests for DRC feature. 2019-11-19 21:34:11 +01:00
Matthias Koefferlein 6c7ceb74dc Enhanced intersections algorithm so that the generated points won't overlay with finite edges from the AND part 2019-11-19 21:19:36 +01:00
Matthias Koefferlein 990961e5f4 Fixed #411 (multiple device extractors for same class) 2019-11-17 23:12:50 +01:00
Matthias Koefferlein 8dddc4000f Also write the net properties to GDS or OASIS 
"build_nets" will now write the net's properties
to the generated net shapes.
This might enable interesting applications.
 2019-11-13 23:09:09 +01:00
Matthias Koefferlein bb3aed5773 Merge branch 'master' of https://github.com/KLayout/klayout into netlist_properties 2019-11-13 00:59:29 +01:00
Matthias Koefferlein d060147713 Enhancements for the netlist object properties 
- more memory efficient (single pointer only)
- iterator for properties
- NetlistObject#property_keys in GSI
 2019-11-12 23:00:49 +01:00
Matthias Koefferlein 848df6f6cc New unit test data for MinGW32 2019-11-12 20:39:19 +01:00
Matthias Koefferlein ab4f632527 Another unit test golden data set for MinGW32 2019-11-12 20:17:27 +01:00
Matthias Koefferlein 7309688944 More robustness of snap algorithm for unit tests 2019-11-12 20:13:35 +01:00
Matthias Koefferlein 86e041cd51 Updated test data. 2019-11-11 23:03:40 +01:00
Matthias Koefferlein 0ce06125ca Introducing netlist object properties. 2019-11-11 07:02:02 +01:00
Matthias Koefferlein 4a212e8db6 Added tests for Region#scale_and_snap and Region#snap 2019-11-07 23:33:54 +01:00
Matthias Koefferlein 988b1e563f Added unit test for DeepRegion::snap 2019-11-07 23:11:34 +01:00
Matthias Koefferlein 318efbf7b0 Fixed 'scale_and_snap' feature 2019-11-07 22:54:16 +01:00
Matthias Koefferlein 4924d0269c Fixed #400, added tests. 2019-11-06 23:28:16 +01:00
Matthias Koefferlein c8aa926fb0 Another update of testdata for MSVC 2019-11-03 09:07:00 +01:00
Matthias Koefferlein 3dffe91f88 Attempt to fix testdata for MSVC 2019-11-03 02:30:52 +01:00
Matthias Koefferlein 388e555fbc Another attempt to fix unit tests on Windows (CRLF/LF issue) 2019-11-03 00:09:26 +01:00
Matthias Koefferlein 5d2528a450 Fixed unit tests for Windows 2019-11-02 20:46:32 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein 36ee1efe16 WIP: speedup LVS 'align' by flattening top-down 2019-10-21 22:14:36 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein 2325e1bce4 Merge branch 'dvb' into pull_feature 2019-10-04 22:58:52 +02:00
Matthias Koefferlein c6e5a785ea Updated test data. 2019-10-03 14:21:29 +02:00
Matthias Koefferlein e1d77a1476 pull_interacting for edges/edges and edges/regions, some enhancements and bug fixes 
Bug fixes:
- use dist 1 to cover touching case properly in local processor
- handling of raw mode and is_merged state

Additional tests
 2019-10-03 13:08:37 +02:00
Matthias Koefferlein ca747771ac Allow preempt LVS configuration 
same_nets, equivalent_pins, same_circuits and same_device_classes
can now be given at the beginning of the LVS script. This will
simplify building universal scripts with the run specific part at
the beginning (one "load" section).

The price are somewhat less specific error messages when something
fails in these methods.
 2019-10-01 00:21:27 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein bdf5e3c124 WIP: fake pin debug issue with LVS 
Fake pins: pins that happen because something connects to a cell at an
unexpected position. Such a pin is difficult to find. The solution is
to keep those nets and nur purge them so these nets can be identified
in the layout.

Here: is_floating? will be true only if there are no pins. Hence
nets with pins are not removed. is_passive is introduced for nets -
passive nets are such that don't have elements, but a pin.
Circuits are purged if they only have passive nets.
 2019-09-30 21:58:13 +02:00
Matthias Koefferlein 6c52daa3a3 Follow-up on #353 (sessions paths relative to session file) 
Consistent behavior for file paths for images too.
Plus: image paths are not kept as absolute paths
inside the session.
This makes regeneration of images stable.
 2019-09-18 22:05:37 +02:00
Matthias Koefferlein a50fadffcd Fixed #358 (strm2oas was producing GDS) 2019-09-17 23:10:41 +02:00
Matthias Köfferlein 6a305cfbbf
Merge pull request #356 from KLayout/issue-353 
Fixed #353 (paths relative to .lys file for rdb-file)
 2019-09-16 23:36:17 +02:00
Matthias Köfferlein f5ce24066e
Merge pull request #357 from KLayout/issue-352 
Fixed #352 (LVS should ignore equivalent_pins line for non-existing c…
 2019-09-16 23:36:02 +02:00
Matthias Koefferlein 55475e905f Fixed #352 (LVS should ignore equivalent_pins line for non-existing circuits) 
Same is true now for same_nets and same_circuits.
 2019-09-15 00:18:29 +02:00
Matthias Koefferlein b747bbabd9 Fixed #353 (paths relative to .lys file for rdb-file) 
This fix also includes: L2N and LVS DB files are now also
included in the sessions.
 2019-09-14 22:38:23 +02:00
Matthias Koefferlein 08aacbd2e8 Provide tests to text buddy executables without framework 2019-09-13 23:46:12 +02:00
Matthias Koefferlein 26f8fc5c83 Bug fixed strmxor with deep mode, added tests. 2019-09-07 21:27:12 +02:00
Matthias Koefferlein cd137e6b3e Another fix for MSVC golden data. 2019-08-30 14:24:07 +02:00