iverilog/tgt-fpga
steve 3a3e288f6f No longer export generic-edif functions. 2003-07-02 00:48:03 +00:00
..
.cvsignore Add the fpga target. 2001-08-28 04:14:20 +00:00
Makefile.in Missing copyright notice. 2003-07-02 00:27:24 +00:00
configure.in Preserve user specifiec CFLAGS/CPPFLAGS. 2003-04-23 05:27:44 +00:00
d-generic-edif.c No longer export generic-edif functions. 2003-07-02 00:48:03 +00:00
d-generic.c Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
d-virtex.c lut3 for 3input wide or. 2003-06-30 19:21:21 +00:00
d-virtex2.c Add support for wide OR/NOR gates. 2003-06-28 04:18:47 +00:00
device.h Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
edif.c Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
edif.h Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
fpga.c Spelling fixes. 2003-06-25 01:49:06 +00:00
fpga.txt Fix spelling of part= flag. 2003-07-02 00:26:49 +00:00
fpga_priv.h No longer export generic-edif functions. 2003-07-02 00:48:03 +00:00
gates.c Add ivl_synthesis_cell support for virtex2. 2003-06-24 03:55:00 +00:00
generic.c Virtex and Virtex2 share much code. 2003-06-25 02:55:57 +00:00
generic.h Virtex and Virtex2 share much code. 2003-06-25 02:55:57 +00:00
mangle.c conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
tables.c Add new virtex2 architecture family, and 2003-03-24 00:47:54 +00:00
xilinx.c Add xilinx support for bufif1. 2003-07-02 00:25:40 +00:00
xilinx.h Add xilinx support for bufif1. 2003-07-02 00:25:40 +00:00