8d9998c44e
Minor optimization of partial load/v
...
When loading a part select from the least significant bits, it is
OK to use the %load/v instruction to strip the high bits off. This
allows the zero-based part select to work in one step, without
loading excess bits.
2007-12-09 17:28:49 -08:00
bee4772ac8
Fix optimization of base==0 part select
...
Some patch caused a variable that held the constant base of a part
select to become unassigned. This led to unexplained failures to part
select a signal. Fix by properly detecting the case of a constant base
of 0 for the part select.
2007-12-09 17:00:32 -08:00
0fbdcbeb02
Minor cleanup.
...
Minor cleanup of some commented out code, and some minor simplification
of the subarray code.
2007-12-08 21:10:58 -08:00
64936d07e5
Add %ix/getv instruction
...
The %ix/getv instruction loads an integer register directly from
a signal vector. This is an optimization that an index register
is loaded from an expression is only a signal. It avoids the thread
vector space.
2007-12-07 13:12:19 -08:00
8f519531f3
Optimize load-add with load/add instruction
...
Where and expression is an immediate value added to a signal value,
it is possible to optimize them to a single instruction that combines
the load with an add at the same time.
2007-12-04 19:15:15 -08:00
0456a1b339
Use movi to load string values.
...
String values are known to be 2-value bits, so they are natural
candidates for using the movi instruction to load the value in
far fewer instructions. With this patch, up to 16bits (two bytes)
at a time can be loaded per instruction.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-11-13 21:14:07 -08:00
4356f9c478
Process expression strings with octal constants correctly (tgt-vvp)
...
tgt-vvp was taking strings and processing them as is, but the strings
could contain octal constants. These constants needed to be converted
to binary form before they could be turned into a bit pattern.
2007-11-13 20:20:16 -08:00
5d750b7779
Optomize runtime using immediate compare
...
Implement compare-immediate instructions and generate code to use
these new instructions to improve runtime performance.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-10-03 20:58:40 -07:00
d7c3a32b06
Fix code generation for real expressions
...
Real value are vector width of 1, fix real literal to reflect this.
fix leaking real registers in code generation for function arguments.
Load of signal should handle conversion from real to vector. Function
arguments, type vector passed a real value, are an example where this
comes up.
Signed-off-by: Stephen Williams <steve@icarus.com>
2007-06-29 21:10:37 -07:00
9931e4c013
Finish up part select of array words.
2007-04-14 04:43:01 +00:00
611d2c81b3
Spelling fixes from Larry
2007-03-22 16:08:14 +00:00
6804732b9e
Spelling fixes (larry doolittle)
2007-02-26 19:49:48 +00:00
521f66f040
Get padding right when loading array word into big vector.
2007-02-12 04:37:58 +00:00
f07257067a
Handle real constants in vector expressions.
2007-01-19 05:24:53 +00:00
f5a7ee0736
Remove dead code related to memories.
2007-01-17 04:39:18 +00:00
91d84e7dc7
Major rework of array handling. Memories are replaced with the
...
more general concept of arrays. The NetMemory and NetEMemory
classes are removed from the ivl core program, and the IVL_LPM_RAM
lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
d434dd7296
Allow part selects of memory words in l-values.
2006-02-02 02:43:57 +00:00
58f182a159
Node delays can be more general expressions in structural contexts.
2006-01-02 05:33:19 +00:00
e9bf00dff6
Pad part selects
2005-12-22 15:42:22 +00:00
c75f0a930e
Remove the $ from signal labels. They do not help.
2005-10-11 18:54:10 +00:00
bb3f3c1f46
Remove obsolete vvp_memory_label function.
2005-10-11 18:30:50 +00:00
be73be8c98
Spelling patches from Larry.
2005-09-19 21:45:35 +00:00
d22d88923d
Fix warnings about uninitialized variables.
2005-09-19 20:18:20 +00:00
c4d8ab8509
Improve loading of part selects when easy.
2005-09-17 04:01:32 +00:00
672aa61ae7
More robust use of precalculated expressions, and
...
Separate lookaside for written variables that can
also be reused.
2005-09-17 01:01:00 +00:00
14d79a655e
Better reuse of IVL_EX_SELECT expressions.
2005-09-15 02:49:47 +00:00
9fd16575d9
Support bool expressions and compares handle them optimally.
2005-09-14 02:53:13 +00:00
5bfdd52391
Handle functions with real values.
2005-07-13 04:52:31 +00:00
b9799cf6ec
Remove NetVariable and ivl_variable_t structures.
2005-07-11 16:56:50 +00:00
f556452403
Handle function/task port vectors.
2005-03-12 23:45:33 +00:00
85286cc086
Rearrange how memories are supported as vvp_vector4 arrays.
2005-03-03 04:33:10 +00:00
2fcaac4060
Support constant part select writes to l-values, and large part select reads from signals.
2005-02-15 07:12:55 +00:00
6be34bba4d
Special handling of constant shift 0.
2005-01-28 05:37:48 +00:00
dfb7c7ba6f
Remove the NetEBitSel and combine all bit/part select
...
behavior into the NetESelect node and IVL_EX_SELECT
ivl_target expression type.
2005-01-24 05:28:30 +00:00
edeb9d8eca
Part selects are done in the compiler, not here.
2005-01-24 05:08:02 +00:00
65e9b6be12
Rework of internals to carry vectors through nexus instead
...
of single bits. Make the ivl, tgt-vvp and vvp initial changes
down this path.
2004-12-11 02:31:25 +00:00
e4ae832153
Clean up spurious trailing white space.
2004-10-04 01:10:51 +00:00
a8ee786036
Relaxed width constraint on pad_expression output.
2004-09-10 00:14:31 +00:00
491df9c327
Watch out for real compared to constant. Handle as real.
2004-06-30 03:07:32 +00:00
9ba1177a4d
Generate signed modulus if appropriate.
2004-06-19 16:17:37 +00:00
3190eda414
Slightly more efficient unary minus.
2003-10-01 17:44:20 +00:00
2970b3c39b
Clear expression lookaside after true cause of ternary.
2003-09-24 20:46:20 +00:00
5e326cd90e
Subtract from constant values.
2003-08-03 03:53:38 +00:00
bfe31e22bf
Start handling pad of expressions in code generators.
2003-07-26 03:34:42 +00:00
71a404a546
Add arithmetic shift operators.
2003-06-18 03:55:18 +00:00
96ca885aca
Remove short int restrictions from vvp opcodes.
2003-06-17 19:17:42 +00:00
4da0cc4c8c
Fix fprintf warning.
2003-06-16 22:14:15 +00:00
1b0408ac8f
More efficient code for ternary expressions.
2003-06-15 22:49:32 +00:00
2f6826247a
Sign extend signed vectors.
2003-06-14 22:18:54 +00:00
b43c543455
Handle assign of real to vector.
2003-06-13 19:10:20 +00:00
0c7a5874d4
Proper pad of signed constants.
2003-06-11 02:23:45 +00:00
2a93dc00f6
Proper width handling of || expressions.
2003-05-10 02:38:49 +00:00
f354c43941
Use hash code for scope labels.
2003-03-25 02:15:48 +00:00
06d5c8135c
Allow real-valued vpi functions to have arguments.
2003-03-15 04:45:18 +00:00
970c4950f4
Merge vpi_call and vpi_func draw functions.
2003-02-28 20:21:13 +00:00
7638ec05e7
Handle real value subtract and comparisons.
2003-02-07 02:46:16 +00:00
04ada23119
Support in various contexts the $realtime
...
system task.
2003-01-27 00:14:37 +00:00
46253ed873
Rework expression parsing and elaboration to
...
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
42b34c2ce6
Evaluate shift index after shift operand because
...
the chift operand may use the index register itself.
2002-12-20 01:11:14 +00:00
6fbfdd8f3f
Keep bit select subexpression width if it is constant.
2002-12-19 23:11:29 +00:00
8e30bc9f9e
Careful of left operands to shift that are constant.
2002-11-22 00:01:50 +00:00
00b2d467e4
Allow right values of right shift to shift in.
2002-11-21 22:42:48 +00:00
c6dcc38fe0
Vectorize load from REG variables.
2002-11-07 03:12:17 +00:00
46ee38b466
Concatenation can evaluate sub-expressions in place.
2002-11-06 05:41:37 +00:00
fbee1b424d
Properly set or clear expression lookaside for binary expressions.
2002-10-20 02:55:37 +00:00
703ad04067
Allow expression lookaside map to spam statements.
2002-09-27 20:24:42 +00:00
778e96330d
Add thread expression lookaside map.
2002-09-27 16:33:34 +00:00
6f23fa61ac
Allow results in register bits 47 in certain cases.
2002-09-24 04:20:32 +00:00
3d3116d48b
Add support for binary NOR operator.
2002-09-18 04:29:55 +00:00
fb0383d2bd
single bit optimization for != in expressions,
...
and expand ++ and != results if needed.
2002-09-13 04:09:51 +00:00
28725d0d74
Optimize ==1 when in context where x vs z doesnt matter.
2002-09-13 03:12:50 +00:00
dac99b9374
Add support for binary nand operator.
2002-09-12 15:49:43 +00:00
0a2a9dcd94
Fix leaking vthread bits in ?: eval.
2002-09-01 01:42:34 +00:00
cbca31555d
Add the %subi instruction, and use it where possible.
2002-08-28 18:38:07 +00:00
d5aa700b4b
Generate %load/nx for indexed load of nets.
2002-08-28 17:15:35 +00:00
aa390f2a91
Fix l-value indexing of memories and vectors so that
...
an unknown (x) index causes so cell to be addresses.
Fix tangling of label identifiers in the fork-join
code generator.
2002-08-27 05:39:57 +00:00
985c34bfd9
Fix behavioral eval of x?a:b expressions.
2002-08-22 03:38:40 +00:00
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
693e9e5ad0
Store only the base name of memories.
2002-08-05 04:18:45 +00:00
89314d4772
Do not use hierarchical names of memories to
...
generate vvp labels. -tdll target does not
used hierarchical name string to look up the
memory objects in the design.
2002-08-04 18:28:14 +00:00
41f7ecacfc
Eliminate use of ivl_signal_name for signal labels.
2002-08-03 22:30:48 +00:00
31bd3e6056
Use all bits of ?: condit expression.
2002-07-12 18:10:45 +00:00
3595b6d186
Carry can propagate to the otp in addi.
2002-07-01 00:52:47 +00:00
24a2487c18
Generate %cmpi/u where appropriate.
2002-06-02 18:57:17 +00:00
cba5a22714
Generate %muli instructions when possible.
2002-05-31 20:04:57 +00:00
95876feb46
Use addi with wide immediate values.
2002-05-30 01:57:23 +00:00
b6b364a09d
Add %addi, which is faster to simulate.
2002-05-29 16:29:34 +00:00
e70e04d6e8
Handle x case of unary ! properly.
2002-05-07 03:49:58 +00:00
d482da4803
Reduce the while loop expression if needed.
2002-04-22 02:41:30 +00:00
eb27dc8db3
Support signed integer division.
2002-04-14 18:41:34 +00:00
aa16e82102
Fix parameter bit select check for magic constants.
2002-02-03 05:53:00 +00:00
364ffc9024
Add support for bit select of parameters.
...
This leads to a NetESelect node and the
vvp code generator to support that.
2002-01-28 00:52:41 +00:00
5840368f2d
Handle certain special cases of stime.
2002-01-11 05:23:05 +00:00
e00aedd99b
Handle padding out of logical values.
2001-11-19 04:25:46 +00:00
d83fb10774
The ! expression returns 0 to x and z values.
2001-10-24 05:06:54 +00:00
ce7d64f427
Evaluate string expressions (Philip Blundell)
2001-10-18 16:41:49 +00:00
821c68696d
Generate %div instructions for binary /.
2001-10-16 01:27:17 +00:00
2326672b3a
Handle constant bits in arithmetic expressions.
2001-10-14 03:24:35 +00:00
245905aeda
Support vectors as operands to logical and.
2001-10-10 04:47:43 +00:00
bdf643ddb1
Generate code for unary minus (PR#272)
2001-09-29 04:37:44 +00:00
Stephen Williams
Cary R
steve