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6501 Commits

Author SHA1 Message Date
Cary R f36faa8ab3 Mingw needs to use Sleep vs sleep (also seconds go to ms) 2012-06-07 10:01:12 -07:00
Cary R c46823e280 Update ivl.def to support new ivl interface functions 2012-06-07 09:42:36 -07:00
Andrew Stevens 9b3d20239a Extend VPI and build to for SIMetrix cosimulation 
Added: basic vpiPort VPI Objects for vpiModulkes
    vpiDirection, vpiPortIndex,   vpiName, vpiSize attributes

   Since ports do not exist as net-like entities (nets either side
   module instance boundaries are in effect connect directly in
   the language front-ends internal representation) the port information
   is effectively just meta-data passed through t-dll  interface and
   output as a additional annotation of module scopes in vvp.

Added: vpiLocalParam attribute for vpiParameter VPI objects

Added: support build for 32-bit target on 64-bit host (--with-m32
   option to configure.in and minor tweaks to Makefiles and systemc-vpi).
 2012-06-07 08:00:02 -07:00
Martin Whitaker 3354d83391 Support if statements and function calls in constant functions. 2012-06-06 19:34:08 -07:00
Stephen Williams cec68cfc61 Merge branch 'x-mil2' 2012-06-06 19:17:27 -07:00
Stephen Williams 62b67c1843 More expression types supported during constant function evaluation. 2012-05-29 17:59:29 -07:00
Stephen Williams a5a7050120 More expression types work in constant functions. 2012-05-29 13:56:16 -07:00
Stephen Williams def9d0ea1d Basic infrastructure for compile-time function evaluation. 2012-05-29 10:02:10 -07:00
Stephen Williams d10e4bca4c Remove some uses of the svector class. 2012-05-28 16:49:41 -07:00
Stephen Williams 25f72e31d4 Re-implement fork/join in vvp 
The fork/join list did not adequately support the tree of processes
that can happen in Verilog, so this patch reworks that support to
make it all more natural.
 2012-05-27 18:26:54 -07:00
Stephen Williams 3b7619b46c Implement fork-join_none in vvp. 2012-05-27 18:26:54 -07:00
Stephen Williams 47ddf5220c Fix assertion settin join type is PBlock statements. 2012-05-27 18:26:53 -07:00
Stephen Williams 6a57764e0e Elaborate fork-join_none and fork-join_any statements. 2012-05-27 18:26:53 -07:00
Stephen Williams c0f35cbe62 Disallow modules/gates in program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams 8154ce2a4a Reword how we enforce program block constraints 
Making the scope type NESTED_MODULE was just plain wrong, because
it didn't really encapsulate the meaning of program blocks OR
nested modules. So instead create nested_module() and program_block()
flags and use those to test scope constraints.
 2012-05-27 18:26:53 -07:00
Stephen Williams dfe7beec31 Allow modules (and program blocks in particular) to nest. 
An important advantage of program blocks is its ability to nest
within a module. This winds up also allowing modules to nest, which
is legal but presumably less used feature.
 2012-05-27 18:26:53 -07:00
Stephen Williams 580c44c015 Prevent non-blocking assignment in program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams 0833d9e37a Basic support for program blocks. 2012-05-27 18:26:53 -07:00
Stephen Williams 342646264e Merge branch 'pei1' 2012-05-25 16:32:12 -07:00
Stephen Williams 6e8aef8262 Get unpacked arrays working. 2012-05-25 15:58:29 -07:00
Stephen Williams ceaa60d2f4 Parse (to "sorry") arrays of named types. 2012-05-22 17:31:27 -07:00
Stephen Williams 621c09105c Sort the typedef emits so that types are emitted in the order used. 
It is common for typedefs of complex types to use further typedefs.
Emit the type definitions depth first so that the types that are used
are defined first. This reduces the need for pre-declaration of types.
 2012-05-22 17:31:27 -07:00
Stephen Williams 369a0b9eca VHDL named types work in more places. 2012-05-22 17:31:27 -07:00
Stephen Williams 2443884779 Parse/sorry nets of named type. 2012-05-22 17:31:27 -07:00
Stephen Williams 4748f0cb5e Handle incomplete type declarations 
Use these in the package library to allow for arbitrary mixing
of type declaration and use. This makes writing libraries much
easier.
 2012-05-22 17:31:27 -07:00
Stephen Williams 315ac4f179 support part select of struct members that are packed arrays. 2012-05-22 17:31:26 -07:00
Stephen Williams 039e6014fe Rework VType::emit_def methods / use packed arrays to implement arrays. 
VHDL arrays are more like SV packed arrays, so use packed arrays
to implement them.
 2012-05-22 17:31:26 -07:00
Stephen Williams e7a974347e Handle packed array slices at module ports. 2012-05-22 17:31:26 -07:00
Stephen Williams 63b7fe059d Reword concat to handle aggregate arguments. 
When concatenation expressions have aggregate arguments, we need to
get the type of the result down to the aggregate expressions so that
it can know how to interpret the elements.
 2012-05-22 17:31:26 -07:00
Stephen Williams 247f6a4ecf Handle properly parsed structs in module ports. 2012-05-22 17:31:26 -07:00
Stephen Williams 67af96fee7 Module output ports use data_type_or_implicit 
This cleans up the parsing of module output ports, allows for more
complex types on the ports, and fixes some bugs.
 2012-05-22 17:31:26 -07:00
Stephen Williams b7b633b613 module output ports use data_type_t types. 
This is in place of ad hoc type information passed to the
pform_module_define_port function.
 2012-05-22 17:31:26 -07:00
Stephen Williams 7e202bb5ca Fix emit of struct ports/declarations. 2012-05-22 17:31:26 -07:00
Stephen Williams c7366e65cd Rework port input and inout to use data_type_or_implicit rule for types. 2012-05-22 17:31:26 -07:00
Stephen Williams 71d2401221 Handle VHDL records. 
Elaborate records and emit them as packed SV records. Also handle
record members so handle name prefixes.

While we are at it, handle some cases of array aggregate expressions.
 2012-05-22 17:31:26 -07:00
Stephen Williams ae06863db1 Elaborate prefix names which may be structure variables. 2012-05-22 17:31:26 -07:00
Stephen Williams a5458828cd Some vhdl parser error handling. 2012-05-22 17:31:26 -07:00
Stephen Williams 021d944a30 Probe type of ExpName with a record prefix. 2012-05-22 17:31:25 -07:00
Stephen Williams 7eb89c5548 Parse name prefix syntax for record member reference. 
When signals/variables are records, they are often referenced by
their members, using a prefix.name syntax. Parse that syntax and
generate "sorry" messages in elaboration.
 2012-05-22 17:31:25 -07:00
Stephen Williams 5e7f61ea42 VHDL process sensitivities go to the end of each iteration 2012-05-22 17:31:25 -07:00
Stephen Williams 78b0b49a4e Support struct members that are packed arrays. 2012-05-22 17:31:25 -07:00
Stephen Williams 9b816f6478 Add support for nested when/else expressions. 2012-05-22 17:31:25 -07:00
Stephen Williams 1249b5dd32 Initial support for if_generate syntax. 2012-05-22 17:31:25 -07:00
Stephen Williams 0775e36a67 Properly elaborate argument types for binary relation expressions. 
The argument types of binary relation expressions are decoupled
from the return type for the expression itself.
 2012-05-22 17:31:25 -07:00
Stephen Williams ed3da959f3 Support types in packages. 
Types declared in packages should be written into the package library.
 2012-05-22 17:31:25 -07:00
Stephen Williams 79435924f2 Move some VType::show methods to ::write_to_stream methods. 2012-05-22 17:31:25 -07:00
Stephen Williams 9ed56a6354 Parse record types, and some new aggregate types. 2012-05-22 17:31:25 -07:00
Martin Whitaker f7ba954ef7 Fix for pr3527022. 
This patch adds support for an explicit range or type in a parameter
declaration that is part of a module parameter port list.
 2012-05-18 13:30:28 -07:00
Stephen Williams 2d0c786bfb Remove excess evaluate_parameters method calls. 2012-05-18 08:07:27 -07:00
Larry Doolittle 84f14dbc81 Spelling fixes to vhdlpp tree 
Mostly comments as usual, but one error message is changed.
 2012-05-17 16:42:03 -07:00