The outputs to bufif and nmos/pmos devices are always strength-aware,
so should have their outputs connected to a net8 device.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch adds min_typ_max to expressions. Remember when using a
min_typ_max triplet in an expression they must be enclosed with
parenthesis (1364-2001 section 4.3 page 58).
Add support for accessing the modpath nodes via PLI,
and add support for the vpi_set_delays and vpi_put_delays
functions to set the delays on those paths.
- GSoC 2007
It is legal in Verilog to bind expressions to ports that do not
match the port width. Icarus Verilog needs to create the necessary
part selects to get the connections right.
Signed-off-by: Stephen Williams <steve@icarus.com>
Add code to handle all the primitives currently defined and
fixed a power of ten error in the time units display (it is
either 10^{units} or 1e{units}, but not 10e{units}).
This patch adds functionality to verify that primitives are given
an appropriate number of ports. For multiple output gates (but,
not, pulldown, pullup) it also reports that Icarus currently does
not support multiple outputs when more than one is given.
When a repeat concatenation expression is translated to a netlist,
get the repeat expression right. This comes up when an elab_and_eval
elaboration contains a repeat concationation, and the expression is
ultimately turned into a netlist by expr_synth.
Signed-off-by: Stephen Williams <steve@icarus.com>
Signed divide of 32bit values can overflow if done in a 32bit long
due to the truncation of sign bits. So use the large value algorithm
if the values are >= 31 bits (63 bits on 64bit machines).
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch adds checks to verify that functions do not invoke
statements that are invalid for them (#, @, wait, enable/call
tasks and non blocking assignment). For reference see section
10.3.4 of 1364-2001.
C style comments were not recognized as comments in false or
suppressed sections of ifdef/etc. blocks. This prohibited an
unneeded endif/else/etc. from being commented out with this
style of comment.
I decided not to delete these since we may at some point in time want
this functionality back. For now they are commented out with an
explanation so we know what is going on.
This patch splits the end of compile and the start of simulation call
backs code into two different procedures. The end of compile events are
still executed at the same time they alway were. The start of simulation
events are now run after initialization.
The event loop used to check for $finish at every iteration. This patch
alters this behavior to only check just before you advance to the next
time step. This allows events for the current time step to complete.
Modified the code that deals with real variables to accept an integer
value when using vpi_put_value(). Also added some type of diagnostic
message for all switch defaults that have an assert(0) to indicate an
error condition, removed CVS comments and removed a small section of
unreachable code.
Modified the code that deals with real variables to accept an integer
value when using vpi_put_value(). Also added some type of diagnostic
message for all switch defaults that have an assert(0) to indicate an
error condition, removed CVS comments and removed a small section of
unreachable code.
Previously list of port declarations were considered a complete
definition of the port. This caused problems for some, so this patch
allows implicitly defined ports (no wire/reg/etc.) to have net
declarations in the body.
This would have never been a problem with the actual circuit generated.
The problem was that the assert was checking values that had never been
set. The constructor now explicitly sets these values to zero and while
I was at it I added a couple more asserts.
This patch is rather large and fixes a couple of problems. The major
change is that instead of keeping all the range specifications in
a list that is later processed the information is now kept as
individual entries for the port and net definitions. This allows
easier checking for multiple definitions (pr1660028), more
detailed error messages and the ability to pass the now deprecated
style of a scalar I/O definition used with a vectored net definition.
These changes did require extra code to prevent a single definition
from setting the range values in more than on place.
When using the new ANSI-C style of port declarations (1364-2001 12.3.4
list_of_port_declarations) the compiler ensures that you do not
redeclare the port in the body (it is already completely defined).
This caught a few errors in the test suite (pr859 and sqrt32*).
The flag to disable the normal port checking and allow the deprecated
port syntax is -gno-io-range-error. This will print a warning for the
case of a scalar port with a vectored definition in the body. All
other cases are still considered an error.
This patch adds better checking for a missing endmodule or an attempt
to nest modules. A more descriptive message is printed and the location
of the original module definition is printed.
It is possible for the compiler to generate logic gates that have
inputs from part select nodes. This implements the part select
input methods.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch fixes an incorrect optimization that was skipping a
call to set the port width when there was no width (a scalar).
The problem with this is that since a (0,0) pair was not added
to the list, later when the width was define to (1,0) the checking
code did not have the (0,0) to tell that there was a mismatch in
the port size. Section 12.3.3 States that the two sizes shall be
identical, so yes this is an error even though it is very minor.
This patch makes vpiFullName for real variables return the correct
value. A Scope reference was added to the base structure along with
the relevant code to support generating the full name. A couple of
memory leaks were plugged and some formatting fixed as well.
It appears that other simulators allow the second argument to
vpi_handle_by_name to be either a scope or a module. Allowing
a module in addition to a scope significantly increases the
usability of this function.
vpi_get_str() can now return a reasonable value for most of the
types used in vvp. I'm not certain I got all of them, but they
are easy to add if any are missing. I also fixed a couple of
typos that I found while looking for all the different types.
Real value constants have width 1 in Icarus Verilog. This is not
the same as the output from $bitstoreal, which is *not* a real
valued expression but a logic vector that losslessly carries the
real value.
Also remove unused CVS markings.
Signed-off-by: Stephen Williams <steve@icarus.com>
This patch adds the missing vpiFullName property to binary and
string parameters (FYI real parameters are not currently supported
by the VPI interface).
This patch implements the swrite* and sformat system tasks. It also
makes $simtime distinguishable from the other integer time tasks.
This was needed to get the correct time units when $simtime was given
as an argument to $swrite*. The string constant code was also modified
to allow a string to be returned as a vector (0/1 bit pattern).
Here are some more specifics about the swrite* changes.
1. They do not share formatting code with the other display functions,
so they may/will produce different results.
2. All %{alpha} codes allow a width and justification. Others have been
enhanced (%t allows the default width and precision to be overridden,
time functions print with time formatting, better error checking and
messages, etc.).
3. %u and %z formatting codes have been added. It is important to note
that these two formats can produce embedded NULLs, since these
functions are returning a string anything after the first NULL will
not be reachable! memcpy is used instead of regular string processing
where needed so that the original string will contain the total
result. The size returned when the string is created is the true
length. A warning will be printed if a string with embedded NULLs is
produced (strlen() does not match the true length).
4. Real numbers are printed with %g instead of %f.
Once this new formatting code has been evaluated we should incorporate
the changes/fixes into the formatting code for the other functions or
the other functions could be modified to use this new code. The true
string length is available so we should be able to work around the
embedded NULL problem.
The calculated return value for the calculated strength value of
a net was left dangling. This patch fixes that. See pr1770199 in
the regression test suite.
Signed-off-by: Stephen Williams <steve@icarus.com>
Cary R
Stephen Williams
Larry Doolittle
yang yun ju
Martin Whitaker