steve
aa8869a3c7
Postpone parameter width check to evaluation.
2002-11-09 01:40:19 +00:00
steve
86032c0aa5
Allow named events to be referenced by
...
hierarchical names.
2002-11-02 03:27:51 +00:00
steve
9ce2806710
Fix synth2 handling of aset/aclr signals where
...
flip-flops are split by begin-end blocks.
2002-10-23 01:45:24 +00:00
steve
3d4593d4d5
Synthesizer support for synchronous begin-end blocks.
2002-10-21 01:42:08 +00:00
steve
43501809b1
Redo the parameter vector support to allow
...
parameter names in range expressions.
2002-10-19 22:59:49 +00:00
steve
166621bcb3
Generate vvp code for asynch set/reset of NetFF.
2002-09-26 03:18:04 +00:00
steve
879a5a4cbe
Synthesize async set/reset is certain cases.
2002-09-26 01:13:14 +00:00
steve
eb81062d85
Add to synth2 support for synthesis of
...
synchronous logic. This includes DFF enables
modeled by if/then/else.
2002-09-16 00:30:33 +00:00
steve
dac99b9374
Add support for binary nand operator.
2002-09-12 15:49:43 +00:00
steve
8ab2ec6f86
Allow release to handle removal of target net.
2002-08-19 00:06:11 +00:00
steve
2fad8d4cff
Detect temporaries in sequential block synthesis.
2002-08-18 22:07:16 +00:00
steve
c794aa02b8
Fix intermix of node functors and node delete.
2002-08-16 05:18:27 +00:00
steve
52bf4e613f
conditional ident string using autoconfig.
2002-08-12 01:34:58 +00:00
steve
693e9e5ad0
Store only the base name of memories.
2002-08-05 04:18:45 +00:00
steve
89314d4772
Do not use hierarchical names of memories to
...
generate vvp labels. -tdll target does not
used hierarchical name string to look up the
memory objects in the design.
2002-08-04 18:28:14 +00:00
steve
bb87c368b8
Asynchronous synthesis of sequential blocks.
2002-07-29 00:00:28 +00:00
steve
58ec62c895
Rewrite find_similar_event to support doing
...
all event matching and replacement in one
shot, saving time in the scans.
2002-07-24 16:24:45 +00:00
steve
8114523be2
Asynchronous synthesis of case statements.
2002-07-07 22:32:15 +00:00
steve
3f1cd14f6c
Fix scope search for events.
2002-07-03 05:34:59 +00:00
steve
93bb4283b8
Change the signal to a net when assignments go away.
2002-07-02 03:02:57 +00:00
steve
d5e9e13555
synth_asych of if/else requires redirecting the target
...
if sub-statements. Use NetNet objects to manage the
situation.
2002-07-01 00:54:21 +00:00
steve
9b6b081e38
Add structure for asynchronous logic synthesis.
2002-06-30 02:21:31 +00:00
steve
9fc4e1eddd
Cache calculated driven value.
2002-06-25 01:33:22 +00:00
steve
58c2e12507
Make link_drive_constant cache its results in
...
the Nexus, to improve cprop performance.
2002-06-24 01:49:38 +00:00
steve
f9768cd579
spelling error.
2002-06-23 18:22:43 +00:00
steve
5eca5d9948
Carry integerness throughout the compilation.
2002-06-21 04:59:35 +00:00
steve
cd94019733
Remove NetTmp and add NetSubnet class.
2002-06-19 04:20:03 +00:00
steve
9cef973d9b
Add NetRamDq synthsesis from memory l-values.
2002-06-08 23:42:46 +00:00
steve
53d8cdd9f8
Add support for memory words in l-value of
...
non-blocking assignments, and remove the special
NetAssignMem_ and NetAssignMemNB classes.
2002-06-05 03:44:25 +00:00
steve
91a755d0e8
Add support for memory words in l-value of
...
blocking assignments, and remove the special
NetAssignMem class.
2002-06-04 05:38:43 +00:00
steve
422754f36f
Support carrying the scope of named begin-end
...
blocks down to the code generator, and have
the vvp code generator use that to support disable.
2002-05-27 00:08:45 +00:00
steve
bfad382fd1
Carry Verilog 2001 attributes with processes,
...
all the way through to the ivl_target API.
Divide signal reference counts between rval
and lval references.
2002-05-26 01:39:02 +00:00
steve
e6c0629626
Add language support for Verilog-2001 attribute
...
syntax. Hook this support into existing $attribute
handling, and add number and void value types.
Add to the ivl_target API new functions for access
of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
steve
8667b9a35d
Put off evaluation of concatenation repeat expresions
...
until after parameters are defined. This allows parms
to be used in repeat expresions.
Add the builtin $signed system function.
2002-05-05 21:11:49 +00:00
steve
5882c6a481
Redo handling of assignment internal delays.
...
Leave it possible for them to be calculated
at run time.
2002-04-21 22:31:02 +00:00
steve
9dda15a186
implement nex_input for behavioral statements.
2002-04-21 17:43:12 +00:00
steve
b094bbdcf4
Add support for conbinational events by finding
...
the inputs to expressions and some statements.
Get case and assignment statements working.
2002-04-21 04:59:07 +00:00
steve
b7c2bd4f72
Add the NetUserFunc netlist node.
2002-03-09 02:10:22 +00:00
steve
364ffc9024
Add support for bit select of parameters.
...
This leads to a NetESelect node and the
vvp code generator to support that.
2002-01-28 00:52:41 +00:00
steve
349be0f169
Precalculate constant results of memory index expressions.
2002-01-22 01:40:04 +00:00
steve
608555ce7e
Pass back target errors processing conditionals.
2002-01-19 19:02:08 +00:00
steve
51db00fb44
Support $signed cast of expressions.
2001-12-31 00:08:14 +00:00
steve
ab6c8cb4b8
Parser and pform use hierarchical names as hname_t
...
objects instead of encoded strings.
2001-12-03 04:47:14 +00:00
steve
e85347bf8b
Handle part selects in l-values of DFF devices.
2001-11-29 01:58:18 +00:00
steve
f28f5e01e5
Unary reduction operators are all 1-bit results.
2001-11-19 04:26:46 +00:00
steve
08f0f5a1f7
DLL target support for force and release.
2001-11-14 03:28:49 +00:00
steve
0c7335a77d
Spelling errors.
2001-11-09 03:43:26 +00:00
steve
7793a49854
Remove string paths from PExpr elaboration.
2001-11-08 05:15:50 +00:00
steve
1ff36dc892
shift expressions can have definite widths.
2001-11-06 04:32:37 +00:00
steve
75e78e86d3
ivl_target support for assign/deassign.
2001-10-31 05:24:52 +00:00