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90 Commits

Author SHA1 Message Date
steve 219df169a3 Generalize the evaluation of floating point delays, and 
get it working with delay assignment statements.

 Allow parameters to be referenced by hierarchical name.
 2001-01-14 23:04:55 +00:00
steve a64a4d7a9b Fixes to support compilation using vpath. 2001-01-09 03:11:27 +00:00
steve 40da501cec Add the pal loadable target. 2000-12-09 01:17:38 +00:00
steve f6507cba43 Check lvalue of procedural continuous assign (PR#29) 2000-12-06 06:31:09 +00:00
steve 4f638882c9 Add Attrib class for holding NetObj attributes. 2000-12-04 17:37:03 +00:00
steve 4faec154f0 Finally remove the verilog.sh script. 2000-12-02 05:57:46 +00:00
steve ff53b60c66 Remove excess *.d dependencies for parse.d 2000-12-02 05:30:08 +00:00
steve d0ec7e2c02 Make the null target into a loadable target. 2000-12-02 04:50:32 +00:00
steve ef49fc127f Change LineInfo to store const C strings. 2000-11-30 17:31:42 +00:00
steve 28af357c8a Clean a bit more completely. 2000-11-29 23:59:29 +00:00
steve f7d62b96aa whoops, wrong copyright notice. 2000-11-21 03:55:20 +00:00
steve 197ed46b26 configure bindir and libdir 2000-11-11 00:48:35 +00:00
steve 23a5bd072d Remove the compiled in Verilog target. 2000-10-28 22:35:58 +00:00
steve 10fbb2a1bb Glitches in cygwin build process. 2000-10-28 19:12:43 +00:00
steve 72229abda6 check explicitly uses local libraries. 2000-10-28 17:51:45 +00:00
steve 431228e881 make check target (PR#3) 2000-10-28 03:58:11 +00:00
steve 90ae46476c Makefile patches to support target loading under cygwin. 2000-10-15 21:02:08 +00:00
steve 5ce28c193a iverilog with an iverilog.conf configuration file. 2000-10-08 22:36:55 +00:00
steve 41f3ba65a1 xor and constant devices. 2000-10-05 05:03:01 +00:00
steve 9680de25cd Fix the clean target and excess dependencies. 2000-10-04 17:08:31 +00:00
steve b34a451cbc Cygwin port changes from Venkat 2000-09-30 03:20:47 +00:00
steve 80c69d565b Add enough tgt-verilog code to support hello world. 2000-09-23 05:15:07 +00:00
steve 13c1378666 Remember to make the includedir. 2000-09-20 01:02:13 +00:00
steve effc84c46d Get the structure for ivl_statement_t worked out. 2000-09-18 01:24:32 +00:00
steve 89d7176734 Add support for modulus (Eric Aardoom) 2000-09-17 21:26:15 +00:00
steve b6ce313e91 move lval elaboration to PExpr virtual methods. 2000-09-09 15:21:26 +00:00
steve ac81f6a201 Rearrange NetAssign to make NetAssign_ separate. 2000-09-02 20:54:20 +00:00
steve d0fc6d515d Add ivl_target support for logic gates, and 
make the interface more accessible.
 2000-08-20 04:13:56 +00:00
steve 566aad9e15 Start stub for loadable targets. 2000-08-12 16:34:37 +00:00
steve 42e4ff47c8 Move inital value handling from NetNet to Nexus 
objects. This allows better propogation of inital
 values.

 Clean up constant propagation  a bit to account
 for regs that are not really values.
 2000-07-14 06:12:56 +00:00
steve 79ca317c1d Better handle failures to build lexor_keyword.cc 2000-07-11 23:07:28 +00:00
steve 18eb34921f Add support for non-constant delays in delay statements, 
Support evaluating ! in constant expressions, and
 move some code from netlist.cc to net_proc.cc.
 2000-07-07 04:53:53 +00:00
steve 583868e74e Redesign Links to include the Nexus class that 
carries properties of the connected set of links.
 2000-06-25 19:59:41 +00:00
steve bec4a205ec Do not install bin/verilog. 2000-06-16 18:59:49 +00:00
steve 3d85c66b02 Do not install obsolete verilog script. 2000-06-07 03:52:55 +00:00
steve 3c9902d93e Use yacc based synthesizer. 2000-05-13 20:55:47 +00:00
steve b44abcd481 Get rid of gverilog source. 2000-05-12 05:23:15 +00:00
steve 367db72c99 Add support for procedural continuous assignment. 2000-05-11 23:37:26 +00:00
steve e9742c662b no need for nobufz functor. 2000-05-08 05:29:43 +00:00
steve f95b082339 More features of ivl available through iverilog. 2000-05-03 22:14:31 +00:00
steve 1db70a0c46 Move signal elaboration to a seperate pass. 2000-05-02 16:27:38 +00:00
steve b175e4aef7 Better inc and lib paths for iverilog. 2000-05-01 23:55:22 +00:00
steve 08e9a114a2 Catch memory word parameters to tasks. 2000-04-28 16:50:53 +00:00
steve 1412eb2697 iverilog man page. 2000-04-26 20:53:21 +00:00
steve c0d51dd2eb Add the iverilog driver program. 2000-04-21 06:41:02 +00:00
steve 2094a2f466 Catch some simple identity compareoptimizations. 2000-04-20 00:28:03 +00:00
steve 4493e968da Finally remove the NetNEvent and NetPEvent classes, 
Get synthesis working with the NetEvWait class,
 and get started supporting multiple events in a
 wait in vvm.
 2000-04-12 20:02:52 +00:00
steve 30e8289239 Simulate named event trigger and waits. 2000-04-04 03:20:15 +00:00
steve 2dd010dc04 Named events as far as the pform. 2000-04-01 19:31:57 +00:00
steve d97ab9be23 New and improved combinational primitives. 2000-03-29 04:37:10 +00:00