645ee2003f
Translation for unary not
2008-06-12 10:56:28 +01:00
d6f1162547
Generate correct VHDL signal values
2008-06-12 10:50:46 +01:00
46991aa65c
Generate process bodies in the right place
2008-06-12 10:47:52 +01:00
7eb41304e6
Generate rising/falling edge detectors
2008-06-12 10:36:38 +01:00
24da00bd5a
Add value change callback for vpiPartSelect.
...
The __vpiPV objects express themselves as vpiPartSelect objects.
Add support for value change callbacks by attaching the callback
to the signal that we part select from.
2008-06-11 21:28:21 -07:00
34efc7db51
Add parameter time/realtime types and other fixes.
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This patch adds the time and realtime types to parameters
and local parameters. It also makes the width (range) of
an integer parameter match the variable "integer_width"
(normally 32 bits). It also converts a real value to
an integer when a range is implicitly or explicitly
given. This all matches what the standard specifies.
Fixed an error in converting -1 to a unsized verinum.
2008-06-11 19:48:15 -07:00
acf010326c
Remove the signed/unsigned comparison warning
2008-06-11 19:44:21 -07:00
d7814ed767
Better handle some vector size matters for %load/v
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The %load/v instruction was doing some spurious resizes of the vector
that comes from the signal. Eliminate those resizes that can be
removed, and optimize some that remain.
2008-06-11 14:38:35 -07:00
19e60b698f
Translate if statements
2008-06-11 14:20:05 +01:00
a7cfdc3a87
Add VHDL if statement to AST types
2008-06-11 14:11:37 +01:00
b010b8e3ca
Use `assert false' as initial translation of $finish
2008-06-11 13:37:21 +01:00
26a2c69c2e
Change architecture name to `FromVerilog'
2008-06-11 11:31:43 +01:00
608bad26cf
Allow &A<> argument syntax to take a reference to a VPI object.
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This allows the array index to be evaluated when the word is accessed,
and that in turn allows access in the ROSYNC scheduler phase to work
properly.
2008-06-10 20:36:31 -07:00
70768176f9
Change bit select instruction to a part select.
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There is no point in having a bit select instruction and running it in
a loop (always) when we can simply turn it into a part select instruction.
2008-06-10 17:29:47 -07:00
694a6ed4a1
Remove some unused opcodes.
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Codes from a dfiferent era.
2008-06-10 16:33:34 -07:00
dc15fa965b
Remove MinGW unused variable warning
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This patch moves the definition of rtn into the non-MinGW
branch since that is the only place it is used.
2008-06-10 15:42:56 -07:00
d78739d163
Make &PV<> put_value work correctly.
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This patch finishes the put_value routine for &PV<>. It should
now work as expected.
2008-06-10 15:07:52 -07:00
d90ce68f5d
Spelling fixes
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No code changes.
2008-06-10 15:02:18 -07:00
d2c52ff35b
Spelling fixes
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No code changes.
2008-06-10 15:00:54 -07:00
813b4cf74c
Add explicit parentheses to elaborate_expr_param_part_
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Removes gcc-4.3 warning: suggest parentheses around && within ||
2008-06-10 14:57:50 -07:00
a437b38270
Fix vpip_make_vthr_A prototype with duplicate parameters
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Causes FTBFS with gcc-4.3
2008-06-10 14:56:55 -07:00
f9d060146c
Merge branch 'master' of ssh://steve-icarus@icarus.com/~steve-icarus/git/verilog
2008-06-10 14:18:30 -07:00
7f0c6b9c21
Fix access to deleted memory.
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When parameters are replaced, the expression that is replaced is deleted
so make sure the pointer in the map is properly updated. Also, make sure
the defparam expression itself is not deleted because it is used to
print messages, such as design dumps.
2008-06-10 13:25:40 -07:00
5a7cfd8c02
Clean up vhdl_comp_inst
2008-06-10 14:00:15 +01:00
babe694366
Generate port mappings
2008-06-10 13:58:41 +01:00
7560b29fb9
Find signals to map together
2008-06-10 12:21:48 +01:00
f6753a9013
Add ports to component declarations
2008-06-10 11:24:16 +01:00
647e53bcbb
Make &A<> use the same thread access syntax as &PV<>.
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This patch makes &A<> use the same thread access syntax as
&PV<> this is two unsigned numbers separated by a space
instead of a single number.
2008-06-09 21:26:36 -07:00
8439fc6c19
Remove two memory leaks.
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This patch removes two memory leaks. One in the driver and one
in the runtime.
2008-06-09 21:23:27 -07:00
6f61cf2e4e
A memory word is a number
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This will be cleaned up more once I finish all the compiletf
routines, but for now this allows the test to pass.
2008-06-09 20:00:03 -07:00
191187ed1b
Cosmetic change to avoid useless `null' statement after delay
2008-06-09 16:40:32 +01:00
1fb01d4d98
Emit port declarations
2008-06-09 16:37:05 +01:00
3106fe0ed6
Generate port declarations for entities.
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But doesn't emit them yet!
2008-06-09 16:27:04 +01:00
e29954e03f
Generate concurrent assignments from logic gates
2008-06-09 15:05:32 +01:00
3b5d56e087
Allow n-ary expressions
2008-06-09 14:53:50 +01:00
aa91186119
Add AST elements for unary/binary expressions to model logic gates
2008-06-09 14:39:58 +01:00
d08f5af9c6
Add concurrent assignments
2008-06-09 14:21:55 +01:00
b96e471fa2
Stub code for handling logic gates
2008-06-09 14:08:27 +01:00
7120ab7b13
Expression type might be null in some cases
2008-06-09 12:54:21 +01:00
2f5dcda3b6
Delay statements now translated correctly
2008-06-09 12:49:38 +01:00
120b5dc80e
Add constant integers
2008-06-09 12:46:55 +01:00
d762253f74
Wait statements
2008-06-09 12:40:59 +01:00
a2dc1e0a29
Add means for &A<> to index using a calculated index.
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This is not a solution to all the problems, but is a better catch-all
then what is currently there. Allow the index field to be a T<> that
accesses the thread to get the address index.
Note that the lexor.lex currently returns the T<> as a T_SYMBOL, and the
users of T_SYMBOL objects need to interpret the meaning. This is
probably not the best idea, in light of all the other *<> formats that
now exist.
2008-06-08 21:38:35 -07:00
6a1235ac28
Rework parameter indexed part select up.
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Indexed part select reworked to be more compact and more like the
part select.
2008-06-08 19:29:00 -07:00
7aebff2a86
Fix up parameter name part select
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Part select of parameter names is fixed up to be structurally similar
to part select of signals, and also to behave similarly. (Though not
identically, for reason.)
2008-06-08 07:34:45 -07:00
1d28b935e8
Split vhdl_element.cc into multiple files
2008-06-08 13:27:48 +01:00
4b4a1c6cac
Tidy up type casting
2008-06-08 12:55:18 +01:00
110a1b2ac7
Replace type classes with enumeration
2008-06-08 12:48:56 +01:00
79558910d1
Catch case where NULL return wasn't detected
2008-06-07 16:44:01 +01:00
fbf85398da
Support converting bit strings to std_logic
2008-06-07 16:19:10 +01:00
Nick Gasson
Stephen Williams
Cary R
Larry Doolittle