Commit Graph

6709 Commits

Author SHA1 Message Date
Cary R 4c6a5bbd89 Update PSpecPath to take the polarity and full_flag when constructed
To avoid a variables not initialized in the construct this patch modifies
the PSpecPath class to take the polarity and full_flag as arguments to
the constructor.
2011-11-22 19:39:26 -08:00
Cary R 5b1e2c8c6c Update the cppcheck suppression file in the vpp directory.
Recent code changes moved the line that was being suppressed to a
different line. This patch updates the suppression file to match the
current code.
2011-11-22 19:30:53 -08:00
Stephen Williams 7e9d41da11 Add the -mvpi_debug VPI module.
This is a place to store interesting debug tools for VPI.
For starters, there is $vpi_tree function.
2011-11-20 15:08:23 -08:00
Stephen Williams 5758798923 Improve version tag from git.
The --always flag to git describe is harmless in the normal case,
and helpful in some special cases. Also add the --dirty flag to
get extra interesting details.
2011-11-19 09:04:21 -08:00
Cary R f880b78b2b For wire and/or nets we need all the net resolution to be and/or.
If a wired and/or net has more than four connections all the other
resolution branches must also be wired and/or. All other nets can
just be tri since tri0/tri1 only needs the final resolution to be
an active pull up/down.
2011-11-19 08:44:19 -08:00
Cary R 36d298a2b6 Assert that sync/async set/clear are not supported for a DFF primitive.
Since synthesis is not currently supported we do not support/generate
sync/async set or clear control inputs. This is further complicated by
the fact that the VVP DFF primitive is not fully implemented.
2011-11-17 14:33:00 -08:00
Cary R bcb963a235 Fix Cygwin compile problem (replace abs() call with ?:
This patch fixes a compile problem in Cygwin where there are two
definitions for abs() that do not match so the C++ code doesn't know
which one to call. To avoid the whole mess replace the call to abs()
with the appropriate ?: construct.
2011-11-17 14:30:33 -08:00
Cary R 4fe7561e74 Report that a vectored full connection only supports a single src/dst
In a specify block a full connection is defined to only support a single
source and destination path. This patch adds an error message when this
is found, except we skip the error if all the paths are a single bit
wide. This exemption was added to match the functionality found in
NC-Verilog and presumably Verilog-XL.

A message was also added in place of an assert if the source signals was
not found in the current scope.
2011-11-10 17:55:50 -08:00
Cary R 24b6264318 Remove wide input valgrind warnings.
Both UDPs and system functions use the wide input functor. This patch
modified the code generator to create a local net declaration for the
output net if we have either a delay or modpath connecting the output
to the true output. This is needed so that the wide input can be
cleaned up correctly.

Local real nets were also added to the local net pool when testing with
valgrind. This allows them to be cleaned up at the end.
2011-11-10 17:53:08 -08:00
Cary R f415c744ad Cleanup unneeded vectors in a delay after initialization.
For a delay we do not know exactly what type we will be propagating
until the initialization event has happened. Because of this we
allocate both a vec4 and a vec8 value. Once the initialization event
has happened we can free the unneeded element(s).
2011-11-10 17:49:51 -08:00
Cary R b1869f80ab Add check that a parallel connection uses the same width input/output.
This patch uses the full_flag to verify that the input and output have the
same width for a parallel connection. Icarus always uses a full connection
so this is just a portability issue with other simulators.

The pform dump code was also modified to correctly display the polarity
and full/parallel connection type.
2011-11-10 17:43:35 -08:00
Stephen Williams 5e4c0c9783 Merge branch 'master' into work9 2011-11-06 10:27:40 -08:00
Stephen Williams aa662e1ae1 System Verilog tasks can have multiple statements.
The begin/end block that wraps the statements can be implicit.
2011-11-06 10:07:43 -08:00
Stephen Williams fc44658dad Handle empty argument list to system function. (SystemVerilog) 2011-11-06 09:13:09 -08:00
Stephen Williams 8e0beff3ab Handle arrays of vectors in VHDL types.
This incidentally adds binding of generic to generic instantation.
2011-11-06 09:01:02 -08:00
Stephen Williams c1be255844 Fix dump display of array ranges. 2011-11-05 17:22:30 -07:00
Stephen Williams cc508d1626 Support write_to_stream for arithmetic expressions. 2011-11-05 15:55:41 -07:00
Stephen Williams 2063c5ee9d Support VHDL user defined array types. 2011-11-05 15:55:17 -07:00
Cary R 27cb140cb4 Fix space issues.
This patch removes space before EOL, etc.
2011-11-03 19:18:30 -07:00
Martin Whitaker 58d182bdf3 Compiler fixes for MinGW.
In MinGW, when parameters are passed to vhdlpp by ivlpp, single quotes
are treated as ordinary characters. Use double quotes instead, as is
done in the driver.

Also, MinGW does not have a standard mkdir() function, so we need to
convert calls to mkdir() into calls to _mkdir().
2011-11-03 19:11:28 -07:00
Ole Henrik Jahren d2dc0e535f Add missing hyphen to --ldlibs option in iverilog-vpi man page 2011-11-03 19:08:10 -07:00
Cary R 09e083c369 Update cppcheck suppression to match latest GTkWave files. 2011-11-03 19:06:19 -07:00
Cary R 7d588d699b Use UINT_MAX instead of -1 to set unsigned to maximum value.
The Sun C compiler warns when -1 is used to initialize an unsigned.
2011-10-31 17:20:55 -07:00
Cary R ff309fb04f Reduce the error when scaling a real time value.
When scaling a time value we would often use the power operator to
create constants 10**-N that were then multiplied with the original
value. The problem with this is that there is some errors in the
representation of the fractional number. It is better to create a
integer value 10**N and then divide the original value by this
exact constant. You still have the calculation error, but the scale
value is now an exactly real value.
2011-10-31 10:44:00 -07:00
Cary R 5fbffe24cc Remove old comment. 2011-10-31 10:38:40 -07:00
Cary R edc67fce40 Major rework of the $sscanf()/$fscanf() code.
Add support for %m, suppression '*' and a maximum field width along with
a number of other fixes/enhancements. There is still no support for
%u, %v or %z.
2011-10-31 10:38:14 -07:00
Cary R 073083f3d9 Make some messages consistent in sys_icarus.c.
This patch makes some of the VPI messages consistent with the rest.
2011-10-31 10:32:20 -07:00
Martin Whitaker c4433e47c1 Restore ability to supply LDFLAGS to MinGW configure.
The fix to get a C99 compliant strtod() in MinGW mistakenly set the
LDFLAGS value rather than appending to it. This meant that a LDFLAGS
supplied by the user on the configure command line would be ignored.
2011-10-31 10:28:12 -07:00
Stephen Williams 98d928f6e0 Add support for VHDL for-generate 2011-10-30 17:10:19 -07:00
Stephen Williams 5724f71339 Elaborate expressions for entity generics. 2011-10-29 17:07:03 -07:00
Stephen Williams 15da45f7cb VHDL initialization expressions for signals. 2011-10-29 17:06:40 -07:00
Stephen Williams 37ef14b1c8 Implement VHDL conf_std_logic_vector() as SystemVerilog size cast. 2011-10-29 14:47:39 -07:00
Martin Whitaker 7f62579524 Fix for tf_getlongsimtime link error on MinGW/Cygwin.
MinGW and Cygwin don't currently support weak function definitions.
For these platforms, make tf_getlongsimtime a strong symbol.
2011-10-26 18:46:27 -07:00
Martin Whitaker b6cb065404 Workaround for MinGW non-standard strtod.
MinGW has reverted to using the Microsoft msvcrt0 implementation
of the strtod() function. This implementation doesn't accept "INF"
"NaN". MinGW does provide a C99 compliant implementation of this
function called __strtod(). We need to force the linker to replace
all references to strtod() with references to __strtod().
2011-10-26 18:42:42 -07:00
Cary R 0b978dac48 Update fstapi.c to latest from GTkWave
There was a change in how the FST data was flushed.
2011-10-26 18:41:45 -07:00
Cary R 8bafb18db1 Report that forcing a word to/from a variable array in not supported.
This patch adds error messages that forcing a word to/from a variable
array is not currently supported. This is because variable arrays no
longer are fully populated and don't have an access functor for each
word. Forcing a word from/to a net array does work as expected since
each word in a net array is created.

Technically forcing a variable array word is not supported in 1364-2005.
Reading from an array word, which is supported,  will be fixed in
development once the expression rework is finished.

The error message printed when forcing a bit/part select l-value was
also improved.
2011-10-26 18:38:33 -07:00
Cary R b2395aa67e Improve the out of range check in tgt-vhdl/stmt.cc
Promote the unsigned values to long to get a good comparison and on a
machine where an unsigned is the same size as a long (32 bit) assert
that the unsigned values are constrained to fit into a long. It's unlikely
the values needed to create invalid results would ever happen, but this
patch makes sure it doesn't go undetected.
2011-10-26 18:36:35 -07:00
Stephen Williams 4f98a6d181 Rewire VHDL addition expression parsing.
The VHDL LRM addition expression rules are ... different.
2011-10-23 17:31:58 -07:00
Stephen Williams 2be682f8a5 Support VHDL component instantiations with generics as Verilog parameters. 2011-10-23 17:08:48 -07:00
Cary R 79b507ea46 Remove some scan-build warnings tgt-vlog95.
Remove an unneeded assignment.
2011-10-20 16:53:52 -07:00
Cary R f5acd8d135 Remove some scan-build warnings.
One of these is a real bug, the others are just minor optimizations.
2011-10-20 16:53:43 -07:00
Cary R b9af189229 Update various dumper files from GTKWave SVN
Update some of the files we get from GTKWave to match the latest from SVN.
2011-10-20 16:48:45 -07:00
Cary R 7a8ac008bb Remove some gcc/g++ (4.6.1) warnings.
This patch remove some unused variable warnings found with gcc/g++ 4.6.1
on Ubuntu 11.10.
2011-10-19 15:01:24 -07:00
Cary R 8f6062799e If there are no opcodes then just delete the code space.
If there are no opcodes then the various checks access an undefined
opcode, so just delete the code space for this case.
2011-10-19 14:59:59 -07:00
Cary R 59c4209347 Remove a memory leak in enum next()/prev() code.
Some of the last changes I added to the enumeration next()/prev() code
introduced a memory leak under some situations. This patch fixes the
leak by freeing the iterator before the new one is created.
2011-10-19 14:58:33 -07:00
Cary R 8977248ee2 For valgrind testing remove the UDP functionality object.
When checking with valgrind we need to remove the UDP functionality
object to avoid a reported memory issue.
2011-10-19 14:56:30 -07:00
Cary R 7a75f94eda Move UDP name to the UDP base class.
The name is not currently used, but when it is it makes sense for it to
be in the base class. Also the name cannot be deleted after compiling
since it may be used later.
2011-10-19 14:46:15 -07:00
Martin Whitaker 1e814cfc1e Fix for pr3420994.
The VPI object data model diagrams show a one to many relationship
between the "mod path" and "path term" objects. This means that the
correct way to obtain handles to "path term" objects is to use the
vpi_iterate and vpi_scan functions.

Support for the old method of obtaining handles to "path term" objects
using the vpi_handle function is retained for backwards compatibility.
2011-10-19 14:37:20 -07:00
Stephen Williams eeeadea3ac Fix recently broken write of vhdl packages to work space. 2011-10-16 12:18:34 -07:00
Stephen Williams a109df04bb Proper expression type for vhdl relation expressions. 2011-10-16 11:02:07 -07:00