Commit Graph

5049 Commits

Author SHA1 Message Date
Nick Gasson 9f6f711f8d Remove unused variable 2008-07-29 21:08:50 +01:00
Nick Gasson 9a5b7bb0b0 Connect signals together if joined in a nexus 2008-07-29 21:03:00 +01:00
Nick Gasson eaf1cc9120 Fix assertion failure with arrayed signals 2008-07-29 19:47:17 +01:00
Nick Gasson 3bcd42dc8f Fix case where logic device has no valid output 2008-07-29 19:39:20 +01:00
Nick Gasson 744fbed783 Finish re-writing nexus code 2008-07-29 19:33:40 +01:00
Nick Gasson c9454b346e Fix module3.12B 2008-07-29 19:04:41 +01:00
Nick Gasson 5ec2c37e7e Get functions working again 2008-07-29 15:29:49 +01:00
Nick Gasson 25602e487d Comment 2008-07-29 15:12:51 +01:00
Nick Gasson e037ffd952 Create temporaries for LPM outputs 2008-07-29 15:09:58 +01:00
Nick Gasson 48c1a7982c Make seen_nexus private 2008-07-29 14:24:04 +01:00
Nick Gasson a842b327c7 Generate constant drivers as concurrent assignments 2008-07-29 14:02:05 +01:00
Nick Gasson f8034d69ef Fix constants in nexuses 2008-07-29 13:30:54 +01:00
Nick Gasson d94dac28a8 Remove redundant lpm_output 2008-07-29 13:08:13 +01:00
Nick Gasson 680c6f0503 Make sure LPMs have valid inputs/outputs 2008-07-29 13:06:21 +01:00
Nick Gasson 39717989a8 Call set_active_entity in the right places 2008-07-29 13:04:29 +01:00
Nick Gasson c26b7ce675 Port maps 2008-07-29 13:02:55 +01:00
Nick Gasson c6f6ea7358 Instantiation working again 2008-07-29 12:21:19 +01:00
Nick Gasson c0c838f1bc Logic devices now working again 2008-07-29 12:11:44 +01:00
Nick Gasson 1a45e9164f Find signal a logic device is connected to 2008-07-29 12:04:40 +01:00
Nick Gasson 8a5f129e56 Draw nexus in multiple passes 2008-07-29 12:00:26 +01:00
Nick Gasson 65c2ceb89d Build entity hierarchy in separate stages 2008-07-29 11:01:02 +01:00
Nick Gasson 7a2e9c02cd Simplify support function emitting code 2008-07-28 22:48:21 +01:00
Nick Gasson f88415b1d7 Conversion of std_logic to integer 2008-07-28 22:46:39 +01:00
Nick Gasson 1250010696 Merge branch 'vhdl' of git@github.com:nickg/iverilog into vhdl
Conflicts:

	tgt-vhdl/support.cc
2008-07-28 21:47:37 +01:00
Nick Gasson 506a0ba7d6 Support repeat in concatenation 2008-07-28 21:46:19 +01:00
Nick Gasson 1d4914c590 Undo last commit 2008-07-28 13:04:30 +01:00
Nick Gasson 3e28a10676 Compress support function names a bit 2008-07-28 13:02:04 +01:00
Nick Gasson 78028a3310 Fully support ternary expressions 2008-07-28 12:59:10 +01:00
Stephen Williams 25a27f9dd9 Parse contribution statements as far as pform.
Contribution statements have an l-value and r-value. Parse those
expressions into pform so that elaboration has something to work with.

In this process, this patch also changes the PECallFunction class to
use the vector template instead of the svector template. The latter
doesn't add anything over the STL vector template, so this is a start
of working the svector out.
2008-07-27 17:22:19 -04:00
Stephen Williams 03e306c805 Infrastructure for parsing analog process statements.
Organize the parsing infrastructure for parsing analog processes,
including holding them in scopes, and collecting analog statements.
2008-07-27 15:02:09 -04:00
Nick Gasson b9cecbef64 Make sure LPM comparison result is std_logic not Boolean 2008-07-27 19:05:49 +01:00
Nick Gasson 8b32096e2a Convert std_logic to Boolean in loop tests 2008-07-27 18:39:16 +01:00
Nick Gasson ba462eb8b7 Merge branch 'vhdl' of git@github.com:nickg/iverilog into vhdl 2008-07-25 20:00:26 +01:00
Nick Gasson 5a09819729 Catch case of select expression on non-variable 2008-07-24 16:00:12 +01:00
Nick Gasson d3296d4895 Refactor while/for loop code to use common base 2008-07-24 15:22:25 +01:00
Nick Gasson 39c9c54760 Add repeat statement 2008-07-24 14:52:06 +01:00
Nick Gasson 8bee5b1108 Add `forever' statement type 2008-07-24 14:30:10 +01:00
Nick Gasson e4c2400eb2 Refactor the expression->time code into a single function 2008-07-23 16:18:49 +01:00
Nick Gasson 1409207def Correctly indent case statements 2008-07-23 14:31:41 +01:00
Nick Gasson 30fdadc525 Support delays in logic devices 2008-07-23 13:40:42 +01:00
Nick Gasson a5db0297b0 Unary minus 2008-07-22 15:44:29 +01:00
Nick Gasson e25f946ac0 Merge branch 'vhdl' of file:///media/disk/data/iverilog/ into vhdl 2008-07-21 15:20:42 +01:00
Nick Gasson 2f4f075005 Typo 2008-07-21 15:20:40 +01:00
Nick Gasson 3ca85491ee Unary AND and XOR 2008-07-20 16:41:57 +01:00
Nick Gasson d8351ec1b2 Fix reduction OR in procedural code 2008-07-20 15:13:20 +01:00
Nick Gasson 77508b9afa Reduction OR operator 2008-07-20 15:10:00 +01:00
Nick Gasson 38de6ebf3a Compress support function definitions a bit 2008-07-19 21:04:52 +01:00
Nick Gasson af3ee49f57 Refactor support function code a bit 2008-07-19 20:49:55 +01:00
Nick Gasson 0cb6ea34d7 Move type conversion code into a separate file 2008-07-19 15:23:47 +01:00
Nick Gasson b6df73d3b9 Support functions for converting (un)signed -> boolean 2008-07-19 15:15:16 +01:00