444c83b19a
set width of procedural r-values when then
...
l-value is a memory word.
1999-08-01 21:48:11 +00:00
dd8daf40df
elaborate rise/fall/decay for continuous assign.
1999-08-01 21:18:55 +00:00
71d35f32b2
Parse and elaborate rise/fall/decay times
...
for gates, and handle the rules for partial
lists of times.
1999-08-01 16:34:50 +00:00
d2f77defe6
move binary operators to derived classes.
1999-07-31 03:16:54 +00:00
0c6775a094
Handle no ports at all for tasks.
1999-07-28 03:46:57 +00:00
fc8a6c52f8
Add support for task output and inout ports.
1999-07-24 19:19:06 +00:00
93a77a2efd
Elaborate task input ports.
1999-07-24 02:11:19 +00:00
563ec1bb81
Add support for CE input to XNF DFF, and do
...
complete cleanup of replaced design nodes.
1999-07-18 21:17:50 +00:00
a5921ceae8
netlist support for ternary operator.
1999-07-17 19:50:59 +00:00
772f38ca1e
Better handling of bit width of + operators.
1999-07-17 18:06:02 +00:00
13cd13d9d5
part select in expressions.
1999-07-17 03:08:31 +00:00
c2c9acdbaf
Construct delayed assignment as an equivilent block.
1999-07-13 04:08:26 +00:00
6852a62e5a
procedural blocking assignment delays.
1999-07-12 00:59:36 +00:00
aa938a309d
Proper initialization of registers.
1999-07-10 03:00:05 +00:00
c8d13d7a1c
Support concatenate in l-values.
1999-07-10 02:19:26 +00:00
3ff6912bdd
Elaborate user defined tasks.
1999-07-03 02:12:51 +00:00
1ec98ba7cf
Elaborate wide structoral bitwise OR.
1999-06-24 04:45:29 +00:00
11b2b1740a
Handle expression widths for EEE and NEE operators,
...
add named blocks and scope handling,
add registers declared in named blocks.
1999-06-24 04:24:18 +00:00
853ad247a1
Elaborate and supprort to vvm the forever
...
and repeat statements.
1999-06-19 21:06:16 +00:00
37b60a4c52
Clean up interface of the PWire class,
...
Properly match wire ranges.
1999-06-17 05:34:42 +00:00
fabb146342
Support case expression lists.
1999-06-15 05:38:39 +00:00
d0afc9adee
Get rid of the STL vector template.
1999-06-15 03:44:53 +00:00
740c63291a
l-value part select for procedural assignments.
1999-06-13 23:51:16 +00:00
6a823cde59
Unify the NetAssign constructors a bit.
1999-06-13 16:30:06 +00:00
988e4f0d3d
Add part select lvalues to AssignNB.
1999-06-13 04:46:54 +00:00
a22e43cb7a
Handle part selects as l-values to continuous assign.
1999-06-12 23:16:37 +00:00
7c2cf8b2fa
Add support for the Ternary operator,
...
Add support for repeat concatenation,
Correct some seg faults cause by elaboration
errors,
Parse the casex anc casez statements.
1999-06-10 04:03:52 +00:00
1464851e0e
Add support for procedural concatenation expression.
1999-06-09 03:00:05 +00:00
1fe8e93e5c
Support for binary | (Stephen Tell)
1999-06-09 00:58:06 +00:00
4932dc7c5e
Support non-blocking assignment down to vvm.
1999-06-07 02:23:31 +00:00
5959f3dfc7
Drop degenerate blocks.
1999-06-06 23:07:43 +00:00
7605a7b1f0
Add parse and elaboration of non-blocking assignments,
...
Replace list<PCase::Item*> with an svector version,
Add integer support.
1999-06-06 20:45:38 +00:00
caae00f1fd
Compile time evalutation of constant expressions.
1999-06-03 05:16:25 +00:00
f3a91a10b3
Line information with nets.
1999-06-02 15:38:46 +00:00
53b0050e54
Fix error message.
1999-05-31 15:45:35 +00:00
982cce6086
Exressions are trees that can duplicate, and not DAGS.
1999-05-30 01:11:46 +00:00
35893919e0
module parameter bind by name.
1999-05-29 02:36:17 +00:00
5ef3970714
Handle expression bit widths with non-fatal errors.
1999-05-27 04:13:08 +00:00
0352864470
Much expression parsing work,
...
mark continuous assigns with source line info,
replace some assertion failures with Sorry messages.
1999-05-20 04:31:45 +00:00
10ffaeda90
Redo constant expression detection to happen
...
after parsing.
Parse more operators and expressions.
1999-05-16 05:08:42 +00:00
5de9b7c9f1
Parse and elaborate the concatenate operator
...
in structural contexts, Replace vector<PExpr*>
and list<PExpr*> with svector<PExpr*>, evaluate
constant expressions with parameters, handle
memories as lvalues.
Parse task declarations, integer types.
1999-05-10 00:16:57 +00:00
b44ef063a8
Fix handling of null delay statements.
1999-05-05 03:04:46 +00:00
5d00f17448
Handle wide events, such as @(a) where a has
...
many bits in it.
Add to vvm the binary ^ and unary & operators.
Dump events a bit more completely.
1999-05-01 20:43:55 +00:00
41f9a84a4b
Handle much more complex event expressions.
1999-05-01 02:57:52 +00:00
ce49708442
Parse OR of event expressions.
1999-04-29 02:16:26 +00:00
09cfbc6240
Core handles subsignal expressions.
1999-04-25 00:44:10 +00:00
5895d3c98d
Add memories to the parse and elaboration phases.
1999-04-19 01:59:36 +00:00
b7f833dd71
Support more operators, especially logical.
1999-03-15 02:43:32 +00:00
13a6f05463
Prevent the duplicate allocation of ESignal objects.
1999-03-01 03:27:53 +00:00
e2a37a8ccd
Add support for module parameters.
1999-02-21 17:01:57 +00:00
e5f5f41515
Elaborate gate ranges.
1999-02-15 02:06:15 +00:00
30a3953c85
Turn the NetESignal into a NetNode so
...
that it can connect to the netlist.
Implement the case statement.
Convince t-vvm to output code for
the case statement.
1999-02-08 02:49:56 +00:00
8bdd381cdf
Parse and elaborate the Verilog CASE statement.
1999-02-03 04:20:11 +00:00
a7ad8985ac
Carry some line info to the netlist,
...
Dump line numbers for processes.
Elaborate prints errors about port vector
width mismatch
Emit better handles null statements.
1999-02-01 00:26:48 +00:00
fb439c78b9
Add the LineInfo class to carry the source file
...
location of things. PGate, Statement and PProcess.
elaborate handles module parameter mismatches,
missing or incorrect lvalues for procedural
assignment, and errors are propogated to the
top of the elaboration call tree.
Attach line numbers to processes, gates and
assignment statements.
1999-01-25 05:45:56 +00:00
10b345bd16
Fully elaborate Sequential UDP behavior.
1998-12-14 02:01:34 +00:00
9a73433759
Generate OBUF or IBUF attributes (and the gates
...
to garry them) where a wire is a pad. This involved
figuring out enough of the netlist to know when such
was needed, and to generate new gates and signales
to handle what's missing.
1998-12-07 04:53:16 +00:00
ada45acb0c
Add the nobufz function to eliminate bufz objects,
...
Object links are marked with direction,
constant propagation is more careful will wide links,
Signal folding is aware of attributes, and
the XNF target can dump UDP objects based on LCA
attributes.
1998-12-02 04:37:13 +00:00
e097c999d5
Elaborate UDP devices,
...
Support UDP type attributes, and
pass those attributes to nodes that
are instantiated by elaboration,
Put modules into a map instead of
a simple list.
1998-12-01 00:42:13 +00:00
af8d6fbf01
NetAssign handles lvalues as pin links
...
instead of a signal pointer,
Wire attributes added,
Ability to parse UDP descriptions added,
XNF generates EXT records for signals with
the PAD attribute.
1998-11-23 00:20:22 +00:00
338240c37b
Give anonymous modules a name when elaborated.
1998-11-21 19:19:44 +00:00
6b2fa19429
Handle while loops.
1998-11-11 03:13:04 +00:00
ebad845fc3
Add procedural while loops,
...
Parse procedural for loops,
Add procedural wait statements,
Add constant nodes,
Add XNOR logic gate,
Make vvm output look a bit prettier.
1998-11-09 18:55:33 +00:00
b118634189
Handle procedural conditional, and some
...
of the conditional expressions.
Elaborate signals and identifiers differently,
allowing the netlist to hold signal information.
1998-11-07 17:05:05 +00:00
3fb7a053be
Introduce verilog to CVS.
1998-11-03 23:28:49 +00:00
steve