Construct delayed assignment as an equivilent block.
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elaborate.cc
63
elaborate.cc
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@ -17,7 +17,7 @@
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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#if !defined(WINNT)
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#ident "$Id: elaborate.cc,v 1.53 1999/07/12 00:59:36 steve Exp $"
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#ident "$Id: elaborate.cc,v 1.54 1999/07/13 04:08:26 steve Exp $"
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#endif
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/*
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@ -1161,30 +1161,50 @@ NetProc* PAssign::elaborate(Design*des, const string&path) const
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NetAssign*cur;
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/* Rewrite delayed assignments as assignments that are
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delayed. This only works if the l-value has no mux
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expression. */
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if (dex && (mux == 0)) {
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string tp = des->local_symbol(path);
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unsigned wid = msb - lsb + 1;
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cur = new NetAssign(tp, des, wid, rv);
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for (unsigned idx = 0 ; idx < wid ; idx += 1)
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connect(cur->pin(idx), reg->pin(idx+lsb));
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delayed. For example, a = #<d> b; becomes:
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cur->set_line(*this);
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des->add_node(cur);
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NetPDelay*dep = new NetPDelay(dex->as_ulong(), cur);
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begin
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tmp = b;
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#<d> a = tmp;
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end
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delete dex;
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return dep;
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}
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This rewriting of the expression allows me to not bother to
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actually and literally represent the delayed assign in the
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netlist. The compound statement is exactly equivilent. */
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if (dex) {
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delete dex;
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cerr << delay()->get_line() << ": Sorry, delay expression "
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"(or l-value) too complicated." << endl;
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des->errors += 1;
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}
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string n = des->local_symbol(path);
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unsigned wid = msb - lsb + 1;
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NetNet*tmp = new NetNet(n, NetNet::REG, wid);
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tmp->set_line(*this);
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des->add_signal(tmp);
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n = des->local_symbol(path);
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NetAssign*a1 = new NetAssign(n, des, wid, rv);
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a1->set_line(*this);
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des->add_node(a1);
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for (unsigned idx = 0 ; idx < wid ; idx += 1)
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connect(a1->pin(idx), tmp->pin(idx));
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n = des->local_symbol(path);
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NetESignal*sig = des->get_esignal(tmp);
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NetAssign*a2 = new NetAssign(n, des, wid, sig);
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a2->set_line(*this);
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des->add_node(a2);
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for (unsigned idx = 0 ; idx < wid ; idx += 1)
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connect(a2->pin(idx), reg->pin(idx+lsb));
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NetPDelay*de = new NetPDelay(dex->as_ulong(), a2);
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NetBlock*bl = new NetBlock(NetBlock::SEQU);
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bl->append(a1);
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bl->append(de);
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delete dex;
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return bl;
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}
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if (mux == 0) {
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unsigned wid = msb - lsb + 1;
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@ -1763,6 +1783,9 @@ Design* elaborate(const map<string,Module*>&modules,
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/*
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* $Log: elaborate.cc,v $
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* Revision 1.54 1999/07/13 04:08:26 steve
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* Construct delayed assignment as an equivilent block.
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*
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* Revision 1.53 1999/07/12 00:59:36 steve
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* procedural blocking assignment delays.
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*
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