It was required to make it possible to use typedefs in port types.
Types from packages are emitted in `ifdef..`endif instead of package..endpackage.
The purest solution is to keep package..endpackage and emit appropriate prefix.
Also, it would be great to have constants emitted in the same way.
The package emit of types and constants needs to know which names are
from the current type and which are imported from libraries. Rework
the scope handling of those names so that the information is preserved.
In generate for blocks, there is a genvar that can be used in
expressions within the generate block. Generate this genvar in
the generated output, matched to the generate scope.
It is common for typedefs of complex types to use further typedefs.
Emit the type definitions depth first so that the types that are used
are defined first. This reduces the need for pre-declaration of types.
Port map aspects were held in std::maps. Because
of that, in case of multiple assignments to the same
port, some assignments were lost and in effect vhdlpp
produced correct verilog code from a buggy VHDL.
Std::map was replaced by std::multimap. Thanks to it
we can gather this multiple assignments and detect them
in the elaboration phase.
This patch introduces in ScopeBase separate containers
for declarations coming from the current scope and from
the previous scopes.
Until now, in one scope, all objects were kept in an stl map.
When a scope was created inside other scopes, a shallow
copy of the map was made. This solution was nice for
name shadowing (in new scopes, when a name was
encountered, the old objects were overridden by a new
one), but didn't allow for distinguishing where the objects
were allocated. As a result, it is impossible to know who
the owner is and who should delete them.
In this commit ScopeBase gets two containers: for old
and new objects. If a ScopeBase is made from another
ScopeBase object, all objects from the copied object
go to an old_XXX container, where XXX depends on the
type of the copied objects. When a ScopeBase object
is deleted, the objects from new_XXX are deleted and
the ones from old_XXX are not touched.
This patch adds some complexity to the internals
of ScopeBase, but leaves its interface unchanged.
Infrastructure for debug and emit of sequential statements in processes.
This does not properly handle the actual semantics of the behavioral
code, but it provides an infrastructure where we can handle all the
tricky elaboration to come.
Significant rework of scope management to unify the handling of
types in the ieee library and types/constants/components in packages.
This involved adjusting the parser rules to manage a stack of scopes
and rewriting the IEEE library support to not use global maps for
the loaded types.
This gets us as far as emiting a component instantiation. Very little
error checking/elaboration is done, so there is room for improvement,
but this is a working stub.
These signals are declared in the architecture and are local to
the module. The Architecture already parsed and stored these signal
declarations, but this patch adds the ability to actually emit these
signals in the generated code.
In the process of doing this, I had to regularize the elaboration
and emit of VTypes, so that it can be used in multiple places, not
just in entity headers (for ports).
I also added support for bit selects of signals. This effected a couple
places in the parser, and expressions in general.
Separate elaboration from code generation in the Entity, and add
to Architectures a code generator to handle some simple cases. At
this point we have the basic structure for the VHDL compiler.
Maciej Suminski
Martin Whitaker
Stephen Williams
Arun Persaud
Cary R
Pawel Szostek