Commit Graph

178 Commits

Author SHA1 Message Date
Cary R e1af002a32 Warn that a signed part select may not work for signals < 32 bits.
If a signed signal is driving a part select in a CA and the width
is less than 32 bits. the value will be zero extended and will
not work for negative values. This patch adds a warning that this
could happen. This will be fixed in development.
2009-09-22 17:26:35 -07:00
Cary R 4d57ede0e5 Warn that events can not be user task or function arguments.
This patch makes events passed as arguments to user tasks or functions
a compile time error with an appropriate error message.
2009-09-13 08:21:41 -07:00
Cary R a49463e728 Propagate sign in synthesize for math operators.
The sign of the expression needs to be propagated for the
math operators when they are synthesized.
2009-08-27 13:39:36 -07:00
Cary R b629d913d2 Fix CA replication of zero issues.
This patch fixes a CA to evaluate and ignore a replication of zero.
It also fixes a minor glitch in the data type calculation code. This
was causing a problem if a zero width replication was the first
element in a concatenation/replication since the data type was hard
coded to the first element of the concatenation/replication. It now
uses the first defined element in the concatenation/replication to
determine the data type.
2009-07-28 19:45:40 -07:00
Cary R caab6cab9d A right shift is only signed for an ARS.
The signed_flag should only be set when the expression is signed
and an ARS is used a normal RS should never be signed.
2009-04-02 17:48:08 -07:00
Cary R d7f272d14c Fix problems in rshift code.
This patch fixes the following problems in the right shift code.

The >>> result is only signed if the l-arg is also signed.

The r-arg is always unsigned.

Only sign extend the l-arg when the >>> operator is used.
This relates to an optimization for certain constant shifts.

Removed some obsoleted/outdated code.
2009-03-30 19:39:26 -07:00
Cary R fa8a3d6c2e Handle zero repetition in a synthesized concatenation.
It is valid to have a repetition of zero inside a concatenation
that has other elements with a defined width. This patch adds
this functionality to the synthesize method. It also prints
an error if you try to synthesize a zero width constant.
2009-03-17 15:58:07 -07:00
Cary R 5d7f8c9706 Update copyright in files changed in 2009
This patch updates the copyright notice in the files that
were modified in 2009. It also updates the normal programs
and the vvp target.
2009-01-08 20:03:34 -08:00
Stephen Williams 707a3ebe27 Handle ternary expressions with mixed argument types.
If the true and false alternatives are mixed types, then vectored
arguments are treated as if in a self-determined context then cast
to REAL.
2009-01-05 19:44:52 -08:00
Martin Whitaker 21f33085f0 Fix for pr2123173.
Functions that appear in continuous assignment expressions and that
have hidden dependencies or side effects need to be re-evaluated
whenever any input to the expression changes. This patch adds support
in the compiler and vvp runtime to enable this. This is currently
activated for any system function call that has no arguments. The
user may also force it to be used for any user function by passing
the option -gstrict-ca-eval to the compiler driver.

This patch also removes the -dautomatic option which was used for
gaining confidence in the code that supports automatic tasks and
functions. It is believed that the testsuite provides reasonable
fault coverage, and further tests can be added if bugs are found.
2008-12-29 16:09:33 -08:00
Cary R 0abefc61fb Fix out of range indexed part selects and negative verinum width calc.
This patch fixes fully out of range constant indexed part selects
to just return 'bx. It also adds support for constant undefined
base values which also just return 'bx.

A bug in the bit width calculation when building an unsized, signed
negative integer value was also fixed (-3 needs 3 bits not 2, etc.)
2008-12-01 21:11:33 -08:00
Stephen Williams a288b0180c Fix concatenations losing track of its repeat values.
In some cases, it was possible for the NetEConcat expression to
lose track of the repeat expression, causing the output result to
have a broken concatenation expression.

This also adds some internal checks that the concatenation widths
add up properly.
2008-11-19 13:28:50 -08:00
Cary R 3c4b9692a6 Pads and local signal file/line should be related to creation location.
When padding a signal or when creating a local signal the file and
line information should be related to where the new object was
created not the signal value it is being created from.

This patch modifies the NetE* pad_to_width() routines to take a
LineInfo object to set the location to the correct value.

It fixes some set_line() calls to use the correct location.

It fixes ports to not set the file/line information if it is
already defined. Doing this was causing the definition of
signals to become the instantiation instead of the real
module declaration.
2008-11-18 20:24:19 -08:00
Cary R bbdf622ea5 Fix numerous problems with the divide and modulus operators.
This patch fixes a number of problems related to the divide and
modulus operators.

The net version (CA) of modulus did not support a signed version.

Division or modulus of a value wider than the machine word did
not correctly check for division by zero and return 'bx.

Fixed a problem in procedural modulus. The sign of the result is
only dependent on the L-value.

Division or modulus of a signed value that was the same width as
the machine word was creating an incorrect sign mask.

Division of a signed value that would fit into a single machine
word was not checking for division by zero.

Division or modulus of a wide value was always being done as
unsigned.

Added a negative operator for vvp_vector2_t. This made
implementing the signed wide division and modulus easier.
2008-11-07 19:58:00 -08:00
Larry Doolittle 365960df9d Spelling fixes
No code changes.
2008-10-21 19:55:19 -07:00
Stephen Williams 1a3e655285 Merge test_width rework
This collection of patches fixes a variety of bugs with the handling
of signed-ness in exprsesions.
2008-10-13 20:23:50 -07:00
Larry Doolittle 3adcbb5611 Shadow reduction part 2
Continue cleaning up shadowed variables, flagged by turning on -Wshadow.
No intended change in functionality.  Patch looks right, and is tested
to compile and run on my machine.  No regressions in test suite.
2008-10-13 20:12:47 -07:00
Stephen Williams 25f6282a54 Generate signed comparisons independent of the signedness of the expression
The signedness of comparison expressions is typically unsigned, even if
the comparison to be performed is signed. The comparison (and particularly
the expr_synth of the comparison) needs to account for this explicitly.
2008-10-13 19:43:02 -07:00
Stephen Williams 18de6980ff Fix associative add tree to get result width correct.
When evaluating A+1+2 in eval_tree, the (1+2) needs to have the correct
result width, or the elaborated expression with will be lost.
2008-10-03 19:52:26 -07:00
Jared Casper feba5d9470 Compatibility with gcc-4.3
The addition of UINT_MAX in netlist.cc requires #include <climits> when compiling with gcc-4.3.2.

I also noticed that commit 8704e3e used c style includes in c++ sources contrary to the style used in the rest of the c++ code and fixed those.
2008-09-30 21:57:25 -07:00
Cary R 6b62cce14a Produce a better message for ! and real values.
In the transition to the new expression code we forgot how to
handle the logical not (!) of a real value. This patch adds a
more appropriate error message until we get this reimplemented.
2008-09-30 21:53:25 -07:00
Stephen Williams 55a15d604d Pad operands of bitwise operators.
When elaborating bitwise operators width context determined width,
pad the operands.
2008-09-30 21:35:09 -07:00
Stephen Williams 2da50e1788 Cast to real when add arguments have mixed type.
When synthesizing, be careful (especiall for addition) that if the
arguments are mixed, then cast the non-IVL_VT_REAL arguments to
IVL_VT_REAL.
2008-09-29 21:02:37 -07:00
Stephen Williams 804f5a94d5 Manage expression types for ternary a little better.
The true and false expression clauses must have compatible types,
which are not necesarily identical. In particular, VT_BOOL and
VT_LOGIC are compatible for the purposes of ternary arguments. The
test in NetETernary::synthesize was incorrect.

In the process, fix the type handling of NetConst objects to allow
for IVL_VT_BOOL constants. This is information that the downstream
may find useful, so should be handled correctly.
2008-09-13 16:43:39 -07:00
Larry Doolittle cdfb2315cf One more signed vs unsigned comparison fix
Introduced in a8ad505af7
Various improgements to expression ::synthesize methods
2008-09-12 19:39:15 -07:00
Larry Doolittle 8704e3e34f Compatibility with gcc-4.3
Add "include"s to fix errors flagged by gcc-4.3.2
2008-09-09 19:19:51 -07:00
Stephen Williams dd47599d55 Merge branch 'master' into elaborate-net-rework 2008-09-06 17:20:14 -07:00
Larry Doolittle 66949122cf Non-controversial whitespace cleanup
Nothing to do with tab width!  Eliminates useless
trailing spaces and tabs, and nearly all <space><tab>
pairings.  No change to derived files (e.g., .vvp),
non-master files (e.g., lxt2_write.c) or the new tgt-vhdl
directory.

Low priority, simple entropy reduction.  Please apply
unless it deletes some steganographic content you want
to keep.
2008-09-04 21:31:30 -07:00
Stephen Williams a8ad505af7 Various improgements to expression ::synthesize methods
Since NetExpr::synthesize methods were rarely used, then had a lot
of bugs. Now that continuous assign uses these methods, these bugs
must be fixed.

Binary and Unary minus properly pad/extens its arguments,
Case compare generates correct code,
Divide properly takes on signed flag,
Signed right shift sign-extends its argument to prevent loss of sign bits
and uses the NetSignExtend instead of simple padding,
Use the correct target node for reduction NAND,
Properly handle constant arguments of NetESelect

Handle some exressions that were not handled before, include abs()
and POW.
2008-08-17 08:21:24 -07:00
Stephen Williams 6051150c14 Continuous assign no longer uses elaborate_net.
convert the continuous assign elaboration to use elaborate_expr
and synthesize methods instead of the elaborate_net methods of
PExpr. This exposes problems with the synthesize methods, but it
is a better way to do it.
2008-08-11 21:21:33 -07:00
Stephen Williams 1d884cb0e9 Shuffle the argument list for the synthesize method.
In preparation for using the synthesize method to replace the
elaborate_net method of PExpr, rework the interface to the
synthesize() method. This changes no fnctionality, but does set
up the infrastructure for the next step.
2008-08-10 18:22:34 -07:00
Larry Doolittle eed4ff7e2d Spelling fixes
Mostly comments, but includes quite a few
user-visible error, debug, and help messages.
2008-06-13 08:51:28 -07:00
Stephen Williams 3a61b94e98 Realign generation flags to correspond to IEEE1364 nomenclature.
IEEE1364 has specific names for the various generations of Verilog that
are supported. Icarus Verilog should stick to those names for selection
the language feature set.

In the process, the extensions that were tied to the 2x generations
are pulled out out and given their own enable flags. The makes all the
feature control more regular and understandable.
2008-05-07 17:46:56 -07:00
Stephen Williams 3e591f730e sign extended expressions are signed.
Fix when sign extending an expression that the result is also signed.
This bug caused some arithmetic operations (with extended arguments)
to not notice that they are signed.

Also be more robust in noticing that comparisons are signed and should
generate the right code.
2008-05-06 13:27:04 -07:00
Cary R 225fcf6bf0 Pad CA bit arguments and make reductions and ! self-determined.
Binary bit based operators were not padding arguments if they had
different widths. The reduction operators and ! were not correctly
evaluating their arguments in a self-determined context.
2008-03-26 18:23:19 -07:00
Cary R fe72d02cf6 Major rework of the ternary operator elaboration code.
This patch reworks much of the ternary code to short circuit when
possible and supports real values better. It adds a blend operator
for real values that returns 0.0 when the values differ and the value
when they match. This deviates slightly from the standard which
specifies that the value for reals is always 0.0 when the conditional
is 'bx. There are also a couple bug fixes.

These fixes have not been ported to continuous assignments yet.
Ternary operators used at compile time and in procedural assignments
should be complete (short circuit and support real values).
2008-03-08 19:45:13 -08:00
Cary R 285ff2859f Add power operator synthesize().
This patch adds synthesize() for the power operator.
2008-02-25 15:57:56 -08:00
Cary R fac1cc5a1c Add user function synth and clean up expression code.
This patch adds synthesize() for user functions. It also cleans up a
number of inconsistencies and missing checks in the expression code.
2008-02-24 20:00:18 -08:00
Stephen Williams 7975e14b5c LineInfo uses perm_string for path.
Rework the handling of file names to use a perm_string heap to hold
the file names, instead of the custom file name heap in the lexor.
Also rename the get_line to get_fileline to reflect its real duties.
This latter chage touched a lot of files.
2007-12-20 12:31:01 -05:00
Martin Whitaker fa2712a3ee Fix for pr1851310.
This patch fixes a bug in the compiler which prevented array words
from being correctly selected when used in the RHS of a continuous
assignment.
2007-12-15 15:56:54 -08:00
Stephen Williams 083b9b6ee6 Handle repeat concatenation in continuous assign
When a repeat concatenation expression is translated to a netlist,
get the repeat expression right. This comes up when an elab_and_eval
elaboration contains a repeat concationation, and the expression is
ultimately turned into a netlist by expr_synth.

Signed-off-by: Stephen Williams <steve@icarus.com>
2007-09-01 17:36:57 -07:00
steve c7d97f4146 Properly evaluate scope path expressions. 2007-06-02 03:42:12 +00:00
steve 8ed1a010f7 Allow bit/part select of vectors in continuous assignments. 2007-04-15 01:37:29 +00:00
steve 2229825783 fix handling of unary reduction logic in certain nets. 2007-04-12 05:21:54 +00:00
steve a863b2390c Remove useless assert 2007-04-04 02:31:57 +00:00
steve 326329d497 Set some missing local flags. 2007-02-05 01:42:31 +00:00
steve 4b829bf04f Get argument widths right for shift results. 2007-01-20 02:10:45 +00:00
steve 91d84e7dc7 Major rework of array handling. Memories are replaced with the
more general concept of arrays. The NetMemory and NetEMemory
 classes are removed from the ivl core program, and the IVL_LPM_RAM
 lpm type is removed from the ivl_target API.
2007-01-16 05:44:14 +00:00
steve fc0695beb6 Handle 64bit delay constants. 2006-08-08 05:11:37 +00:00
steve 49b65e86fe Add support for power in constant expressions. 2006-07-31 03:50:17 +00:00
steve ed70db84ce Handle real valued literals in net contexts. 2006-07-08 21:48:46 +00:00
steve a8b86ea3bb More explicit datatype setup. 2006-05-01 20:47:58 +00:00
steve dc2898cc73 fix net type of multiply output. 2006-05-01 05:40:21 +00:00
steve 0c9fb766b6 Get the data type of part select results right. 2006-04-30 05:17:48 +00:00
steve a4116efd57 Fix the return type of a synthesized divide. 2006-01-03 05:15:33 +00:00
steve 7235706923 Make sure div, mod and mult nodes have line number info. 2005-09-15 23:04:09 +00:00
steve b69f59f2ec Handle memory references is continuous assignments. 2005-08-31 05:07:31 +00:00
steve 73f3589ea6 use NetPartSelect to shrink part from high bits. 2005-06-13 23:22:14 +00:00
steve 9278dad244 Make synthesized padding vector-aware. 2005-06-13 22:26:03 +00:00
steve 3bd09d1470 synthesis of Logic and shifts using vector gates. 2005-05-15 04:47:00 +00:00
steve d548c9a5f8 Handle synthesis of concatenation expressions. 2005-05-06 00:25:13 +00:00
steve af7e196518 synthesis of add and unary get vector widths right. 2005-04-25 01:30:31 +00:00
steve 365cfedd55 Update DFF support to new data flow. 2005-04-24 23:44:01 +00:00
steve ab1ca54df2 Update support for LPM_MOD. 2005-03-12 06:43:35 +00:00
steve 257e1f9516 Support shifts and divide. 2005-02-19 02:43:38 +00:00
steve d74177634c Restructure NetMux devices to pass vectors.
Generate NetMux devices from ternary expressions,
 Reduce NetMux devices to bufif when appropriate.
2005-02-12 06:25:40 +00:00
steve 99ace10774 Simplified NetMult and IVL_LPM_MULT. 2005-01-28 05:39:33 +00:00
steve bf6a5d0f50 Implement LPM_COMPARE nodes as two-input vector functors. 2005-01-16 04:20:32 +00:00
steve 65e9b6be12 Rework of internals to carry vectors through nexus instead
of single bits. Make the ivl, tgt-vvp and vvp initial changes
 down this path.
2004-12-11 02:31:25 +00:00
steve 3dbc07f34d Implement signed divide and signed right shift in nets. 2004-06-30 02:16:26 +00:00
steve 2d63705093 Connect rsif of multiply to DataB. 2004-06-16 16:21:34 +00:00
steve e8e0cd7cab Support / and % in synthesized contexts. 2004-06-12 15:00:02 +00:00
steve ba309e60bb Fix synthesis method for logical and/or 2004-06-01 01:04:57 +00:00
steve 177b6ffb6a Addtrbute keys are perm_strings. 2004-02-20 18:53:33 +00:00
steve 27af95d402 Use perm_strings for named langiage items. 2004-02-18 17:11:54 +00:00
steve 2f8a40b159 Fix evaluation of compare to constant expression. 2004-02-15 04:23:48 +00:00
steve 8eccb7b9a1 Remove redundant scope tokens. 2003-11-10 19:39:20 +00:00
steve 4eae8426a9 More flexible width handling for synthesized add. 2003-10-27 06:04:21 +00:00
steve 1cb589fee0 Assure ternary arguments are wide enough. 2003-09-26 02:44:27 +00:00
steve b0230cf4d4 Support synthesis of constant downshifts. 2003-09-03 23:31:36 +00:00
steve 7c1401a2ba Spelling patch. 2003-08-28 04:11:17 +00:00
steve a95463ff81 Add support for IVL_LPM_MULT device. 2003-08-09 03:23:03 +00:00
steve bfe31e22bf Start handling pad of expressions in code generators. 2003-07-26 03:34:42 +00:00
steve 21ff80075a Various warnings fixed. 2003-06-24 01:38:02 +00:00
steve 58f5955687 Less picky about expression widths while synthesizing ternary. 2003-04-19 04:52:56 +00:00
steve 58f2fe73c8 Detect constant shift distances in synthesis. 2003-04-08 05:07:15 +00:00
steve 2c129dfbfa Synthesize shift expressions. 2003-04-08 04:33:55 +00:00
steve badad63ab4 All NetObj objects have lex_string base names. 2003-03-06 00:28:41 +00:00
steve a275133ff9 LPM objects store only their base names. 2003-02-26 01:29:24 +00:00
steve e941e7e805 Spelling fixes. 2003-01-30 16:23:07 +00:00
steve 46253ed873 Rework expression parsing and elaboration to
accommodate real/realtime values and expressions.
2003-01-26 21:15:58 +00:00
steve 0ccb9139c9 Magnitude compare to 0. 2002-11-17 23:37:55 +00:00
steve 52bf4e613f conditional ident string using autoconfig. 2002-08-12 01:34:58 +00:00
steve 33ee1da817 Smart synthesis of binary AND expressions. 2002-07-07 22:31:39 +00:00
steve 301040a67a Avoid emitting to vvp local net symbols. 2002-07-05 21:26:17 +00:00
steve bfad382fd1 Carry Verilog 2001 attributes with processes,
all the way through to the ivl_target API.

 Divide signal reference counts between rval
 and lval references.
2002-05-26 01:39:02 +00:00
steve e6c0629626 Add language support for Verilog-2001 attribute
syntax. Hook this support into existing $attribute
 handling, and add number and void value types.

 Add to the ivl_target API new functions for access
 of complex attributes attached to gates.
2002-05-23 03:08:50 +00:00
steve 1a22f37d92 Synthesize reduction logic. 2001-12-30 17:06:52 +00:00
steve dddbeb957a Comments about MUX synthesis. 2001-12-18 05:34:02 +00:00
steve e85347bf8b Handle part selects in l-values of DFF devices. 2001-11-29 01:58:18 +00:00