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2966 Commits

Author SHA1 Message Date
Alan Mishchenko 5ebf135b6a Adding cyclicity check for netlist with boxes. 2014-11-10 14:55:27 -08:00
Alan Mishchenko 873c35018a Removing unauthorized printout in 'pdr'. 2014-11-09 23:54:57 -08:00
Alan Mishchenko ac72d73dc6 Removing unauthorized printout in 'pdr'. 2014-11-09 23:13:37 -08:00
Alan Mishchenko 9a292bd93c Detecting full-adder chains and putting them into white boxes. 2014-11-09 23:01:30 -08:00
Alan Mishchenko 372a348c90 Detecting full-adder chains and putting them into white boxes. 2014-11-09 22:49:17 -08:00
Alan Mishchenko 153e888794 Full adder detection code. 2014-11-08 09:34:44 -08:00
Alan Mishchenko e4ff9cc9a5 Added minor API to clean path on a Windows computer. 2014-11-05 16:16:47 -08:00
Alan Mishchenko ad7c8d6382 Experimental implementation of BMC-related procedures. 2014-11-05 09:29:00 -08:00
Alan Mishchenko 8c2e51824e Experimental implementation of BMC-related procedures. 2014-11-04 20:35:36 -08:00
Alan Mishchenko d75b8ce874 Compiler warnings. 2014-11-03 18:10:36 -08:00
Alan Mishchenko 93754146a4 Bug fix in CEX printing. 2014-11-03 16:45:09 -08:00
Alan Mishchenko 93ad6e7dd4 Making public some APIs. 2014-11-03 15:41:50 -08:00
Alan Mishchenko 505747d443 Improvements to &fftest (adding computation of fixed parameters). 2014-11-02 21:43:49 -08:00
Alan Mishchenko b4cf2f7448 Added switches '-c' and '-n' to 'init'. 2014-11-02 17:35:47 -08:00
Alan Mishchenko 91885a6298 Commenting out useless macro which causes failure on VS 2012. 2014-10-30 10:19:54 -07:00
Alan Mishchenko 135bf3ecdf Compiler warnings. 2014-10-28 23:53:17 -07:00
Alan Mishchenko c556baa92e Changes to enable building external code. 2014-10-28 21:13:59 -07:00
Alan Mishchenko e2b8d95b6f Bug fix in bmc3 -a -x. 2014-10-28 19:49:32 -07:00
Baruch Sterin c2ccf238fd pyabc: handle a few corner cases 2014-10-28 18:42:14 -07:00
Alan Mishchenko 4edc023479 Bug fix in bmc3 -a -x. 2014-10-28 18:28:21 -07:00
Alan Mishchenko c0db4d2a12 Changes to enable building external code. 2014-10-27 17:56:48 -07:00
Alan Mishchenko 736c2245ea Adding MAJ gate to GIA package. 2014-10-26 21:03:30 -07:00
Alan Mishchenko 836723cf73 Changing switch -v in 'qbf' and '&qbf' to be non-verbose by default. 2014-10-26 08:57:13 -07:00
Alan Mishchenko b8556e7edf New command &satenum to enumerate SAT assignments of a miter in a naive way. 2014-10-25 17:55:35 -07:00
Alan Mishchenko f93ede121d Adding switch &fftest -N <num> to detect fixed vars after each <num> iterations. 2014-10-25 17:07:38 -07:00
Alan Mishchenko 96c9792f33 Merged in sterin/abc (pull request #9) 
make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd()
 2014-10-23 18:19:51 -07:00
Alan Mishchenko 49caf258d4 One bug fix and two small changes. 2014-10-22 20:18:13 -07:00
Alan Mishchenko 51be0f4c52 One bug fix and two small changes. 2014-10-22 20:17:09 -07:00
Baruch Sterin 392390d23e make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd() 2014-10-22 15:50:06 -07:00
Alan Mishchenko 51bf121073 Bug fix in seq synthesis due to resent code restructuring. 2014-10-21 21:48:53 -07:00
Alan Mishchenko d2e42ec081 Disabling MiniSAT 2.2 for now. 2014-10-21 20:40:50 -07:00
Alan Mishchenko 5c93850553 Compiler problems. 2014-10-21 20:24:13 -07:00
Alan Mishchenko c49f35835b Compiler problems. 2014-10-21 20:20:22 -07:00
Alan Mishchenko 5bd9edb52d Compiler problems. 2014-10-21 20:18:14 -07:00
Alan Mishchenko 5ae8a37d9d Compiler problems. 2014-10-21 20:13:25 -07:00
Alan Mishchenko 228dbcc51e Adding code of MiniSAT 2.2. 2014-10-21 19:45:52 -07:00
Alan Mishchenko a9317eac75 Preparing to work with C++ code. 2014-10-21 19:37:33 -07:00
Alan Mishchenko 7592aa8a3e Adding commands backup/restore. 2014-10-21 10:51:41 -07:00
Alan Mishchenko 83bc1148a2 Adding switch &qbf -q to quantify functional variables. 2014-10-20 11:01:34 -07:00
Alan Mishchenko bae5e26fb5 Adding switch &qbf -q to quantify functional variables. 2014-10-20 11:00:11 -07:00
Alan Mishchenko 8de80e673a Improved QBF solver. 2014-10-18 21:05:34 -07:00
Alan Mishchenko ab72e52792 Improved QBF solver. 2014-10-18 17:04:47 -07:00
Alan Mishchenko 23441c060a Improved QBF solver. 2014-10-18 16:10:18 -07:00
Alan Mishchenko 3653bf53e9 Bug fix in truth table computation. 2014-10-15 14:26:44 -07:00
Alan Mishchenko 70cb236144 Compiler problem with includes. 2014-10-13 16:59:47 -07:00
Alan Mishchenko 5326a59945 MUX decomposition during mapping. 2014-10-13 16:39:39 -07:00
Alan Mishchenko 6f9051a99c MUX decomposition during mapping. 2014-10-12 12:47:41 -07:00
Alan Mishchenko 2f1988e8f6 MUX decomposition during mapping. 2014-10-12 10:13:47 -07:00
Alan Mishchenko 3ac8aa9c12 Recommended changes for portability. 2014-10-12 09:10:27 -07:00
Alan Mishchenko bc4164a466 Merged in grigora/abc/grigora/fixed-hang-issue-in-bm-command-1413034154897 (pull request #8) 
Fix for hang issue in "bm" command.
 2014-10-11 18:07:56 -07:00
Alan Mishchenko 8b160138f1 MUX decomposition during mapping. 2014-10-11 17:19:41 -07:00
Alan Mishchenko 09a5950c8f Deriving network in terms of programmable cells. 2014-10-11 15:53:32 -07:00
grigora 83a47278a9 Fixed "bm" command hang issue. 2014-10-11 13:30:02 +00:00
Alan Mishchenko f0044175ee Improvements to the parser. 2014-10-10 19:17:19 -07:00
Alan Mishchenko f6c1fc072c Naive (SAT-only) CEC option. 2014-10-10 16:14:48 -07:00
Alan Mishchenko 01e1b6345e Bug fix in the bit-blaster. 2014-10-10 13:46:58 -07:00
Alan Mishchenko 5a4592ee69 Improvements to ISOP. 2014-10-10 13:15:31 -07:00
Alan Mishchenko b8bd21c82d Improvements to ISOP. 2014-10-10 12:59:30 -07:00
Alan Mishchenko 5cf92f32a5 Correction to the patch to compile with Visual Studio. 2014-10-10 09:41:07 -07:00
Alan Mishchenko ccb5bb34d7 Suggested patch for type-punned warnings 2014-10-10 08:58:18 -07:00
Alan Mishchenko ca9eca3b22 Small changes. 2014-10-08 13:26:23 -07:00
Alan Mishchenko 97b52a6a6d Compiler warnings. 2014-10-08 10:56:31 -07:00
Alan Mishchenko df0f8ad540 Compiler warnings. 2014-10-08 10:54:02 -07:00
Alan Mishchenko 141c1de0a2 Compiler warnings. 2014-10-08 10:52:32 -07:00
Alan Mishchenko e4d5887671 Detection of threshold functions. 2014-10-08 10:41:20 -07:00
Alan Mishchenko bd0373daf5 New ISOP computation. 2014-10-07 13:02:50 -07:00
Alan Mishchenko 6d79be6b01 Bug fix in move_names. 2014-10-05 11:13:08 -07:00
Alan Mishchenko 820cbc116f Updates to &flow and &flow2. 2014-10-05 10:59:26 -07:00
Alan Mishchenko 734435f441 Deriving cell mapping with &if -kz. 2014-10-04 19:36:41 -07:00
Alan Mishchenko 24083998ab Deriving cell mapping with &if -kz. 2014-10-04 19:18:34 -07:00
Alan Mishchenko 4c7165a4f7 New ISOP computation. 2014-10-04 17:56:08 -07:00
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 3f31a8580f Bug fix in Verilog writer. 2014-10-02 14:53:30 -07:00
Alan Mishchenko 889b329d01 Adding switch -R to 'if'. 2014-10-02 13:17:53 -07:00
Alan Mishchenko 6d94b6b1a2 Improvements to bit-blaster. 2014-10-01 22:54:08 -07:00
Alan Mishchenko 27b1e49dee Improvements to bit-blaster. 2014-09-30 20:28:49 -07:00
Alan Mishchenko ed1bf0000e Improvements to bit-blaster. 2014-09-30 19:51:39 -07:00
Alan Mishchenko 69519f86cd Adding options to &flow. 2014-09-29 18:08:57 -07:00
Alan Mishchenko a6c81c65df Adding options to &flow2. 2014-09-29 16:23:24 -07:00
Alan Mishchenko 69b4a92286 Adding options to &flow2. 2014-09-29 16:08:59 -07:00
Alan Mishchenko 4960af4e76 Adding options to &flow. 2014-09-29 14:54:55 -07:00
Alan Mishchenko 05ee370f85 Command to rename files in the same directory. 2014-09-28 20:48:53 -07:00
Alan Mishchenko 0c070a35e5 Adding out-of-bounds checks to AIGER readers. 2014-09-28 12:17:02 -07:00
Alan Mishchenko 98e377bdff Adding features to CNF generation. 2014-09-28 12:10:13 -07:00
Alan Mishchenko fbc9c00fd1 Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter). 2014-09-28 11:32:26 -07:00
Alan Mishchenko 69bd355467 Support for sequential designs in word-level Verilog. 2014-09-26 16:11:36 -07:00
Alan Mishchenko 6aa1c94ea5 Enabling print-out, for each operator, of the percetage of AND nodes after bit-blasting. 2014-09-25 20:33:29 -07:00
Alan Mishchenko a1b4773c77 Printing node type statistics. 2014-09-24 17:29:34 -04:00
Alan Mishchenko 7d21182067 Printing node type statistics. 2014-09-24 13:01:24 -04:00
Alan Mishchenko 4db5e3c02d Printing node type statistics. 2014-09-24 12:46:35 -04:00
Alan Mishchenko ffaad9ba10 Bug fix in handling MUXes in Verilog parser, induced by recent changes. 2014-09-24 09:05:40 -04:00
Alan Mishchenko ad079f7207 Added switch -t to &flow2. 2014-09-24 00:33:16 -04:00
Alan Mishchenko ea9c1c0bff Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:24:54 -04:00
Alan Mishchenko a4d5a9b5bc Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:22:18 -04:00
Alan Mishchenko d9b5aa49f7 Enables dumping stats into a file. 2014-09-23 20:32:37 -04:00
Alan Mishchenko 3f95853f3e Extending &cec to take a single-output miter (usage of switch -d has changed!). 2014-09-23 16:22:21 -04:00
Alan Mishchenko 93e5631cff Debugging the bit-blaster. 2014-09-23 16:04:35 -04:00
Alan Mishchenko 3f6c08dfc6 Debugging the bit-blaster. 2014-09-23 12:54:57 -04:00
Alan Mishchenko 15f5428989 Adding switch to enable SOP balancing in '&flow2'. 2014-09-21 21:40:34 -04:00
Alan Mishchenko 8f3dd475ee Tuning the flow scripts. 2014-09-20 23:37:07 -07:00
Alan Mishchenko dc9d327a58 Extending resource limit. 2014-09-20 23:11:32 -07:00
Alan Mishchenko dc9a08bddc Tuning the flow scripts. 2014-09-20 21:52:39 -07:00
Alan Mishchenko 5ce7aa572f Synchronizing packages. 2014-09-20 17:01:47 -07:00
Alan Mishchenko 76666174b4 Synchronizing packages. 2014-09-20 16:41:11 -07:00
Alan Mishchenko 2d4342f8c4 Synchronizing packages. 2014-09-20 14:50:52 -07:00
Alan Mishchenko 00b8cda3d3 Synchronizing packages. 2014-09-20 14:10:05 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko 29494c3a00 Tuning the flow scripts. 2014-09-20 13:15:57 -07:00
Alan Mishchenko a02b020356 Updating DSD balance to handle XOR gate as having the same delay as AND gate. 2014-09-19 19:06:01 -07:00
Alan Mishchenko f989aea224 Improvements to Boolean matching. 2014-09-19 15:08:46 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko 596f387b03 Improvements to Boolean matching. 2014-09-18 15:13:12 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 69827a5a88 Improvements to word-level Verilog parser. 2014-09-17 15:20:04 -07:00
Alan Mishchenko ffd77ffedd Improvements to word-level Verilog parser. 2014-09-17 15:14:17 -07:00
Alan Mishchenko 43ee0cff25 Spurious assertion. 2014-09-17 09:54:08 -07:00
Alan Mishchenko ec0b9b6b6e Improvements to word-level Verilog parser. 2014-09-16 22:08:22 -07:00
Alan Mishchenko 6d0b555dab Support for leakage power in Liberty parser and sizer. 2014-09-16 16:44:51 -07:00
Alan Mishchenko 288d64d033 New choice computation. 2014-09-16 14:59:28 -07:00
Alan Mishchenko e033a62282 Code restructuring. 2014-09-16 12:13:25 -07:00
Alan Mishchenko 1d5cb52e4a Improvements to Boolean matching. 2014-09-16 11:56:40 -07:00
Alan Mishchenko 61e58b2d56 Compiler error (duplicate typedef). 2014-09-15 08:54:07 -07:00
Alan Mishchenko 501c3f0b1e Compiler warnings. 2014-09-12 13:53:04 -07:00
Alan Mishchenko 39c68e72e4 Replacing tabs with spaces. 2014-09-12 13:46:11 -07:00
Alan Mishchenko dcb7d0d3fc New word-level representation package. 2014-09-12 13:40:48 -07:00
Alan Mishchenko ae7e286213 Resetting the random seed in 'sparsify'. 2014-09-11 18:50:15 -07:00
Alan Mishchenko 7171812ff1 Updating timing info during normalization. 2014-09-10 15:28:46 -07:00
Alan Mishchenko c7daa8cafd Updating timing info during normalization. 2014-09-10 15:28:03 -07:00
Alan Mishchenko 49f2ec22b9 Bug fix in transferring timing info. 2014-09-09 22:50:15 -07:00
Alan Mishchenko a5e93ff075 Corner-case bug fix in balancing. 2014-09-08 09:33:11 -07:00
Alan Mishchenko 233e12610a Added command 'move_names'. 2014-08-28 13:06:02 -07:00
Alan Mishchenko 79c1928cf9 Added command 'move_names'. 2014-08-28 13:04:47 -07:00
Alan Mishchenko 3c51dd47b5 Tuning LUT mapping flow. 2014-08-28 00:11:24 -07:00
Alan Mishchenko 70a236379b Tuning LUT mapping flow. 2014-08-27 23:17:33 -07:00
Alan Mishchenko 17343bf144 Compiler warning. 2014-08-27 23:03:39 -07:00
Alan Mishchenko ce74153c9f Tuning LUT mapping flow. 2014-08-27 22:59:21 -07:00
Alan Mishchenko 6db6607114 Improvements BLIF parser. 2014-08-27 18:47:45 -07:00
Alan Mishchenko 9c154cfe61 Improvements to DSD balancing. 2014-08-27 12:23:31 -07:00
Alan Mishchenko 66d9a80b3d Adding commands to save/load best network. 2014-08-26 21:28:26 -07:00
Alan Mishchenko 70a3474849 Improvements to the timing manager. 2014-08-25 20:47:11 -05:00
Alan Mishchenko 5c30eb10ef Improving GIA interfaces for some procedures. 2014-08-25 17:33:53 -07:00
Alan Mishchenko 47dde4e478 Correcting incorrect handling of timing in several &-commands. 2014-08-25 16:55:39 -07:00
Alan Mishchenko cbbf78e6f4 Improving print-out of 'dsd -p'. 2014-08-22 22:18:38 -07:00
Alan Mishchenko c344f3e38c Propagating timing support to the new synthesis/mapping commands. 2014-08-20 22:12:51 -07:00
Alan Mishchenko 6dbaa4d0f8 Extended command &cone to extract timing critical cones. 2014-08-19 23:30:17 -07:00
Alan Mishchenko 3ef00645b8 Added command 'sparsify' to derive ISF from CSF. 2014-08-18 22:42:48 -07:00
Alan Mishchenko 65f9b73505 Changing default CNF generation in &bmc. 2014-08-18 20:19:32 -07:00
Alan Mishchenko 7c8136c82d Added DSD-based collapsing &dsd. 2014-08-16 18:38:34 -07:00
Alan Mishchenko 1537244935 Added DSD-based collapsing &dsd. 2014-08-16 18:36:41 -07:00
Alan Mishchenko ec5bc5825d Adding specialized matching to 'if'. 2014-08-16 18:34:20 -07:00
Alan Mishchenko 18ed4d3448 Added DSD-based collapsing &dsd. 2014-08-16 18:31:46 -07:00
Alan Mishchenko 97e620a4b7 Adding specialized matching to 'if'. 2014-08-16 18:28:41 -07:00
Alan Mishchenko 06100279cd Added DSD-based collapsing &dsd. 2014-08-16 11:54:49 -07:00
Alan Mishchenko c8bfe83e55 Suggested fix to allow .constr files to have empty lines. 2014-08-13 16:46:20 -07:00
Alan Mishchenko f907347484 Enabling circuit solver in &fraig. 2014-08-12 18:54:43 -07:00
Alan Mishchenko 9055265394 Bug fix in &fraig -L <num>. 2014-08-12 16:23:52 -07:00
Alan Mishchenko 99a917caf3 Bug fix in &fraig -L <num>. 2014-08-12 16:20:03 -07:00
Alan Mishchenko 0722dde6f9 Increasing the size of pre-allocated memory in &syn2. 2014-08-11 18:34:14 -07:00
Alan Mishchenko 68ce0bc1c1 Adding delay optimization to synthesis script &syn2. 2014-08-08 12:45:28 -07:00
Alan Mishchenko 35b816dd57 Enabling cofactoring in the mapper. 2014-08-06 14:18:20 -07:00
Alan Mishchenko ae64dc0796 Profiling code for SOP/DSD/LMS balancing. 2014-08-04 21:36:01 -07:00
Alan Mishchenko a3a6002b3d Compiler warnings. 2014-08-04 15:34:34 -07:00
Alan Mishchenko 1d9d6814ee Enabling ISOP-based minimization in 'collapse' if EXDC is available. 2014-08-04 10:53:08 -07:00
Alan Mishchenko 82aec90c6c Compiler warnings. 2014-08-02 17:06:08 -07:00
Alan Mishchenko edba505d9d Profiling code for SOP/DSD/LMS balancing. 2014-08-02 17:01:48 -07:00
Alan Mishchenko 62bc45d1fb Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, such as [7:7], which seems to help in some cases. 2014-08-02 17:00:24 -07:00
Alan Mishchenko 7fb1954268 Small changes. 2014-07-29 22:49:10 -07:00
Alan Mishchenko 6a69a9139c Adding support for standard-cell mapping. 2014-07-28 11:31:31 -07:00
Alan Mishchenko 674dcf2a6e Generating abstraction of standard cell library. 2014-07-26 16:49:32 -07:00
Alan Mishchenko 704b4bad6b Generating abstraction of standard cell library. 2014-07-26 16:46:45 -07:00
Alan Mishchenko 7d81490fe6 Generating abstraction of standard cell library. 2014-07-25 20:02:56 -07:00
Alan Mishchenko 9bfe2ad73a Fixing option 'if -G <num>' after changes. 2014-07-25 08:58:20 -07:00
Alan Mishchenko 2cdc5ab850 Bug fix in 'print_gates' due to the mix-up of the inverter. 2014-07-22 17:23:48 -07:00
Alan Mishchenko eee04f448d Undoing previous change to SOP balancing. 2014-07-22 17:11:50 -07:00
Alan Mishchenko 9fa827aacf Small improvement to SOP balancing. 2014-07-22 10:13:40 -07:00
Alan Mishchenko ba29267563 Small changes. 2014-07-21 22:43:08 -07:00
Alan Mishchenko c0aa9b6a5d Adding new command &sopb for resource-aware SOP balancing. 2014-07-21 13:49:25 -07:00
Alan Mishchenko ea73401db5 Updates and changes to several packages. 2014-07-20 22:11:00 -07:00
Alan Mishchenko ba3f2ac6c0 Small changes in several packages. 2014-07-18 14:05:00 -07:00
Alan Mishchenko ef55bbc8e6 Small changes in several packages. 2014-07-17 15:38:12 -07:00
Alan Mishchenko 4a861d868c Small changes in several packages. 2014-07-17 09:47:07 -07:00
Alan Mishchenko c58b57e2b4 Improvements to profiling and printing statistics. 2014-07-09 20:22:51 -07:00
Alan Mishchenko ea1e369fc2 Improvements to false path detection. 2014-07-09 11:59:52 -07:00
Alan Mishchenko b389f2054b Improvements to false path detection. 2014-07-08 23:51:20 -07:00
Alan Mishchenko c6814a5c8b Experiment with SOP balancing. 2014-07-02 11:19:27 -07:00
Alan Mishchenko 7ff2bce037 Compiler warning. 2014-07-01 23:01:12 -07:00
Alan Mishchenko afcec52a49 Improvements to representation of choices. 2014-07-01 13:05:09 -07:00
Alan Mishchenko 6bc381baa3 Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_Ntk_t representing an AIG, by skipping object ID number 0 reserved for the constant node. 2014-06-30 15:28:53 -07:00
Alan Mishchenko 1586d96c3e Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_Ntk_t representing an AIG, by skipping object ID number 0 reserved for the constant node. 2014-06-30 15:21:47 -07:00
Alan Mishchenko 9790867817 Fix to the problem of not dumping test-vectors in &fftest when the use-specified test set is complete or when a timeout occurred. 2014-06-30 10:57:33 -07:00
Alan Mishchenko ce92ee2b4d Changes and improvements to different packages. 2014-06-30 00:34:51 -07:00
Alan Mishchenko 55404ca1af Changes and improvements to different packages. 2014-06-28 14:31:01 -07:00
Alan Mishchenko 933b749676 Changes and improvements to different packages. 2014-06-28 14:25:38 -07:00
Alan Mishchenko a68ec38df1 Changes and improvements to different packages. 2014-06-26 09:51:53 -07:00
Alan Mishchenko 2edf2a970e Improvements to power-aware mapping. 2014-06-23 18:05:51 -07:00
Alan Mishchenko f79d8e4b04 Improvements to CNF generation. 2014-06-23 14:50:46 -07:00