Files
OpenSTA/util
Jaehyun KimandClaude Opus 4.6 812d26f14c test: Apply review feedback - part4
Remove unnecessary catch blocks in network, parasitics, sdc, spice,
and util test modules. Add report_checks after set_wire_load_model
in parasitics_wireload.tcl to verify timing changes per wireload.

Co-Authored-By: Claude Opus 4.6 <[email protected]>
2026-02-20 14:13:55 +09:00
..
2026-02-20 14:13:55 +09:00
2025-04-25 16:35:15 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:35:21 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-04-12 10:53:34 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-03-30 15:27:53 -07:00
2026-02-13 19:19:09 +09:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-01-21 18:54:33 -07:00
2025-04-11 16:59:48 -07:00
2025-01-21 18:54:33 -07:00
2025-12-05 14:47:16 -07:00