James Cherry
|
4f80bd6f8a
|
check liberty corners
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-10-04 20:50:27 -07:00 |
James Cherry
|
9d6bad01cc
|
Liberty:cornerCell, cornerPort use corner/min_max arg
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-10-03 11:02:28 -07:00 |
James Cherry
|
9658811092
|
liberty latch inference require untate D->Q arcs
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-07-01 19:22:03 -07:00 |
James Cherry
|
a8a9b27077
|
TableAxis shared_ptr
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-25 16:31:18 -07:00 |
James Cherry
|
c230ba0e1a
|
TimingArcSets share TimingArcAttrs
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-25 10:08:33 -07:00 |
James Cherry
|
937efddf5e
|
Liberty::internalPowers() return ref
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-12 13:44:49 -07:00 |
James Cherry
|
eab1f1cc01
|
TimingArcSet::arcs() range iteration
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-12 11:47:26 -07:00 |
James Cherry
|
8c5b0fcaa5
|
LibertyCell::timingArcSets() range iteration
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-12 08:21:34 -07:00 |
James Cherry
|
d84051d76f
|
Merge branch 'master' into write_lib
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-09 19:10:06 -07:00 |
James Cherry
|
b292796116
|
liberty support for write_liberty
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-09 19:08:37 -07:00 |
James Cherry
|
296bc45a17
|
write_liberty
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-06 20:57:09 -07:00 |
James Cherry
|
4b0e6e8e0d
|
rm LibertyLibrary::found_rise_fall_caps_
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-06-05 19:37:11 -07:00 |
James Cherry
|
bbf5584e30
|
flush DISALLOW_COPY_AND_ASSIGN
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-02-19 18:31:52 -07:00 |
James Cherry
|
3481d3c48b
|
function names with trans -> edge
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-02-13 17:46:45 -07:00 |
James Cherry
|
bb36b3cb31
|
ScaleFactor enum counts
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-01-13 19:33:26 -07:00 |
James Cherry
|
2bc6e8f68c
|
update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
|
2022-01-04 10:17:08 -07:00 |
James Cherry
|
2e8f0035dc
|
update copyright
|
2021-06-25 10:25:49 -07:00 |
James Cherry
|
e10258d9e5
|
report_net min/max cap instead of rise/fall/min/max
|
2021-04-02 14:46:30 -07:00 |
James Cherry
|
40737739a6
|
liberty equiv cells match pg_pins
|
2021-01-28 16:30:58 -07:00 |
James Cherry
|
d22358fc3c
|
LibertyCell::isBuffer prune level shifters
|
2021-01-22 20:40:02 -07:00 |
James Cherry
|
00bc28a1c9
|
Liberty is_level_shifter
|
2021-01-22 20:32:47 -07:00 |
James Cherry
|
af887c3112
|
debugPrint use __VA_ARGS__
|
2021-01-01 11:46:51 -08:00 |
James Cherry
|
20f01e417b
|
rm \n from print stmts
|
2020-12-28 09:04:57 -08:00 |
James Cherry
|
14bacb30cf
|
cudd/ssta compile errors
|
2020-12-20 08:31:33 -07:00 |
James Cherry
|
78d29c8f90
|
error/warn IDs
|
2020-12-13 18:21:35 -07:00 |
James Cherry
|
b0f0de488f
|
TimingArc::intrinsicDelay, driveResistance
|
2020-11-20 09:16:14 -07:00 |
James Cherry
|
7e4e92076a
|
power muli-corner support
|
2020-11-11 11:31:47 -07:00 |
James Cherry
|
f457b75304
|
get_property lib_pin intrinsic_delay
|
2020-10-25 14:59:54 -07:00 |
James Cherry
|
b7a572cfe2
|
LibertyPort::capacitance()
|
2020-07-09 16:10:21 -07:00 |
James Cherry
|
46d2446f88
|
LibertyCell::isInverter
|
2020-07-09 08:42:52 -07:00 |
James Cherry
|
4c0225acc3
|
liberty is_memory_cell
|
2020-06-09 20:02:59 -07:00 |
James Cherry
|
32adfad72e
|
liberty default_fanout_load, fanout_load for report -max_fanout
|
2020-06-08 20:11:15 -07:00 |
James Cherry
|
d562879a27
|
liberty bus port slew/cap/fanout limits
|
2020-05-11 07:14:36 -07:00 |
James Cherry
|
1d3ae30600
|
LibertyCell::internalPowers(port)
|
2020-04-06 18:27:40 -07:00 |
James Cherry
|
ee326f165c
|
public headers in include/sta
|
2020-04-05 14:53:44 -07:00 |
James Cherry
|
804953e317
|
mv public headers to include/sta
|
2020-04-05 11:35:51 -07:00 |
James Cherry
|
4a017e86eb
|
update copyright
|
2020-03-06 18:50:37 -08:00 |
James Cherry
|
cc1bd6b5ab
|
TransRiseFall -> RiseFall
|
2019-11-11 15:30:19 -07:00 |
James Cherry
|
e7d8689f70
|
resizer support
|
2019-11-05 10:14:35 -07:00 |
James Cherry
|
6934b4ebcd
|
updates for resizer
|
2019-11-05 07:51:54 -07:00 |
James Cherry
|
9d93130ff2
|
range iterators
|
2019-07-18 06:19:00 -07:00 |
James Cherry
|
93f5f9d664
|
no need for virtuals in Concrete network objects
|
2019-06-28 13:38:56 -07:00 |
James Cherry
|
12494398e9
|
set_clock_sense -> set_sense, LibertyPort::driveResistance
|
2019-06-23 19:52:29 -07:00 |
James Cherry
|
b9a7b349eb
|
template tcl typemap(in) seqs/sets
|
2019-06-22 11:17:13 -07:00 |
James Cherry
|
5f23536b17
|
support equiv cells across libraries
|
2019-06-20 21:41:49 -07:00 |
James Cherry
|
db2a06c430
|
findCmdLineFlag/Key
|
2019-06-17 16:42:26 -07:00 |
James Cherry
|
d9237aa3e5
|
Liberty cell drive_resistance property
|
2019-06-16 10:20:51 -07:00 |
James Cherry
|
96fcf1d8b2
|
ConcreteCell/Port pointers to corresponding liberty
|
2019-06-15 22:20:54 -07:00 |
James Cherry
|
61b1ac4d12
|
sync
|
2019-06-04 08:12:22 -07:00 |
James Cherry
|
736a977a6d
|
Liberty equiv cells in LibertyCell instead of map
|
2019-05-28 07:45:05 -07:00 |