2018-09-28 17:54:21 +02:00
|
|
|
// OpenSTA, Static Timing Analyzer
|
2025-01-22 02:54:33 +01:00
|
|
|
// Copyright (c) 2025, Parallax Software, Inc.
|
2018-09-28 17:54:21 +02:00
|
|
|
//
|
|
|
|
|
// This program is free software: you can redistribute it and/or modify
|
|
|
|
|
// it under the terms of the GNU General Public License as published by
|
|
|
|
|
// the Free Software Foundation, either version 3 of the License, or
|
|
|
|
|
// (at your option) any later version.
|
|
|
|
|
//
|
|
|
|
|
// This program is distributed in the hope that it will be useful,
|
|
|
|
|
// but WITHOUT ANY WARRANTY; without even the implied warranty of
|
2022-01-04 18:17:08 +01:00
|
|
|
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
2018-09-28 17:54:21 +02:00
|
|
|
// GNU General Public License for more details.
|
|
|
|
|
//
|
|
|
|
|
// You should have received a copy of the GNU General Public License
|
2022-01-04 18:17:08 +01:00
|
|
|
// along with this program. If not, see <https://www.gnu.org/licenses/>.
|
2025-01-22 02:54:33 +01:00
|
|
|
//
|
|
|
|
|
// The origin of this software must not be misrepresented; you must not
|
|
|
|
|
// claim that you wrote the original software.
|
|
|
|
|
//
|
|
|
|
|
// Altered source versions must be plainly marked as such, and must not be
|
|
|
|
|
// misrepresented as being the original software.
|
|
|
|
|
//
|
|
|
|
|
// This notice may not be removed or altered from any source distribution.
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2020-04-05 23:53:44 +02:00
|
|
|
#include "Sdc.hh"
|
2020-04-05 20:35:51 +02:00
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
#include <algorithm>
|
2020-04-05 20:35:51 +02:00
|
|
|
|
2020-04-05 23:53:44 +02:00
|
|
|
#include "Stats.hh"
|
|
|
|
|
#include "Debug.hh"
|
|
|
|
|
#include "Mutex.hh"
|
|
|
|
|
#include "Report.hh"
|
2025-04-10 01:35:15 +02:00
|
|
|
#include "Variables.hh"
|
2020-04-05 23:53:44 +02:00
|
|
|
#include "PatternMatch.hh"
|
|
|
|
|
#include "MinMax.hh"
|
|
|
|
|
#include "TimingRole.hh"
|
|
|
|
|
#include "TimingArc.hh"
|
|
|
|
|
#include "Liberty.hh"
|
|
|
|
|
#include "Transition.hh"
|
|
|
|
|
#include "PortDirection.hh"
|
|
|
|
|
#include "Network.hh"
|
|
|
|
|
#include "RiseFallMinMax.hh"
|
|
|
|
|
#include "Clock.hh"
|
|
|
|
|
#include "ClockLatency.hh"
|
|
|
|
|
#include "ClockInsertion.hh"
|
|
|
|
|
#include "CycleAccting.hh"
|
|
|
|
|
#include "PortDelay.hh"
|
|
|
|
|
#include "ExceptionPath.hh"
|
|
|
|
|
#include "PortExtCap.hh"
|
|
|
|
|
#include "DisabledPorts.hh"
|
|
|
|
|
#include "InputDrive.hh"
|
|
|
|
|
#include "DataCheck.hh"
|
|
|
|
|
#include "ClockGatingCheck.hh"
|
|
|
|
|
#include "ClockGroups.hh"
|
|
|
|
|
#include "DeratingFactors.hh"
|
2020-07-12 17:55:44 +02:00
|
|
|
#include "HpinDrvrLoad.hh"
|
2020-04-05 20:35:51 +02:00
|
|
|
#include "search/Levelize.hh"
|
2020-04-05 23:53:44 +02:00
|
|
|
#include "Corner.hh"
|
2020-07-12 08:56:39 +02:00
|
|
|
#include "Graph.hh"
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
namespace sta {
|
|
|
|
|
|
2024-04-23 21:57:06 +02:00
|
|
|
using std::swap;
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
bool
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockPairLess::operator()(const ClockPair &pair1,
|
|
|
|
|
const ClockPair &pair2) const
|
|
|
|
|
{
|
|
|
|
|
int first1 = pair1.first->index();
|
|
|
|
|
int second1 = pair1.second->index();
|
|
|
|
|
if (first1 > second1)
|
|
|
|
|
std::swap(first1, second1);
|
|
|
|
|
int first2 = pair2.first->index();
|
|
|
|
|
int second2 = pair2.second->index();
|
|
|
|
|
if (first2 > second2)
|
|
|
|
|
std::swap(first2, second2);
|
2018-09-28 17:54:21 +02:00
|
|
|
return (first1 < first2)
|
|
|
|
|
|| (first1 == first2
|
|
|
|
|
&& second1 < second2);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2019-03-13 01:25:53 +01:00
|
|
|
typedef Vector<ClockPair> ClockPairSeq;
|
2018-09-28 17:54:21 +02:00
|
|
|
typedef Set<Pvt*> PvtSet;
|
|
|
|
|
|
|
|
|
|
static ExceptionThruSeq *
|
|
|
|
|
clone(ExceptionThruSeq *thrus,
|
|
|
|
|
Network *network);
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
Sdc::Sdc(StaState *sta) :
|
|
|
|
|
StaState(sta),
|
2019-03-13 01:25:53 +01:00
|
|
|
derating_factors_(nullptr),
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_index_(0),
|
2023-01-19 19:23:45 +01:00
|
|
|
clock_pin_map_(PinIdHash(network_)),
|
|
|
|
|
clock_leaf_pin_map_(PinIdHash(network_)),
|
|
|
|
|
clk_hpin_disables_(network_),
|
|
|
|
|
propagated_clk_pins_(network_),
|
|
|
|
|
clk_latencies_(network_),
|
|
|
|
|
clk_insertions_(network_),
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_sense_map_(network_),
|
2019-03-13 01:25:53 +01:00
|
|
|
clk_gating_check_(nullptr),
|
2021-12-20 18:50:44 +01:00
|
|
|
cycle_acctings_(this),
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
input_delay_pin_map_(PinIdLess(network_)),
|
|
|
|
|
input_delay_ref_pin_map_(PinIdLess(network_)),
|
|
|
|
|
input_delay_leaf_pin_map_(PinIdLess(network_)),
|
|
|
|
|
input_delay_internal_pin_map_(PinIdLess(network_)),
|
2018-09-28 17:54:21 +02:00
|
|
|
input_delay_index_(0),
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
output_delay_pin_map_(PinIdLess(network_)),
|
|
|
|
|
output_delay_ref_pin_map_(PinIdLess(network_)),
|
|
|
|
|
output_delay_leaf_pin_map_(PinIdLess(network_)),
|
|
|
|
|
|
|
|
|
|
disabled_pins_(network_),
|
|
|
|
|
disabled_ports_(network_),
|
|
|
|
|
disabled_wire_edges_(network_),
|
|
|
|
|
disabled_clk_gating_checks_inst_(network_),
|
|
|
|
|
disabled_clk_gating_checks_pin_(network_),
|
2024-07-25 17:18:36 +02:00
|
|
|
exception_id_(0),
|
2020-11-14 18:34:26 +01:00
|
|
|
have_thru_hpin_exceptions_(false),
|
2023-01-19 19:23:45 +01:00
|
|
|
first_thru_edge_exceptions_(0, PinPairHash(network_), PinPairEqual()),
|
2025-05-20 23:52:04 +02:00
|
|
|
path_delay_internal_from_(network_),
|
|
|
|
|
path_delay_internal_from_break_(network_),
|
|
|
|
|
path_delay_internal_to_(network_),
|
|
|
|
|
path_delay_internal_to_break_(network_)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
sdc_ = this;
|
2023-01-19 19:23:45 +01:00
|
|
|
initVariables();
|
|
|
|
|
if (corners_)
|
|
|
|
|
makeCornersAfter(corners_);
|
2019-03-13 01:25:53 +01:00
|
|
|
setWireload(nullptr, MinMaxAll::all());
|
|
|
|
|
setWireloadSelection(nullptr, MinMaxAll::all());
|
|
|
|
|
setOperatingConditions(nullptr, MinMaxAll::all());
|
2018-09-28 17:54:21 +02:00
|
|
|
makeDefaultArrivalClock();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeDefaultArrivalClock()
|
|
|
|
|
{
|
|
|
|
|
FloatSeq *waveform = new FloatSeq;
|
|
|
|
|
waveform->push_back(0.0);
|
|
|
|
|
waveform->push_back(0.0);
|
2023-01-19 19:23:45 +01:00
|
|
|
default_arrival_clk_ = new Clock("input port clock", clk_index_++, network_);
|
2019-10-10 06:02:33 +02:00
|
|
|
default_arrival_clk_->initClk(0, false, 0.0, waveform, nullptr, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
Sdc::~Sdc()
|
|
|
|
|
{
|
|
|
|
|
deleteConstraints();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// This does NOT call initVariables() because those variable values
|
|
|
|
|
// survive linking a new design.
|
|
|
|
|
void
|
|
|
|
|
Sdc::clear()
|
|
|
|
|
{
|
|
|
|
|
removeLibertyAnnotations();
|
|
|
|
|
deleteConstraints();
|
|
|
|
|
propagated_clk_pins_.clear();
|
|
|
|
|
clocks_.clear();
|
|
|
|
|
clock_name_map_.clear();
|
|
|
|
|
clock_pin_map_.clear();
|
2019-10-25 17:51:59 +02:00
|
|
|
clock_leaf_pin_map_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_latencies_.clear();
|
|
|
|
|
edge_clk_latency_.clear();
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_insertions_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
pin_clk_uncertainty_map_.clear();
|
|
|
|
|
inter_clk_uncertainties_.clear();
|
|
|
|
|
|
|
|
|
|
clk_groups_name_map_.clear();
|
|
|
|
|
clearClkGroupExclusions();
|
|
|
|
|
|
|
|
|
|
clk_gating_check_map_.clear();
|
|
|
|
|
inst_clk_gating_check_map_.clear();
|
|
|
|
|
pin_clk_gating_check_map_.clear();
|
|
|
|
|
data_checks_from_map_.clear();
|
|
|
|
|
data_checks_to_map_.clear();
|
|
|
|
|
|
2019-10-25 17:51:59 +02:00
|
|
|
input_delays_.clear();
|
2019-11-11 01:10:26 +01:00
|
|
|
input_delay_pin_map_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
input_delay_index_ = 0;
|
|
|
|
|
input_delay_ref_pin_map_.clear();
|
2019-10-25 17:51:59 +02:00
|
|
|
input_delay_leaf_pin_map_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
input_delay_internal_pin_map_.clear();
|
2019-11-11 01:10:26 +01:00
|
|
|
|
|
|
|
|
output_delays_.clear();
|
|
|
|
|
output_delay_pin_map_.clear();
|
2019-10-25 17:51:59 +02:00
|
|
|
output_delay_leaf_pin_map_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
port_slew_limit_map_.clear();
|
|
|
|
|
cell_slew_limit_map_.clear();
|
|
|
|
|
have_clk_slew_limits_ = false;
|
|
|
|
|
|
|
|
|
|
cell_cap_limit_map_.clear();
|
|
|
|
|
port_cap_limit_map_.clear();
|
|
|
|
|
pin_cap_limit_map_.clear();
|
|
|
|
|
|
|
|
|
|
port_fanout_limit_map_.clear();
|
|
|
|
|
cell_fanout_limit_map_.clear();
|
|
|
|
|
|
|
|
|
|
disabled_pins_.clear();
|
|
|
|
|
disabled_ports_.clear();
|
|
|
|
|
disabled_lib_ports_.clear();
|
|
|
|
|
disabled_edges_.clear();
|
|
|
|
|
disabled_cell_ports_.clear();
|
|
|
|
|
disabled_inst_ports_.clear();
|
|
|
|
|
|
|
|
|
|
disabled_clk_gating_checks_inst_.clear();
|
|
|
|
|
disabled_clk_gating_checks_pin_.clear();
|
|
|
|
|
|
|
|
|
|
input_drive_map_.clear();
|
|
|
|
|
logic_value_map_.clear();
|
|
|
|
|
case_value_map_.clear();
|
|
|
|
|
|
|
|
|
|
pin_latch_borrow_limit_map_.clear();
|
|
|
|
|
inst_latch_borrow_limit_map_.clear();
|
|
|
|
|
clk_latch_borrow_limit_map_.clear();
|
|
|
|
|
|
|
|
|
|
min_pulse_width_.clear();
|
|
|
|
|
|
2019-03-13 01:25:53 +01:00
|
|
|
setWireload(nullptr, MinMaxAll::all());
|
|
|
|
|
setWireloadSelection(nullptr, MinMaxAll::all());
|
2018-09-28 17:54:21 +02:00
|
|
|
// Operating conditions are owned by Liberty libraries.
|
2019-03-13 01:25:53 +01:00
|
|
|
setOperatingConditions(nullptr, MinMaxAll::all());
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_index_ = 0;
|
|
|
|
|
makeDefaultArrivalClock();
|
|
|
|
|
|
|
|
|
|
unsetTimingDerate();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::initVariables()
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
analysis_type_ = AnalysisType::ocv;
|
|
|
|
|
wireload_mode_ = WireloadMode::unknown;
|
2018-09-28 17:54:21 +02:00
|
|
|
max_area_ = 0.0;
|
|
|
|
|
path_delays_without_to_ = false;
|
|
|
|
|
clk_hpin_disables_valid_ = false;
|
2020-09-06 02:20:21 +02:00
|
|
|
have_clk_slew_limits_ = false;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteConstraints()
|
|
|
|
|
{
|
|
|
|
|
clocks_.deleteContents();
|
|
|
|
|
delete default_arrival_clk_;
|
|
|
|
|
clock_pin_map_.deleteContents();
|
2019-10-25 17:51:59 +02:00
|
|
|
clock_leaf_pin_map_.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_latencies_.deleteContents();
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_insertions_.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
clk_groups_name_map_.deleteContents();
|
|
|
|
|
clearClkGroupExclusions();
|
|
|
|
|
|
|
|
|
|
pin_clk_uncertainty_map_.deleteContents();
|
|
|
|
|
inter_clk_uncertainties_.deleteContents();
|
|
|
|
|
delete clk_gating_check_;
|
2019-03-13 01:25:53 +01:00
|
|
|
clk_gating_check_ = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_gating_check_map_.deleteContents();
|
|
|
|
|
inst_clk_gating_check_map_.deleteContents();
|
|
|
|
|
pin_clk_gating_check_map_.deleteContents();
|
|
|
|
|
input_drive_map_.deleteContents();
|
|
|
|
|
disabled_cell_ports_.deleteContents();
|
|
|
|
|
disabled_inst_ports_.deleteContents();
|
|
|
|
|
pin_min_pulse_width_map_.deleteContentsClear();
|
|
|
|
|
inst_min_pulse_width_map_.deleteContentsClear();
|
|
|
|
|
clk_min_pulse_width_map_.deleteContentsClear();
|
|
|
|
|
|
2024-06-27 22:57:58 +02:00
|
|
|
for (auto [pin, checks] : data_checks_from_map_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
checks->deleteContents();
|
|
|
|
|
delete checks;
|
|
|
|
|
}
|
2024-06-27 22:57:58 +02:00
|
|
|
for (auto [pin, checks] : data_checks_to_map_)
|
2023-03-10 01:39:09 +01:00
|
|
|
delete checks;
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
input_delays_.deleteContents();
|
2019-11-11 01:10:26 +01:00
|
|
|
input_delay_pin_map_.deleteContents();
|
2019-11-11 04:27:59 +01:00
|
|
|
input_delay_leaf_pin_map_.deleteContents();
|
|
|
|
|
input_delay_ref_pin_map_.deleteContents();
|
|
|
|
|
input_delay_internal_pin_map_.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
output_delays_.deleteContents();
|
2019-11-11 04:27:59 +01:00
|
|
|
output_delay_pin_map_.deleteContents();
|
|
|
|
|
output_delay_ref_pin_map_.deleteContents();
|
|
|
|
|
output_delay_leaf_pin_map_.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
clk_hpin_disables_.deleteContentsClear();
|
|
|
|
|
clk_hpin_disables_valid_ = false;
|
|
|
|
|
|
|
|
|
|
clearCycleAcctings();
|
|
|
|
|
deleteExceptions();
|
|
|
|
|
clearGroupPathMap();
|
|
|
|
|
deleteDeratingFactors();
|
|
|
|
|
|
2023-02-22 22:50:49 +01:00
|
|
|
removeNetLoadCaps();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_sense_map_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (int mm_index : MinMax::rangeIndex())
|
|
|
|
|
instance_pvt_maps_[mm_index].deleteContentsClear();
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2023-02-22 22:50:49 +01:00
|
|
|
void
|
|
|
|
|
Sdc::removeNetLoadCaps()
|
|
|
|
|
{
|
|
|
|
|
if (!net_wire_cap_maps_.empty()) {
|
|
|
|
|
for (int corner_index = 0; corner_index < corners_->count(); corner_index++) {
|
|
|
|
|
net_wire_cap_maps_[corner_index].clear();
|
|
|
|
|
drvr_pin_wire_cap_maps_[corner_index].clear();
|
|
|
|
|
port_ext_cap_maps_[corner_index].deleteContentsClear();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::removeLibertyAnnotations()
|
|
|
|
|
{
|
2024-06-27 22:57:58 +02:00
|
|
|
for (auto [cell, disable] : disabled_cell_ports_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (disable->all())
|
|
|
|
|
cell->setIsDisabledConstraint(false);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
if (disable->from()) {
|
|
|
|
|
for (LibertyPort *from : *disable->from())
|
|
|
|
|
from->setIsDisabledConstraint(false);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
if (disable->to()) {
|
|
|
|
|
for (LibertyPort *to : *disable->to())
|
|
|
|
|
to->setIsDisabledConstraint(false);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (disable->timingArcSets()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (TimingArcSet *arc_set : *disable->timingArcSets())
|
2018-09-28 17:54:21 +02:00
|
|
|
arc_set->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
if (disable->fromTo()) {
|
|
|
|
|
for (const LibertyPortPair &pair : *disable->fromTo()) {
|
|
|
|
|
const LibertyPort *from = pair.first;
|
|
|
|
|
const LibertyPort *to = pair.second;
|
|
|
|
|
for (TimingArcSet *arc_set : cell->timingArcSets(from, to))
|
|
|
|
|
arc_set->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (LibertyPort *port : disabled_lib_ports_)
|
2018-09-28 17:54:21 +02:00
|
|
|
port->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::deleteNetBefore(const Net *net)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (int corner_index = 0; corner_index < corners_->count(); corner_index++) {
|
|
|
|
|
net_wire_cap_maps_[corner_index].erase(net);
|
|
|
|
|
for (const Pin *pin : *network_->drivers(net))
|
|
|
|
|
drvr_pin_wire_cap_maps_[corner_index].erase(pin);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2025-05-31 20:12:59 +02:00
|
|
|
// see Sdc::isConstrained
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteInstanceBefore(const Instance *inst)
|
|
|
|
|
{
|
|
|
|
|
instance_pvt_maps_[MinMax::minIndex()].erase(inst);
|
|
|
|
|
instance_pvt_maps_[MinMax::maxIndex()].erase(inst);
|
|
|
|
|
inst_derating_factors_.erase(inst);
|
|
|
|
|
inst_clk_gating_check_map_.erase(inst);
|
|
|
|
|
disabled_inst_ports_.erase(inst);
|
|
|
|
|
inst_latch_borrow_limit_map_.erase(inst);
|
|
|
|
|
inst_min_pulse_width_map_.erase(inst);
|
|
|
|
|
|
|
|
|
|
for (ExceptionPath *exception : exceptions_)
|
|
|
|
|
exception->deleteInstance(inst, network_);
|
|
|
|
|
first_from_inst_exceptions_.erase(inst);
|
|
|
|
|
first_thru_inst_exceptions_.erase(inst);
|
|
|
|
|
first_to_inst_exceptions_.erase(inst);
|
|
|
|
|
}
|
|
|
|
|
|
2023-03-07 00:55:27 +01:00
|
|
|
void
|
|
|
|
|
Sdc::makeCornersBefore()
|
|
|
|
|
{
|
|
|
|
|
removeNetLoadCaps();
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-28 00:37:03 +01:00
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeCornersAfter(Corners *corners)
|
2020-10-28 00:37:03 +01:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
corners_ = corners;
|
|
|
|
|
port_ext_cap_maps_.resize(corners_->count(), PortExtCapMap(PortIdLess(network_)));
|
|
|
|
|
net_wire_cap_maps_.resize(corners_->count(), NetWireCapMap(NetIdLess(network_)));
|
|
|
|
|
drvr_pin_wire_cap_maps_.resize(corners_->count(), PinWireCapMap(PinIdLess(network_)));
|
2020-10-28 00:37:03 +01:00
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isConstrained(const Pin *pin) const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
Port *port = network_->isTopLevelPort(pin) ? network_->port(pin) : nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
return clock_pin_map_.hasKey(pin)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| propagated_clk_pins_.hasKey(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| hasClockLatency(pin)
|
|
|
|
|
|| hasClockInsertion(pin)
|
|
|
|
|
|| pin_clk_uncertainty_map_.hasKey(pin)
|
|
|
|
|
|| pin_clk_gating_check_map_.hasKey(pin)
|
|
|
|
|
|| data_checks_from_map_.hasKey(pin)
|
|
|
|
|
|| data_checks_to_map_.hasKey(pin)
|
2019-11-11 01:10:26 +01:00
|
|
|
|| input_delay_pin_map_.hasKey(pin)
|
|
|
|
|
|| output_delay_pin_map_.hasKey(pin)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| pin_cap_limit_map_.hasKey(pin)
|
|
|
|
|
|| disabled_pins_.hasKey(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| disabled_ports_.hasKey(port)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| disabled_clk_gating_checks_pin_.hasKey(pin)
|
2023-01-19 19:23:45 +01:00
|
|
|
|| first_from_pin_exceptions_.hasKey(pin)
|
|
|
|
|
|| first_thru_pin_exceptions_.hasKey(pin)
|
|
|
|
|
|| first_to_pin_exceptions_.hasKey(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| input_drive_map_.hasKey(port)
|
|
|
|
|
|| logic_value_map_.hasKey(pin)
|
|
|
|
|
|| case_value_map_.hasKey(pin)
|
|
|
|
|
|| pin_latch_borrow_limit_map_.hasKey(pin)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| pin_min_pulse_width_map_.hasKey(pin)
|
|
|
|
|
|| (port && (port_slew_limit_map_.hasKey(port)
|
|
|
|
|
|| port_cap_limit_map_.hasKey(port)
|
|
|
|
|
|| port_fanout_limit_map_.hasKey(port)
|
|
|
|
|
|| hasPortExtCap(port)));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isConstrained(const Instance *inst) const
|
|
|
|
|
{
|
2023-03-09 21:23:45 +01:00
|
|
|
return instance_pvt_maps_[MinMax::minIndex()].hasKey(inst)
|
|
|
|
|
|| instance_pvt_maps_[MinMax::maxIndex()].hasKey(inst)
|
2023-01-19 19:23:45 +01:00
|
|
|
|| inst_derating_factors_.hasKey(inst)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| inst_clk_gating_check_map_.hasKey(inst)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| disabled_inst_ports_.hasKey(inst)
|
2023-01-19 19:23:45 +01:00
|
|
|
|| first_from_inst_exceptions_.hasKey(inst)
|
|
|
|
|
|| first_thru_inst_exceptions_.hasKey(inst)
|
|
|
|
|
|| first_to_inst_exceptions_.hasKey(inst)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| inst_latch_borrow_limit_map_.hasKey(inst)
|
|
|
|
|
|| inst_min_pulse_width_map_.hasKey(inst);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isConstrained(const Net *net) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
return net_derating_factors_.hasKey(net)
|
2023-03-09 21:23:45 +01:00
|
|
|
|| hasNetWireCap(net)
|
|
|
|
|
|| net_res_map_.hasKey(net)
|
2023-01-19 19:23:45 +01:00
|
|
|
|| first_thru_net_exceptions_.hasKey(net);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2024-07-17 20:49:20 +02:00
|
|
|
PortSeq
|
|
|
|
|
Sdc::allInputs(bool no_clks)
|
|
|
|
|
{
|
|
|
|
|
PortSeq ports;
|
|
|
|
|
Instance *top_inst = network_->topInstance();
|
|
|
|
|
InstancePinIterator *pin_iter = network_->pinIterator(top_inst);
|
|
|
|
|
while (pin_iter->hasNext()) {
|
|
|
|
|
const Pin *pin = pin_iter->next();
|
|
|
|
|
const Port *port = network_->port(pin);
|
|
|
|
|
PortDirection *dir = network_->direction(port);
|
|
|
|
|
if (dir->isAnyInput()
|
|
|
|
|
&& !(no_clks && isClock(pin)))
|
|
|
|
|
portMembers(port, ports);
|
|
|
|
|
}
|
|
|
|
|
delete pin_iter;
|
|
|
|
|
return ports;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
PortSeq
|
|
|
|
|
Sdc::allOutputs()
|
|
|
|
|
{
|
|
|
|
|
PortSeq ports;
|
|
|
|
|
Instance *top_inst = network_->topInstance();
|
|
|
|
|
InstancePinIterator *pin_iter = network_->pinIterator(top_inst);
|
|
|
|
|
while (pin_iter->hasNext()) {
|
|
|
|
|
const Pin *pin = pin_iter->next();
|
|
|
|
|
const Port *port = network_->port(pin);
|
|
|
|
|
PortDirection *dir = network_->direction(port);
|
|
|
|
|
if (dir->isAnyOutput())
|
|
|
|
|
portMembers(port, ports);
|
|
|
|
|
}
|
|
|
|
|
delete pin_iter;
|
|
|
|
|
return ports;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::portMembers(const Port *port,
|
|
|
|
|
PortSeq &ports)
|
|
|
|
|
{
|
|
|
|
|
if (network_->isBus(port)) {
|
|
|
|
|
PortMemberIterator *member_iter = network_->memberIterator(port);
|
|
|
|
|
while (member_iter->hasNext()) {
|
|
|
|
|
Port *member = member_iter->next();
|
|
|
|
|
ports.push_back(member);
|
|
|
|
|
}
|
|
|
|
|
delete member_iter;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
ports.push_back(port);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::setAnalysisType(AnalysisType analysis_type)
|
|
|
|
|
{
|
|
|
|
|
analysis_type_ = analysis_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setOperatingConditions(OperatingConditions *op_cond,
|
|
|
|
|
const MinMaxAll *min_max)
|
|
|
|
|
{
|
2019-07-18 15:19:00 +02:00
|
|
|
for (auto mm_index : min_max->rangeIndex())
|
2018-09-28 17:54:21 +02:00
|
|
|
operating_conditions_[mm_index] = op_cond;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setOperatingConditions(OperatingConditions *op_cond,
|
|
|
|
|
const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
int mm_index = min_max->index();
|
|
|
|
|
operating_conditions_[mm_index] = op_cond;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
OperatingConditions *
|
2024-02-08 21:54:52 +01:00
|
|
|
Sdc::operatingConditions(const MinMax *min_max) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
int mm_index = min_max->index();
|
|
|
|
|
return operating_conditions_[mm_index];
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pvt *
|
2023-11-19 18:04:45 +01:00
|
|
|
Sdc::pvt(const Instance *inst,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
const InstancePvtMap &pvt_map = instance_pvt_maps_[min_max->index()];
|
|
|
|
|
return pvt_map.findKey(inst);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setPvt(const Instance *inst,
|
|
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
const Pvt &pvt)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-07-18 15:19:00 +02:00
|
|
|
for (auto mm_index : min_max->rangeIndex()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
InstancePvtMap &pvt_map = instance_pvt_maps_[mm_index];
|
|
|
|
|
pvt_map[inst] = new Pvt(pvt);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-09-09 02:51:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::voltage(const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &voltage,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
voltages_.value(min_max, voltage, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::voltage(const Net *net,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &voltage,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
exists = false;
|
|
|
|
|
if (net_voltage_map_.hasKey(net))
|
|
|
|
|
net_voltage_map_[net].value(min_max, voltage, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setVoltage(const MinMax *min_max,
|
|
|
|
|
float voltage)
|
|
|
|
|
{
|
|
|
|
|
voltages_.setValue(min_max, voltage);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setVoltage(const Net *net,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float voltage)
|
|
|
|
|
{
|
|
|
|
|
net_voltage_map_[net].setValue(min_max, voltage);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setTimingDerate(TimingDerateType type,
|
|
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
float derate)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
if (derating_factors_ == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
derating_factors_ = new DeratingFactorsGlobal;
|
2019-11-11 23:30:19 +01:00
|
|
|
derating_factors_->setFactor(type, clk_data, rf, early_late, derate);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setTimingDerate(const Net *net,
|
|
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
float derate)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
DeratingFactorsNet *factors = net_derating_factors_.findKey(net);
|
2022-01-14 00:29:38 +01:00
|
|
|
if (factors == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
factors = new DeratingFactorsNet;
|
2023-01-19 19:23:45 +01:00
|
|
|
net_derating_factors_[net] = factors;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
factors->setFactor(clk_data, rf, early_late, derate);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setTimingDerate(const Instance *inst,
|
2022-01-14 00:29:38 +01:00
|
|
|
TimingDerateCellType type,
|
2018-09-28 17:54:21 +02:00
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
float derate)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
DeratingFactorsCell *factors = inst_derating_factors_.findKey(inst);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (factors == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
factors = new DeratingFactorsCell;
|
2023-01-19 19:23:45 +01:00
|
|
|
inst_derating_factors_[inst] = factors;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
factors->setFactor(type, clk_data, rf, early_late, derate);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setTimingDerate(const LibertyCell *cell,
|
2022-01-14 00:29:38 +01:00
|
|
|
TimingDerateCellType type,
|
2018-09-28 17:54:21 +02:00
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
float derate)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
DeratingFactorsCell *factors = cell_derating_factors_.findKey(cell);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (factors == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
factors = new DeratingFactorsCell;
|
2023-01-19 19:23:45 +01:00
|
|
|
cell_derating_factors_[cell] = factors;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
factors->setFactor(type, clk_data, rf, early_late, derate);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::timingDerateInstance(const Pin *pin,
|
2022-01-14 00:29:38 +01:00
|
|
|
TimingDerateCellType type,
|
2018-09-28 17:54:21 +02:00
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
const Instance *inst = network_->instance(pin);
|
|
|
|
|
DeratingFactorsCell *factors = inst_derating_factors_.findKey(inst);
|
|
|
|
|
if (factors) {
|
|
|
|
|
float factor;
|
|
|
|
|
bool exists;
|
|
|
|
|
factors->factor(type, clk_data, rf, early_late, factor, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
return factor;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
const LibertyCell *cell = network_->libertyCell(inst);
|
|
|
|
|
if (cell) {
|
|
|
|
|
DeratingFactorsCell *factors = cell_derating_factors_.findKey(cell);
|
|
|
|
|
float factor;
|
|
|
|
|
bool exists;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (factors) {
|
2019-11-11 23:30:19 +01:00
|
|
|
factors->factor(type, clk_data, rf, early_late, factor, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (exists)
|
2023-01-19 19:23:45 +01:00
|
|
|
return factor;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (derating_factors_) {
|
|
|
|
|
float factor;
|
|
|
|
|
bool exists;
|
2019-11-11 23:30:19 +01:00
|
|
|
derating_factors_->factor(type, clk_data, rf, early_late, factor, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (exists)
|
|
|
|
|
return factor;
|
|
|
|
|
}
|
|
|
|
|
return 1.0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::timingDerateNet(const Pin *pin,
|
|
|
|
|
PathClkOrData clk_data,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const EarlyLate *early_late) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
const Net *net = network_->net(pin);
|
|
|
|
|
DeratingFactorsNet *factors = net_derating_factors_.findKey(net);
|
|
|
|
|
if (factors) {
|
|
|
|
|
float factor;
|
|
|
|
|
bool exists;
|
|
|
|
|
factors->factor(clk_data, rf, early_late, factor, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
return factor;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
if (derating_factors_) {
|
|
|
|
|
float factor;
|
|
|
|
|
bool exists;
|
2019-11-11 23:30:19 +01:00
|
|
|
derating_factors_->factor(TimingDerateType::net_delay, clk_data, rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
early_late, factor, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
return factor;
|
|
|
|
|
}
|
|
|
|
|
return 1.0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unsetTimingDerate()
|
|
|
|
|
{
|
|
|
|
|
deleteDeratingFactors();
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-04 19:52:36 +01:00
|
|
|
void
|
2024-04-23 21:57:06 +02:00
|
|
|
Sdc::swapDeratingFactors(Sdc *sdc1,
|
|
|
|
|
Sdc *sdc2)
|
2023-01-04 19:52:36 +01:00
|
|
|
{
|
2024-04-23 21:57:06 +02:00
|
|
|
swap(sdc1->derating_factors_, sdc2->derating_factors_);
|
|
|
|
|
swap(sdc1->net_derating_factors_, sdc2->net_derating_factors_);
|
|
|
|
|
swap(sdc1->inst_derating_factors_, sdc2->inst_derating_factors_);
|
|
|
|
|
swap(sdc1->cell_derating_factors_, sdc2->cell_derating_factors_);
|
2023-01-04 19:52:36 +01:00
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::deleteDeratingFactors()
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
net_derating_factors_.deleteContents();
|
|
|
|
|
inst_derating_factors_.deleteContents();
|
|
|
|
|
cell_derating_factors_.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
delete derating_factors_;
|
2019-03-13 01:25:53 +01:00
|
|
|
derating_factors_ = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setDriveCell(const LibertyLibrary *library,
|
|
|
|
|
const LibertyCell *cell,
|
|
|
|
|
const Port *port,
|
|
|
|
|
const LibertyPort *from_port,
|
2018-09-28 17:54:21 +02:00
|
|
|
float *from_slews,
|
2023-01-19 19:23:45 +01:00
|
|
|
const LibertyPort *to_port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max)
|
|
|
|
|
{
|
2019-02-16 21:07:59 +01:00
|
|
|
ensureInputDrive(port)->setDriveCell(library, cell, from_port, from_slews,
|
2019-11-11 23:30:19 +01:00
|
|
|
to_port, rf, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setInputSlew(const Port *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
float slew)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ensureInputDrive(port)->setSlew(rf, min_max, slew);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setDriveResistance(const Port *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
float res)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ensureInputDrive(port)->setDriveResistance(rf, min_max, res);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
InputDrive *
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::ensureInputDrive(const Port *port)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
InputDrive *drive = input_drive_map_.findKey(port);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (drive == nullptr) {
|
|
|
|
|
drive = new InputDrive;
|
2018-09-28 17:54:21 +02:00
|
|
|
input_drive_map_[port] = drive;
|
|
|
|
|
}
|
|
|
|
|
return drive;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setSlewLimit(Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const PathClkOrData clk_data,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float slew)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
clk->setSlewLimit(rf, clk_data, min_max, slew);
|
2018-09-28 17:54:21 +02:00
|
|
|
have_clk_slew_limits_ = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::haveClkSlewLimits() const
|
|
|
|
|
{
|
|
|
|
|
return have_clk_slew_limits_;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2022-04-14 20:19:18 +02:00
|
|
|
Sdc::slewLimit(Clock *clk,
|
|
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const PathClkOrData clk_data,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &slew,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
clk->slewLimit(rf, clk_data, min_max, slew, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::slewLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &slew,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
2022-04-14 20:19:18 +02:00
|
|
|
slew = INF;
|
2018-09-28 17:54:21 +02:00
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
port_slew_limit_map_.findKey(port, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, slew, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setSlewLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float slew)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = port_slew_limit_map_[port];
|
|
|
|
|
values.setValue(min_max, slew);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::slewLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &slew,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
2022-04-14 20:19:18 +02:00
|
|
|
slew = INF;
|
2018-09-28 17:54:21 +02:00
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
cell_slew_limit_map_.findKey(cell, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, slew, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setSlewLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float slew)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = cell_slew_limit_map_[cell];
|
|
|
|
|
values.setValue(min_max, slew);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::capacitanceLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &cap,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
cap = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
cell_cap_limit_map_.findKey(cell, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, cap, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setCapacitanceLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float cap)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = cell_cap_limit_map_[cell];
|
|
|
|
|
values.setValue(min_max, cap);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::capacitanceLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &cap,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
cap = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
port_cap_limit_map_.findKey(port, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, cap, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setCapacitanceLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float cap)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = port_cap_limit_map_[port];
|
|
|
|
|
values.setValue(min_max, cap);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::capacitanceLimit(Pin *pin,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &cap,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
cap = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
pin_cap_limit_map_.findKey(pin, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, cap, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setCapacitanceLimit(Pin *pin,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float cap)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = pin_cap_limit_map_[pin];
|
|
|
|
|
values.setValue(min_max, cap);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::fanoutLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &fanout,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
2021-10-22 19:51:20 +02:00
|
|
|
fanout = min_max->initValue();
|
2018-09-28 17:54:21 +02:00
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
cell_fanout_limit_map_.findKey(cell, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, fanout, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setFanoutLimit(Cell *cell,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float fanout)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = cell_fanout_limit_map_[cell];
|
|
|
|
|
values.setValue(min_max, fanout);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::fanoutLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &fanout,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
fanout = 0.0;
|
|
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
port_fanout_limit_map_.findKey(port, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, fanout, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setFanoutLimit(Port *port,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float fanout)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = port_fanout_limit_map_[port];
|
|
|
|
|
values.setValue(min_max, fanout);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setMaxArea(float area)
|
|
|
|
|
{
|
|
|
|
|
max_area_ = area;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::maxArea() const
|
|
|
|
|
{
|
|
|
|
|
return max_area_;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
Clock *
|
|
|
|
|
Sdc::makeClock(const char *name,
|
|
|
|
|
PinSet *pins,
|
|
|
|
|
bool add_to_pins,
|
|
|
|
|
float period,
|
|
|
|
|
FloatSeq *waveform,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
Clock *clk = clock_name_map_.findKey(name);
|
|
|
|
|
if (!add_to_pins)
|
|
|
|
|
deletePinClocks(clk, pins);
|
|
|
|
|
if (clk)
|
|
|
|
|
// Named clock redefinition.
|
|
|
|
|
deleteClkPinMappings(clk);
|
|
|
|
|
else {
|
|
|
|
|
// Fresh clock definition.
|
2023-01-19 19:23:45 +01:00
|
|
|
clk = new Clock(name, clk_index_++, network_);
|
2025-04-10 01:35:15 +02:00
|
|
|
clk->setIsPropagated(variables_->propagateAllClocks());
|
2018-09-28 17:54:21 +02:00
|
|
|
clocks_.push_back(clk);
|
|
|
|
|
// Use the copied name in the map.
|
|
|
|
|
clock_name_map_[clk->name()] = clk;
|
|
|
|
|
}
|
2019-10-10 06:02:33 +02:00
|
|
|
clk->initClk(pins, add_to_pins, period, waveform, comment, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
makeClkPinMappings(clk);
|
|
|
|
|
clearCycleAcctings();
|
|
|
|
|
invalidateGeneratedClks();
|
|
|
|
|
clkHpinDisablesInvalid();
|
|
|
|
|
return clk;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
Clock *
|
|
|
|
|
Sdc::makeGeneratedClock(const char *name,
|
|
|
|
|
PinSet *pins,
|
|
|
|
|
bool add_to_pins,
|
|
|
|
|
Pin *src_pin,
|
|
|
|
|
Clock *master_clk,
|
|
|
|
|
int divide_by,
|
|
|
|
|
int multiply_by,
|
|
|
|
|
float duty_cycle,
|
|
|
|
|
bool invert,
|
|
|
|
|
bool combinational,
|
|
|
|
|
IntSeq *edges,
|
|
|
|
|
FloatSeq *edge_shifts,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
Clock *clk = clock_name_map_.findKey(name);
|
|
|
|
|
if (!add_to_pins)
|
|
|
|
|
deletePinClocks(clk, pins);
|
|
|
|
|
if (clk)
|
|
|
|
|
deleteClkPinMappings(clk);
|
|
|
|
|
else {
|
2023-01-19 19:23:45 +01:00
|
|
|
clk = new Clock(name, clk_index_++, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
clocks_.push_back(clk);
|
|
|
|
|
clock_name_map_[clk->name()] = clk;
|
|
|
|
|
}
|
|
|
|
|
clk->initGeneratedClk(pins, add_to_pins, src_pin, master_clk,
|
|
|
|
|
divide_by, multiply_by, duty_cycle,
|
|
|
|
|
invert, combinational,
|
2025-04-10 01:35:15 +02:00
|
|
|
edges, edge_shifts,
|
|
|
|
|
variables_->propagateAllClocks(),
|
2018-09-28 17:54:21 +02:00
|
|
|
comment, network_);
|
|
|
|
|
makeClkPinMappings(clk);
|
|
|
|
|
clearCycleAcctings();
|
|
|
|
|
invalidateGeneratedClks();
|
|
|
|
|
clkHpinDisablesInvalid();
|
|
|
|
|
return clk;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::invalidateGeneratedClks() const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto clk : clocks_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (clk->isGenerated())
|
|
|
|
|
clk->waveformInvalid();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// If the clock is not defined with the -add option, any pins that already
|
|
|
|
|
// have a clock attached to them are removed from the pin. If the clock
|
|
|
|
|
// is not the clock being defined and has no pins it is removed.
|
|
|
|
|
void
|
|
|
|
|
Sdc::deletePinClocks(Clock *defining_clk,
|
|
|
|
|
PinSet *pins)
|
|
|
|
|
{
|
|
|
|
|
// Find all the clocks defined on pins to avoid finding the clock's
|
|
|
|
|
// vertex pins multiple times.
|
|
|
|
|
ClockSet clks;
|
2023-01-19 19:23:45 +01:00
|
|
|
if (pins) {
|
|
|
|
|
for (const Pin *pin : *pins) {
|
|
|
|
|
ClockSet *pin_clks = clock_pin_map_.findKey(pin);
|
|
|
|
|
if (pin_clks) {
|
|
|
|
|
for (Clock *clk : *pin_clks)
|
|
|
|
|
clks.insert(clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
for (Clock *clk : clks) {
|
2018-09-28 17:54:21 +02:00
|
|
|
deleteClkPinMappings(clk);
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *pins)
|
2018-09-28 17:54:21 +02:00
|
|
|
clk->deletePin(pin);
|
|
|
|
|
if (clk != defining_clk) {
|
2019-10-25 17:51:59 +02:00
|
|
|
if (clk->pins().empty())
|
2018-09-28 17:54:21 +02:00
|
|
|
removeClock(clk);
|
|
|
|
|
else {
|
2019-10-25 17:51:59 +02:00
|
|
|
clk->makeLeafPins(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
// One of the remaining clock pins may use a vertex pin that
|
|
|
|
|
// was deleted above.
|
|
|
|
|
makeClkPinMappings(clk);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteClkPinMappings(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : clk->pins()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ClockSet *pin_clks = clock_pin_map_.findKey(pin);
|
|
|
|
|
if (pin_clks) {
|
|
|
|
|
pin_clks->erase(clk);
|
|
|
|
|
if (pin_clks->empty()) {
|
2019-04-11 05:36:48 +02:00
|
|
|
clock_pin_map_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete pin_clks;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-25 17:51:59 +02:00
|
|
|
for (const Pin *pin : clk->leafPins()) {
|
|
|
|
|
ClockSet *pin_clks = clock_leaf_pin_map_.findKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (pin_clks) {
|
|
|
|
|
pin_clks->erase(clk);
|
|
|
|
|
if (pin_clks->empty()) {
|
2019-10-25 17:51:59 +02:00
|
|
|
clock_leaf_pin_map_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete pin_clks;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClkPinMappings(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : clk->pins()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ClockSet *pin_clks = clock_pin_map_.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (pin_clks == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
pin_clks = new ClockSet;
|
|
|
|
|
clock_pin_map_.insert(pin, pin_clks);
|
|
|
|
|
}
|
|
|
|
|
pin_clks->insert(clk);
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-25 17:51:59 +02:00
|
|
|
for (const Pin *pin : clk->leafPins()) {
|
|
|
|
|
ClockSet *pin_clks = clock_leaf_pin_map_.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (pin_clks == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
pin_clks = new ClockSet;
|
2019-10-25 17:51:59 +02:00
|
|
|
clock_leaf_pin_map_.insert(pin, pin_clks);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
pin_clks->insert(clk);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClock(Clock *clk)
|
|
|
|
|
{
|
|
|
|
|
deleteExceptionsReferencing(clk);
|
|
|
|
|
deleteInputDelaysReferencing(clk);
|
|
|
|
|
deleteOutputDelaysReferencing(clk);
|
|
|
|
|
deleteClockLatenciesReferencing(clk);
|
|
|
|
|
deleteClockInsertionsReferencing(clk);
|
|
|
|
|
deleteInterClockUncertaintiesReferencing(clk);
|
|
|
|
|
deleteLatchBorrowLimitsReferencing(clk);
|
|
|
|
|
deleteMinPulseWidthReferencing(clk);
|
|
|
|
|
deleteMasterClkRefs(clk);
|
|
|
|
|
clockGroupsDeleteClkRefs(clk);
|
|
|
|
|
clearCycleAcctings();
|
|
|
|
|
|
|
|
|
|
deleteClkPinMappings(clk);
|
|
|
|
|
clocks_.eraseObject(clk);
|
2019-04-11 05:36:48 +02:00
|
|
|
clock_name_map_.erase(clk->name());
|
2018-09-28 17:54:21 +02:00
|
|
|
delete clk;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Delete references to clk as a master clock.
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteMasterClkRefs(Clock *clk)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto gclk : clocks_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (gclk->isGenerated()
|
|
|
|
|
&& gclk->masterClk() == clk) {
|
2019-03-13 01:25:53 +01:00
|
|
|
gclk->setMasterClk(nullptr);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
Clock *
|
|
|
|
|
Sdc::findClock(const char *name) const
|
|
|
|
|
{
|
|
|
|
|
return clock_name_map_.findKey(name);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isClock(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
ClockSet *clks = findClocks(pin);
|
|
|
|
|
return clks && !clks->empty();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2019-10-25 17:51:59 +02:00
|
|
|
Sdc::isLeafPinClock(const Pin *pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
ClockSet *clks = findLeafPinClocks(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
return clks && !clks->empty();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2019-10-25 17:51:59 +02:00
|
|
|
Sdc::isLeafPinNonGeneratedClock(const Pin *pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
ClockSet *clks = findLeafPinClocks(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (clks) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (Clock *clk : *clks) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (!clk->isGenerated())
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ClockSet *
|
2019-10-25 17:51:59 +02:00
|
|
|
Sdc::findLeafPinClocks(const Pin *pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
return clock_leaf_pin_map_.findKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ClockSet *
|
|
|
|
|
Sdc::findClocks(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
return clock_pin_map_.findKey(pin);
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockSeq
|
|
|
|
|
Sdc::findClocksMatching(PatternMatch *pattern) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockSeq matches;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (!pattern->hasWildcards()) {
|
|
|
|
|
Clock *clk = findClock(pattern->pattern());
|
|
|
|
|
if (clk)
|
2023-01-19 19:23:45 +01:00
|
|
|
matches.push_back(clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else {
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto clk : clocks_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (pattern->match(clk->name()))
|
2023-01-19 19:23:45 +01:00
|
|
|
matches.push_back(clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
return matches;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::sortedClocks(ClockSeq &clks)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto clk : clocks_)
|
2018-09-28 17:54:21 +02:00
|
|
|
clks.push_back(clk);
|
|
|
|
|
sort(clks, ClkNameLess());
|
|
|
|
|
}
|
|
|
|
|
|
2025-04-10 01:35:15 +02:00
|
|
|
ClockEdge *
|
|
|
|
|
Sdc::defaultArrivalClockEdge() const
|
|
|
|
|
{
|
|
|
|
|
return default_arrival_clk_->edge(RiseFall::rise());
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
class ClkHpinDisable
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
ClkHpinDisable(const Clock *clk,
|
|
|
|
|
const Pin *from_pin,
|
|
|
|
|
const Pin *to_pin);
|
|
|
|
|
const Clock *clk() const { return clk_; }
|
|
|
|
|
const Pin *fromPin() const { return from_pin_; }
|
|
|
|
|
const Pin *toPin() const { return to_pin_; }
|
|
|
|
|
|
|
|
|
|
private:
|
|
|
|
|
const Clock *clk_;
|
|
|
|
|
const Pin *from_pin_;
|
|
|
|
|
const Pin *to_pin_;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ClkHpinDisable::ClkHpinDisable(const Clock *clk,
|
|
|
|
|
const Pin *from_pin,
|
|
|
|
|
const Pin *to_pin) :
|
|
|
|
|
clk_(clk),
|
|
|
|
|
from_pin_(from_pin),
|
|
|
|
|
to_pin_(to_pin)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
ClkHpinDisableLess::ClkHpinDisableLess(const Network *network) :
|
|
|
|
|
network_(network)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
bool
|
|
|
|
|
ClkHpinDisableLess::operator()(const ClkHpinDisable *disable1,
|
|
|
|
|
const ClkHpinDisable *disable2) const
|
|
|
|
|
{
|
|
|
|
|
int clk_index1 = disable1->clk()->index();
|
|
|
|
|
int clk_index2 = disable2->clk()->index();
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *from_pin1 = disable1->fromPin();
|
|
|
|
|
const Pin *from_pin2 = disable2->fromPin();
|
|
|
|
|
const Pin *to_pin1 = disable1->toPin();
|
|
|
|
|
const Pin *to_pin2 = disable2->toPin();
|
|
|
|
|
return clk_index1 < clk_index2
|
|
|
|
|
|| (clk_index1 == clk_index2
|
|
|
|
|
&& (network_->id(to_pin1) < network_->id(to_pin2)
|
|
|
|
|
|| (from_pin1 == from_pin2
|
|
|
|
|
&& network_->id(from_pin1) < network_->id(from_pin2))));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2020-07-12 17:55:44 +02:00
|
|
|
class FindClkHpinDisables : public HpinDrvrLoadVisitor
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
FindClkHpinDisables(Clock *clk,
|
|
|
|
|
const Network *network,
|
|
|
|
|
Sdc *sdc);
|
2023-01-19 19:23:45 +01:00
|
|
|
bool drvrLoadExists(const Pin *drvr,
|
|
|
|
|
const Pin *load);
|
2020-07-12 17:55:44 +02:00
|
|
|
|
|
|
|
|
protected:
|
|
|
|
|
virtual void visit(HpinDrvrLoad *drvr_load);
|
2023-01-19 19:23:45 +01:00
|
|
|
void makeClkHpinDisables(const Pin *clk_src,
|
|
|
|
|
const Pin *drvr,
|
|
|
|
|
const Pin *load);
|
2020-07-12 17:55:44 +02:00
|
|
|
|
|
|
|
|
Clock *clk_;
|
|
|
|
|
PinPairSet drvr_loads_;
|
|
|
|
|
const Network *network_;
|
|
|
|
|
Sdc *sdc_;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
FindClkHpinDisables::FindClkHpinDisables(Clock *clk,
|
|
|
|
|
const Network *network,
|
|
|
|
|
Sdc *sdc) :
|
|
|
|
|
HpinDrvrLoadVisitor(),
|
|
|
|
|
clk_(clk),
|
2023-01-19 19:23:45 +01:00
|
|
|
drvr_loads_(network),
|
2020-07-12 17:55:44 +02:00
|
|
|
network_(network),
|
|
|
|
|
sdc_(sdc)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
FindClkHpinDisables::visit(HpinDrvrLoad *drvr_load)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *drvr = drvr_load->drvr();
|
|
|
|
|
const Pin *load = drvr_load->load();
|
2020-07-12 17:55:44 +02:00
|
|
|
|
|
|
|
|
makeClkHpinDisables(drvr, drvr, load);
|
|
|
|
|
|
|
|
|
|
PinSet *hpins_from_drvr = drvr_load->hpinsFromDrvr();
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *hpin : *hpins_from_drvr)
|
2020-07-12 17:55:44 +02:00
|
|
|
makeClkHpinDisables(hpin, drvr, load);
|
2023-01-19 19:23:45 +01:00
|
|
|
drvr_loads_.insert(PinPair(drvr, load));
|
2020-07-12 17:55:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
FindClkHpinDisables::makeClkHpinDisables(const Pin *clk_src,
|
|
|
|
|
const Pin *drvr,
|
|
|
|
|
const Pin *load)
|
2020-07-12 17:55:44 +02:00
|
|
|
{
|
|
|
|
|
ClockSet *clks = sdc_->findClocks(clk_src);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (clks) {
|
|
|
|
|
for (Clock *clk : *clks) {
|
|
|
|
|
if (clk != clk_)
|
|
|
|
|
// Do not propagate clock from source pin if another
|
|
|
|
|
// clock is defined on a hierarchical pin between the
|
|
|
|
|
// driver and load.
|
|
|
|
|
sdc_->makeClkHpinDisable(clk, drvr, load);
|
|
|
|
|
}
|
2020-07-12 17:55:44 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
FindClkHpinDisables::drvrLoadExists(const Pin *drvr,
|
|
|
|
|
const Pin *load)
|
2020-07-12 17:55:44 +02:00
|
|
|
{
|
|
|
|
|
PinPair probe(drvr, load);
|
2023-01-19 19:23:45 +01:00
|
|
|
return drvr_loads_.hasKey(probe);
|
2020-07-12 17:55:44 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::ensureClkHpinDisables()
|
|
|
|
|
{
|
|
|
|
|
if (!clk_hpin_disables_valid_) {
|
|
|
|
|
clk_hpin_disables_.deleteContentsClear();
|
|
|
|
|
for (auto clk : clocks_) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *src : clk->pins()) {
|
2020-07-12 17:55:44 +02:00
|
|
|
if (network_->isHierarchical(src)) {
|
2020-07-12 19:29:06 +02:00
|
|
|
FindClkHpinDisables visitor1(clk, network_, this);
|
|
|
|
|
visitHpinDrvrLoads(src, network_, &visitor1);
|
|
|
|
|
PinSeq loads, drvrs;
|
2023-01-19 19:23:45 +01:00
|
|
|
PinSet visited_drvrs(network_);
|
2020-07-12 19:29:06 +02:00
|
|
|
FindNetDrvrLoads visitor2(nullptr, visited_drvrs, loads, drvrs, network_);
|
|
|
|
|
network_->visitConnectedPins(src, visitor2);
|
|
|
|
|
|
2020-07-12 17:55:44 +02:00
|
|
|
// Disable fanouts from the src driver pins that do
|
|
|
|
|
// not go thru the hierarchical src pin.
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *drvr : drvrs) {
|
|
|
|
|
for (const Pin *load : loads) {
|
2020-07-12 19:29:06 +02:00
|
|
|
if (!visitor1.drvrLoadExists(drvr, load))
|
|
|
|
|
makeClkHpinDisable(clk, drvr, load);
|
|
|
|
|
}
|
2020-07-12 17:55:44 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
clk_hpin_disables_valid_ = true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeClkHpinDisable(const Clock *clk,
|
|
|
|
|
const Pin *drvr,
|
|
|
|
|
const Pin *load)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ClkHpinDisable probe(clk, drvr, load);
|
|
|
|
|
if (!clk_hpin_disables_.hasKey(&probe)) {
|
|
|
|
|
ClkHpinDisable *disable = new ClkHpinDisable(clk, drvr, load);
|
|
|
|
|
clk_hpin_disables_.insert(disable);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clkHpinDisablesInvalid()
|
|
|
|
|
{
|
|
|
|
|
clk_hpin_disables_valid_ = false;
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto clk : clocks_)
|
2019-10-25 17:51:59 +02:00
|
|
|
clk->makeLeafPins(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Check that driver/load edge goes thru clock hpin.
|
|
|
|
|
// Check for disable by hierarchical clock pin between driver and load.
|
|
|
|
|
bool
|
|
|
|
|
Sdc::clkDisabledByHpinThru(const Clock *clk,
|
|
|
|
|
const Pin *from_pin,
|
|
|
|
|
const Pin *to_pin)
|
|
|
|
|
{
|
2023-03-09 21:23:45 +01:00
|
|
|
if (clk->leafPins().hasKey(from_pin)) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ClkHpinDisable probe(clk, from_pin, to_pin);
|
|
|
|
|
return clk_hpin_disables_.hasKey(&probe);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setPropagatedClock(Clock *clk)
|
|
|
|
|
{
|
|
|
|
|
clk->setIsPropagated(true);
|
2019-03-13 01:25:53 +01:00
|
|
|
removeClockLatency(clk, nullptr);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removePropagatedClock(Clock *clk)
|
|
|
|
|
{
|
|
|
|
|
clk->setIsPropagated(false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setPropagatedClock(Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
propagated_clk_pins_.insert(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
removeClockLatency(nullptr, pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removePropagatedClock(Pin *pin)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
propagated_clk_pins_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isPropagatedClock(const Pin *pin)
|
|
|
|
|
{
|
2023-03-09 21:23:45 +01:00
|
|
|
return propagated_clk_pins_.hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockSlew(Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
float slew)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
clk->setSlew(rf, min_max, slew);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockSlew(Clock *clk)
|
|
|
|
|
{
|
|
|
|
|
clk->removeSlew();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockLatency(Clock *clk,
|
|
|
|
|
Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
float delay)
|
|
|
|
|
{
|
|
|
|
|
ClockLatency probe(clk, pin);
|
|
|
|
|
ClockLatency *latency = clk_latencies_.findKey(&probe);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (latency == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
latency = new ClockLatency(clk, pin);
|
|
|
|
|
clk_latencies_.insert(latency);
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
latency->setDelay(rf, min_max, delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
// set_clock_latency removes set_propagated_clock on the same object.
|
2019-03-13 01:25:53 +01:00
|
|
|
if (clk && pin == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
removePropagatedClock(clk);
|
|
|
|
|
if (pin)
|
|
|
|
|
removePropagatedClock(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockLatency(const Clock *clk,
|
|
|
|
|
const Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
ClockLatency probe(clk, pin);
|
|
|
|
|
ClockLatency *latency = clk_latencies_.findKey(&probe);
|
|
|
|
|
if (latency)
|
|
|
|
|
deleteClockLatency(latency);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteClockLatency(ClockLatency *latency)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
clk_latencies_.erase(latency);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete latency;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteClockLatenciesReferencing(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto iter = clk_latencies_.cbegin();
|
|
|
|
|
iter != clk_latencies_.cend(); ) {
|
|
|
|
|
ClockLatency *latency = *iter;
|
|
|
|
|
if (latency->clock() == clk) {
|
|
|
|
|
iter = clk_latencies_.erase(iter);
|
|
|
|
|
delete latency;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
iter++;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::hasClockLatency(const Pin *pin) const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockLatency probe(nullptr, pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
return clk_latencies_.hasKey(&probe);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockLatency(const Clock *clk,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &latency,
|
|
|
|
|
bool &exists) const
|
|
|
|
|
{
|
|
|
|
|
latency = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
if (pin && clk) {
|
|
|
|
|
ClockLatency probe(clk, pin);
|
|
|
|
|
ClockLatency *latencies = clk_latencies_.findKey(&probe);
|
|
|
|
|
if (latencies)
|
2019-11-11 23:30:19 +01:00
|
|
|
latencies->delay(rf, min_max, latency, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
if (!exists) {
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockLatency probe(nullptr, pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
ClockLatency *latencies = clk_latencies_.findKey(&probe);
|
|
|
|
|
if (latencies)
|
2019-11-11 23:30:19 +01:00
|
|
|
latencies->delay(rf, min_max, latency, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockLatency(const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &latency,
|
|
|
|
|
bool &exists) const
|
|
|
|
|
{
|
|
|
|
|
latency = 0.0;
|
|
|
|
|
exists = false;
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockLatency probe(clk, nullptr);
|
2018-09-28 17:54:21 +02:00
|
|
|
ClockLatency *latencies = clk_latencies_.findKey(&probe);
|
|
|
|
|
if (latencies)
|
2019-11-11 23:30:19 +01:00
|
|
|
latencies->delay(rf, min_max, latency, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::clockLatency(const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max) const
|
|
|
|
|
{
|
|
|
|
|
float latency;
|
|
|
|
|
bool exists;
|
2019-11-11 23:30:19 +01:00
|
|
|
clockLatency(clk, rf, min_max,
|
2018-09-28 17:54:21 +02:00
|
|
|
latency, exists);
|
|
|
|
|
return latency;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockUncertainty(Pin *pin,
|
|
|
|
|
const SetupHoldAll *setup_hold,
|
|
|
|
|
float uncertainty)
|
|
|
|
|
{
|
|
|
|
|
ClockUncertainties *uncertainties = pin_clk_uncertainty_map_.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (uncertainties == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
uncertainties = new ClockUncertainties;
|
|
|
|
|
pin_clk_uncertainty_map_[pin] = uncertainties;
|
|
|
|
|
}
|
|
|
|
|
uncertainties->setValue(setup_hold, uncertainty);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockUncertainty(Pin *pin,
|
|
|
|
|
const SetupHoldAll *setup_hold)
|
|
|
|
|
{
|
|
|
|
|
ClockUncertainties *uncertainties = pin_clk_uncertainty_map_.findKey(pin);
|
|
|
|
|
if (uncertainties) {
|
|
|
|
|
uncertainties->removeValue(setup_hold);
|
|
|
|
|
if (uncertainties->empty()) {
|
|
|
|
|
delete uncertainties;
|
2019-04-11 05:36:48 +02:00
|
|
|
pin_clk_uncertainty_map_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ClockUncertainties *
|
|
|
|
|
Sdc::clockUncertainties(const Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
return pin_clk_uncertainty_map_.findKey(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockUncertainty(const Pin *pin,
|
|
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float &uncertainty,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
ClockUncertainties *uncertainties = clockUncertainties(pin);
|
|
|
|
|
if (uncertainties)
|
|
|
|
|
uncertainties->value(setup_hold, uncertainty, exists);
|
|
|
|
|
else {
|
|
|
|
|
uncertainty = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockUncertainty(const Clock *src_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *src_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Clock *tgt_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *tgt_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float &uncertainty,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
InterClockUncertainty probe(src_clk, tgt_clk);
|
|
|
|
|
InterClockUncertainty *uncertainties =
|
|
|
|
|
inter_clk_uncertainties_.findKey(&probe);
|
|
|
|
|
if (uncertainties)
|
2019-11-11 23:30:19 +01:00
|
|
|
uncertainties->uncertainty(src_rf, tgt_rf, setup_hold,
|
2018-09-28 17:54:21 +02:00
|
|
|
uncertainty, exists);
|
|
|
|
|
else {
|
|
|
|
|
uncertainty = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockUncertainty(Clock *from_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *from_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Clock *to_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHoldAll *setup_hold,
|
|
|
|
|
float uncertainty)
|
|
|
|
|
{
|
|
|
|
|
InterClockUncertainty probe(from_clk, to_clk);
|
|
|
|
|
InterClockUncertainty *uncertainties =
|
|
|
|
|
inter_clk_uncertainties_.findKey(&probe);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (uncertainties == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
uncertainties = new InterClockUncertainty(from_clk, to_clk);
|
|
|
|
|
inter_clk_uncertainties_.insert(uncertainties);
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
uncertainties->setUncertainty(from_rf, to_rf, setup_hold, uncertainty);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockUncertainty(Clock *from_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *from_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Clock *to_clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHoldAll *setup_hold)
|
|
|
|
|
{
|
|
|
|
|
InterClockUncertainty probe(from_clk, to_clk);
|
|
|
|
|
InterClockUncertainty *uncertainties =
|
|
|
|
|
inter_clk_uncertainties_.findKey(&probe);
|
|
|
|
|
if (uncertainties) {
|
2019-11-11 23:30:19 +01:00
|
|
|
uncertainties->removeUncertainty(from_rf, to_rf, setup_hold);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (uncertainties->empty()) {
|
2019-04-11 05:36:48 +02:00
|
|
|
inter_clk_uncertainties_.erase(uncertainties);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete uncertainties;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteInterClockUncertainty(InterClockUncertainty *uncertainties)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
inter_clk_uncertainties_.erase(uncertainties);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete uncertainties;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteInterClockUncertaintiesReferencing(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto iter = inter_clk_uncertainties_.cbegin();
|
|
|
|
|
iter != inter_clk_uncertainties_.cend(); ) {
|
|
|
|
|
InterClockUncertainty *uncertainties = *iter;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (uncertainties->src() == clk
|
2023-01-19 19:23:45 +01:00
|
|
|
|| uncertainties->target() == clk) {
|
|
|
|
|
iter = inter_clk_uncertainties_.erase(iter);
|
|
|
|
|
delete uncertainties;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
iter++;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockInsertion(const Clock *clk,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
const EarlyLateAll *early_late,
|
|
|
|
|
float delay)
|
|
|
|
|
{
|
|
|
|
|
ClockInsertion probe(clk, pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertion *insertion = clk_insertions_.findKey(&probe);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (insertion == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
insertion = new ClockInsertion(clk, pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_insertions_.insert(insertion);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
insertion->setDelay(rf, min_max, early_late, delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockInsertion(const Clock *clk,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
float delay)
|
|
|
|
|
{
|
|
|
|
|
ClockInsertion probe(clk, pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertion *insertion = clk_insertions_.findKey(&probe);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (insertion == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
insertion = new ClockInsertion(clk, pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_insertions_.insert(insertion);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
insertion->setDelay(rf, min_max, early_late, delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockInsertion(const Clock *clk,
|
|
|
|
|
const Pin *pin)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertion probe(clk, pin);
|
|
|
|
|
ClockInsertion *insertion = clk_insertions_.findKey(&probe);
|
|
|
|
|
if (insertion != nullptr)
|
|
|
|
|
deleteClockInsertion(insertion);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2024-04-13 05:21:28 +02:00
|
|
|
void
|
2024-04-23 21:57:06 +02:00
|
|
|
Sdc::swapClockInsertions(Sdc *sdc1,
|
|
|
|
|
Sdc *sdc2)
|
2024-04-13 05:21:28 +02:00
|
|
|
{
|
2024-04-23 21:57:06 +02:00
|
|
|
swap(sdc1->clk_insertions_, sdc2->clk_insertions_);
|
2024-04-13 05:21:28 +02:00
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::deleteClockInsertion(ClockInsertion *insertion)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_insertions_.erase(insertion);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete insertion;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteClockInsertionsReferencing(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto iter = clk_insertions_.cbegin();
|
|
|
|
|
iter != clk_insertions_.cend(); ) {
|
|
|
|
|
ClockInsertion *insertion = *iter;
|
|
|
|
|
if (insertion->clock() == clk) {
|
|
|
|
|
iter = clk_insertions_.erase(iter);
|
|
|
|
|
delete insertion;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
iter++;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::clockInsertion(const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
const EarlyLate *early_late) const
|
|
|
|
|
{
|
|
|
|
|
float insertion;
|
|
|
|
|
bool exists;
|
2019-11-11 23:30:19 +01:00
|
|
|
clockInsertion(clk, nullptr, rf, min_max, early_late, insertion, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
return insertion;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::hasClockInsertion(const Pin *pin) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertion probe(nullptr, pin);
|
|
|
|
|
return clk_insertions_.hasKey(&probe);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockInsertion(const Clock *clk,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
const EarlyLate *early_late,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &insertion,
|
|
|
|
|
bool &exists) const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockInsertion *insert = nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
if (clk && pin) {
|
|
|
|
|
ClockInsertion probe(clk, pin);
|
|
|
|
|
insert = clk_insertions_.findKey(&probe);
|
|
|
|
|
}
|
|
|
|
|
if (insert == nullptr && pin) {
|
|
|
|
|
ClockInsertion probe(nullptr, pin);
|
|
|
|
|
insert = clk_insertions_.findKey(&probe);
|
|
|
|
|
}
|
|
|
|
|
if (insert == nullptr && clk) {
|
|
|
|
|
ClockInsertion probe(clk, nullptr);
|
|
|
|
|
insert = clk_insertions_.findKey(&probe);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
if (insert)
|
2019-11-11 23:30:19 +01:00
|
|
|
insert->delay(rf, min_max, early_late, insertion, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else {
|
|
|
|
|
insertion = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockLatencyLess::ClockLatencyLess(const Network *network) :
|
|
|
|
|
network_(network)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockLatencyLess::operator()(const ClockLatency *latency1,
|
|
|
|
|
const ClockLatency *latency2) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
const Clock *clk1 = latency1->clock();
|
|
|
|
|
const Clock *clk2 = latency2->clock();
|
|
|
|
|
const Pin *pin1 = latency1->pin();
|
|
|
|
|
const Pin *pin2 = latency2->pin();
|
2023-01-19 19:23:45 +01:00
|
|
|
return (clk1 == nullptr && clk2)
|
|
|
|
|
|| ((clk1 && clk2 && clk1->index() < clk2->index())
|
|
|
|
|
|| (clk1 == clk2
|
|
|
|
|
&& ((pin1 == nullptr && pin2)
|
|
|
|
|
|| (pin1 && pin2 && network_->id(pin1) < network_->id(pin2)))));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertionkLess::ClockInsertionkLess(const Network *network) :
|
|
|
|
|
network_(network)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockInsertionkLess::operator()(const ClockInsertion *insert1,
|
|
|
|
|
const ClockInsertion *insert2) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
const Clock *clk1 = insert1->clock();
|
|
|
|
|
const Clock *clk2 = insert2->clock();
|
|
|
|
|
const Pin *pin1 = insert1->pin();
|
|
|
|
|
const Pin *pin2 = insert2->pin();
|
2023-01-19 19:23:45 +01:00
|
|
|
return (clk1 == nullptr && clk2)
|
|
|
|
|
|| ((clk1 && clk2 && clk1->index() < clk2->index())
|
|
|
|
|
|| (clk1 == clk2
|
|
|
|
|
&& ((pin1 == nullptr && pin2)
|
|
|
|
|
|| (pin1 && pin2 && network_->id(pin1) < network_->id(pin2)))));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
ClockGroups *
|
|
|
|
|
Sdc::makeClockGroups(const char *name,
|
|
|
|
|
bool logically_exclusive,
|
|
|
|
|
bool physically_exclusive,
|
|
|
|
|
bool asynchronous,
|
|
|
|
|
bool allow_paths,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
char *gen_name = nullptr;
|
|
|
|
|
if (name == nullptr
|
2018-09-28 17:54:21 +02:00
|
|
|
|| name[0] == '\0')
|
2019-01-17 00:37:31 +01:00
|
|
|
name = gen_name = makeClockGroupsName();
|
|
|
|
|
else {
|
|
|
|
|
ClockGroups *groups = clk_groups_name_map_.findKey(name);
|
|
|
|
|
if (groups)
|
|
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
ClockGroups *groups = new ClockGroups(name, logically_exclusive,
|
|
|
|
|
physically_exclusive,
|
|
|
|
|
asynchronous, allow_paths, comment);
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_groups_name_map_[groups->name()] = groups;
|
2019-01-17 00:37:31 +01:00
|
|
|
stringDelete(gen_name);
|
2018-09-28 17:54:21 +02:00
|
|
|
return groups;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Generate a name for the clock group.
|
|
|
|
|
char *
|
|
|
|
|
Sdc::makeClockGroupsName()
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
char *name = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
int i = 0;
|
|
|
|
|
do {
|
|
|
|
|
i++;
|
2019-01-17 00:37:31 +01:00
|
|
|
stringDelete(name);
|
|
|
|
|
name = stringPrint("group%d", i);
|
2018-09-28 17:54:21 +02:00
|
|
|
} while (clk_groups_name_map_.hasKey(name));
|
|
|
|
|
return name;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClockGroup(ClockGroups *clk_groups,
|
|
|
|
|
ClockSet *clks)
|
|
|
|
|
{
|
|
|
|
|
clk_groups->makeClockGroup(clks);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::ensureClkGroupExclusions()
|
|
|
|
|
{
|
2024-03-07 18:20:18 +01:00
|
|
|
if (clk_group_exclusions_.empty()) {
|
2024-06-27 22:57:58 +02:00
|
|
|
for (const auto [name, clk_groups] : clk_groups_name_map_)
|
|
|
|
|
makeClkGroupExclusions(clk_groups);
|
2024-03-07 18:20:18 +01:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClkGroupExclusions(ClockGroups *clk_groups)
|
|
|
|
|
{
|
|
|
|
|
if (!(clk_groups->asynchronous()
|
|
|
|
|
&& clk_groups->allowPaths())) {
|
|
|
|
|
ClockGroupSet *groups = clk_groups->groups();
|
2018-11-09 19:04:16 +01:00
|
|
|
if (groups->size() == 1)
|
|
|
|
|
makeClkGroupExclusions1(groups);
|
|
|
|
|
else
|
|
|
|
|
makeClkGroupExclusions(groups);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// If there is only one group all clocks not in the group
|
|
|
|
|
// are excluded.
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClkGroupExclusions1(ClockGroupSet *groups)
|
|
|
|
|
{
|
|
|
|
|
ClockGroupSet::Iterator group_iter1(groups);
|
|
|
|
|
ClockGroup *group1 = group_iter1.next();
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto clk1 : *group1) {
|
2019-03-13 01:25:53 +01:00
|
|
|
for (Clock *clk2 : clocks_) {
|
2018-11-09 19:04:16 +01:00
|
|
|
if (clk2 != clk1
|
2023-01-19 19:23:45 +01:00
|
|
|
&& !group1->hasKey(clk2))
|
|
|
|
|
clk_group_exclusions_.insert(ClockPair(clk1, clk2));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2018-11-09 19:04:16 +01:00
|
|
|
}
|
|
|
|
|
makeClkGroupSame(group1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClkGroupExclusions(ClockGroupSet *groups)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
for (auto group1 : *groups) {
|
|
|
|
|
for (auto group2 : *groups) {
|
2018-11-09 19:04:16 +01:00
|
|
|
if (group1 != group2) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto clk1 : *group1) {
|
|
|
|
|
for (auto clk2 : *group2) {
|
2018-11-09 19:04:16 +01:00
|
|
|
// ClockPair is symmetric so only add one clk1/clk2 pair.
|
|
|
|
|
if (clk1->index() < clk2->index()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_group_exclusions_.insert(ClockPair(clk1, clk2));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2018-11-09 19:04:16 +01:00
|
|
|
makeClkGroupSame(group1);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeClkGroupSame(ClockGroup *group)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (auto clk1 : *group) {
|
|
|
|
|
for (auto clk2 : *group) {
|
2018-11-09 19:04:16 +01:00
|
|
|
if (clk1->index() <= clk2->index()) {
|
2019-03-13 01:25:53 +01:00
|
|
|
ClockPair clk_pair(clk1, clk2);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!clk_group_same_.hasKey(clk_pair))
|
|
|
|
|
clk_group_same_.insert(clk_pair);
|
2018-11-09 19:04:16 +01:00
|
|
|
}
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clearClkGroupExclusions()
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
clk_group_exclusions_.clear();
|
|
|
|
|
clk_group_same_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::sameClockGroup(const Clock *clk1,
|
2018-11-09 19:04:16 +01:00
|
|
|
const Clock *clk2)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if (clk1 && clk2) {
|
|
|
|
|
ClockPair clk_pair(clk1, clk2);
|
2023-01-19 19:23:45 +01:00
|
|
|
bool excluded = clk_group_exclusions_.hasKey(clk_pair);
|
2018-09-28 17:54:21 +02:00
|
|
|
return !excluded;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-09 19:04:16 +01:00
|
|
|
bool
|
|
|
|
|
Sdc::sameClockGroupExplicit(const Clock *clk1,
|
|
|
|
|
const Clock *clk2)
|
|
|
|
|
{
|
|
|
|
|
ClockPair clk_pair(clk1, clk2);
|
2023-01-19 19:23:45 +01:00
|
|
|
return clk_group_same_.hasKey(clk_pair);
|
2018-11-09 19:04:16 +01:00
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::removeClockGroups(const char *name)
|
|
|
|
|
{
|
|
|
|
|
ClockGroups *clk_groups = clk_groups_name_map_.findKey(name);
|
|
|
|
|
if (clk_groups)
|
|
|
|
|
removeClockGroups(clk_groups);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockGroupsLogicallyExclusive(const char *name)
|
|
|
|
|
{
|
|
|
|
|
if (name) {
|
|
|
|
|
ClockGroups *groups = clk_groups_name_map_.findKey(name);
|
2022-01-15 20:51:05 +01:00
|
|
|
if (groups && groups->logicallyExclusive())
|
2018-09-28 17:54:21 +02:00
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
else {
|
2024-06-27 22:57:58 +02:00
|
|
|
for (const auto [name, groups] : clk_groups_name_map_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (groups->logicallyExclusive())
|
|
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockGroupsPhysicallyExclusive(const char *name)
|
|
|
|
|
{
|
|
|
|
|
if (name) {
|
|
|
|
|
ClockGroups *groups = clk_groups_name_map_.findKey(name);
|
2022-01-15 20:51:05 +01:00
|
|
|
if (groups && groups->physicallyExclusive())
|
2018-09-28 17:54:21 +02:00
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
else {
|
2024-06-27 22:57:58 +02:00
|
|
|
for (const auto [name, groups] : clk_groups_name_map_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (groups->physicallyExclusive())
|
|
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockGroupsAsynchronous(const char *name)
|
|
|
|
|
{
|
|
|
|
|
if (name) {
|
|
|
|
|
ClockGroups *groups = clk_groups_name_map_.findKey(name);
|
2022-01-15 20:51:05 +01:00
|
|
|
if (groups && groups->asynchronous())
|
2018-09-28 17:54:21 +02:00
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
else {
|
2024-06-27 22:57:58 +02:00
|
|
|
for (const auto [name, groups] : clk_groups_name_map_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (groups->asynchronous())
|
|
|
|
|
removeClockGroups(groups);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeClockGroups(ClockGroups *groups)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
clk_groups_name_map_.erase(groups->name());
|
2018-09-28 17:54:21 +02:00
|
|
|
delete groups;
|
|
|
|
|
// Can't delete excluded clock pairs for deleted clock groups because
|
|
|
|
|
// some other clock groups may exclude the same clock pair.
|
|
|
|
|
clearClkGroupExclusions();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockGroupsDeleteClkRefs(Clock *clk)
|
|
|
|
|
{
|
2024-06-27 22:57:58 +02:00
|
|
|
for (const auto [name, groups] : clk_groups_name_map_)
|
2018-09-28 17:54:21 +02:00
|
|
|
groups->removeClock(clk);
|
|
|
|
|
clearClkGroupExclusions();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockSense(PinSet *pins,
|
2019-06-22 20:17:13 +02:00
|
|
|
ClockSet *clks,
|
|
|
|
|
ClockSense sense)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-06-22 20:17:13 +02:00
|
|
|
if (clks && clks->empty()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
delete clks;
|
2019-03-13 01:25:53 +01:00
|
|
|
clks = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *pins) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (clks) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Clock *clk : *clks)
|
2018-09-28 17:54:21 +02:00
|
|
|
setClockSense(pin, clk, sense);
|
|
|
|
|
}
|
|
|
|
|
else
|
2019-03-13 01:25:53 +01:00
|
|
|
setClockSense(pin, nullptr, sense);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
delete pins;
|
|
|
|
|
delete clks;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockSense(const Pin *pin,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Clock *clk,
|
|
|
|
|
ClockSense sense)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
PinClockPair probe(pin, clk);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (clk_sense_map_.hasKey(probe))
|
|
|
|
|
clk_sense_map_[probe] = sense;
|
2018-09-28 17:54:21 +02:00
|
|
|
else {
|
2019-03-13 01:25:53 +01:00
|
|
|
PinClockPair pin_clk(pin, clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_sense_map_[pin_clk] = sense;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::clkStopPropagation(const Pin *pin,
|
|
|
|
|
const Clock *clk) const
|
|
|
|
|
{
|
|
|
|
|
PinClockPair pin_clk(pin, clk);
|
|
|
|
|
ClockSense sense;
|
|
|
|
|
bool exists;
|
2019-03-13 01:25:53 +01:00
|
|
|
clk_sense_map_.findKey(pin_clk, sense, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (!exists) {
|
2019-03-13 01:25:53 +01:00
|
|
|
PinClockPair pin_clk1(pin, nullptr);
|
|
|
|
|
clk_sense_map_.findKey(pin_clk1, sense, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return exists
|
2019-03-13 01:25:53 +01:00
|
|
|
&& sense == ClockSense::stop;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::clkStopSense(const Pin *to_pin,
|
|
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *from_rf,
|
|
|
|
|
const RiseFall *to_rf) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
PinClockPair pin_clk(to_pin, clk);
|
|
|
|
|
ClockSense sense;
|
|
|
|
|
bool exists;
|
2019-03-13 01:25:53 +01:00
|
|
|
clk_sense_map_.findKey(pin_clk, sense, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (!exists) {
|
2019-03-13 01:25:53 +01:00
|
|
|
PinClockPair pin(to_pin, nullptr);
|
|
|
|
|
clk_sense_map_.findKey(pin, sense, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return exists
|
2019-03-13 01:25:53 +01:00
|
|
|
&& (sense == ClockSense::stop
|
|
|
|
|
|| (sense == ClockSense::positive
|
2019-11-11 23:30:19 +01:00
|
|
|
&& from_rf != to_rf)
|
2019-03-13 01:25:53 +01:00
|
|
|
|| (sense == ClockSense::negative
|
2019-11-11 23:30:19 +01:00
|
|
|
&& from_rf == to_rf));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::clkStopPropagation(const Clock *clk,
|
|
|
|
|
const Pin *from_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *from_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Pin *to_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *to_rf) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
return clkStopPropagation(from_pin, clk)
|
2019-11-11 23:30:19 +01:00
|
|
|
|| clkStopSense(to_pin, clk, from_rf, to_rf);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
PinClockPairLess::PinClockPairLess(const Network *network) :
|
|
|
|
|
network_(network)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2019-03-13 01:25:53 +01:00
|
|
|
PinClockPairLess::operator()(const PinClockPair &pin_clk1,
|
|
|
|
|
const PinClockPair &pin_clk2) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
const Pin *pin1 = pin_clk1.first;
|
|
|
|
|
const Pin *pin2 = pin_clk2.first;
|
|
|
|
|
const Clock *clk1 = pin_clk1.second;
|
|
|
|
|
const Clock *clk2 = pin_clk2.second;
|
2018-09-28 17:54:21 +02:00
|
|
|
return pin1 < pin2
|
|
|
|
|
|| (pin1 == pin2
|
2019-03-13 01:25:53 +01:00
|
|
|
&& ((clk1 == nullptr && clk2)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| (clk1 && clk2
|
|
|
|
|
&& clk1->index() < clk2->index())));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2019-11-11 23:30:19 +01:00
|
|
|
Sdc::setClockGatingCheck(const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float margin)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
if (clk_gating_check_ == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_gating_check_ = new ClockGatingCheck;
|
2019-11-11 23:30:19 +01:00
|
|
|
clk_gating_check_->margins()->setValue(rf, setup_hold, margin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockGatingCheck(Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float margin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = clk_gating_check_map_.findKey(clk);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (check == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
check = new ClockGatingCheck();
|
|
|
|
|
clk_gating_check_map_[clk] = check;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->setValue(rf, setup_hold, margin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockGatingCheck(Instance *inst,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float margin,
|
|
|
|
|
LogicValue active_value)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = inst_clk_gating_check_map_.findKey(inst);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (check == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
check = new ClockGatingCheck();
|
|
|
|
|
inst_clk_gating_check_map_[inst] = check;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->setValue(rf, setup_hold, margin);
|
2018-09-28 17:54:21 +02:00
|
|
|
check->setActiveValue(active_value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setClockGatingCheck(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
float margin,
|
|
|
|
|
LogicValue active_value)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = pin_clk_gating_check_map_.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (check == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
check = new ClockGatingCheck();
|
|
|
|
|
pin_clk_gating_check_map_[pin] = check;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->setValue(rf, setup_hold, margin);
|
2018-09-28 17:54:21 +02:00
|
|
|
check->setActiveValue(active_value);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockGatingMarginEnablePin(const Pin *enable_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *enable_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
bool &exists, float &margin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = pin_clk_gating_check_map_.findKey(enable_pin);
|
|
|
|
|
if (check)
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->value(enable_rf, setup_hold, margin, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockGatingMarginInstance(Instance *inst,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *enable_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
bool &exists,
|
|
|
|
|
float &margin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = inst_clk_gating_check_map_.findKey(inst);
|
|
|
|
|
if (check)
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->value(enable_rf, setup_hold, margin, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockGatingMarginClkPin(const Pin *clk_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *enable_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
bool &exists,
|
|
|
|
|
float &margin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = pin_clk_gating_check_map_.findKey(clk_pin);
|
|
|
|
|
if (check)
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->value(enable_rf, setup_hold, margin, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clockGatingMarginClk(const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *enable_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
bool &exists,
|
|
|
|
|
float &margin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check = clk_gating_check_map_.findKey(clk);
|
|
|
|
|
if (check)
|
2019-11-11 23:30:19 +01:00
|
|
|
check->margins()->value(enable_rf, setup_hold, margin, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2019-11-11 23:30:19 +01:00
|
|
|
Sdc::clockGatingMargin(const RiseFall *enable_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const SetupHold *setup_hold,
|
|
|
|
|
bool &exists,
|
|
|
|
|
float &margin)
|
|
|
|
|
{
|
|
|
|
|
if (clk_gating_check_)
|
2019-11-11 23:30:19 +01:00
|
|
|
clk_gating_check_->margins()->value(enable_rf, setup_hold, margin, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
LogicValue
|
|
|
|
|
Sdc::clockGatingActiveValue(const Pin *clk_pin,
|
|
|
|
|
const Pin *enable_pin)
|
|
|
|
|
{
|
|
|
|
|
ClockGatingCheck *check;
|
|
|
|
|
check = pin_clk_gating_check_map_.findKey(enable_pin);
|
|
|
|
|
if (check)
|
|
|
|
|
return check->activeValue();
|
|
|
|
|
Instance *inst = network_->instance(enable_pin);
|
|
|
|
|
check = inst_clk_gating_check_map_.findKey(inst);
|
|
|
|
|
if (check)
|
|
|
|
|
return check->activeValue();
|
|
|
|
|
check = pin_clk_gating_check_map_.findKey(clk_pin);
|
|
|
|
|
if (check)
|
|
|
|
|
return check->activeValue();
|
2019-03-13 01:25:53 +01:00
|
|
|
return LogicValue::unknown;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
// Determine cycle accounting "on demand".
|
|
|
|
|
CycleAccting *
|
|
|
|
|
Sdc::cycleAccting(const ClockEdge *src,
|
|
|
|
|
const ClockEdge *tgt)
|
|
|
|
|
{
|
2024-06-03 23:09:30 +02:00
|
|
|
LockGuard lock(cycle_acctings_lock_);
|
2021-12-20 18:50:44 +01:00
|
|
|
return cycle_acctings_.cycleAccting(src, tgt);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::reportClkToClkMaxCycleWarnings()
|
|
|
|
|
{
|
2021-12-20 18:50:44 +01:00
|
|
|
cycle_acctings_.reportClkToClkMaxCycleWarnings(report_);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clearCycleAcctings()
|
|
|
|
|
{
|
2021-12-20 18:50:44 +01:00
|
|
|
cycle_acctings_.clear();
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setDataCheck(Pin *from,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *from_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Pin *to,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Clock *clk,
|
2019-06-27 00:58:23 +02:00
|
|
|
const SetupHoldAll *setup_hold,
|
2018-09-28 17:54:21 +02:00
|
|
|
float margin)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
DataCheck *check = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
DataCheckSet *checks = data_checks_from_map_.findKey(from);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (checks == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
checks = new DataCheckSet(DataCheckLess(network_));
|
|
|
|
|
data_checks_from_map_[from] = checks;
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
DataCheck probe(from, to, clk);
|
|
|
|
|
check = checks->findKey(&probe);
|
|
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
if (check == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
check = new DataCheck(from, to, clk);
|
2019-11-11 23:30:19 +01:00
|
|
|
check->setMargin(from_rf, to_rf, setup_hold, margin);
|
2018-09-28 17:54:21 +02:00
|
|
|
checks->insert(check);
|
|
|
|
|
|
|
|
|
|
checks = data_checks_to_map_.findKey(to);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (checks == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
checks = new DataCheckSet(DataCheckLess(network_));
|
|
|
|
|
data_checks_to_map_[to] = checks;
|
|
|
|
|
}
|
|
|
|
|
checks->insert(check);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDataCheck(Pin *from,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *from_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Pin *to,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
Clock *clk,
|
2019-06-27 00:58:23 +02:00
|
|
|
const SetupHoldAll *setup_hold)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
DataCheck probe(from, to, clk);
|
|
|
|
|
DataCheckSet *checks = data_checks_from_map_.findKey(from);
|
|
|
|
|
if (checks) {
|
|
|
|
|
DataCheck *check = checks->findKey(&probe);
|
|
|
|
|
if (check) {
|
2019-11-11 23:30:19 +01:00
|
|
|
check->removeMargin(from_rf, to_rf, setup_hold);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (check->empty()) {
|
2019-04-11 05:36:48 +02:00
|
|
|
checks->erase(check);
|
2018-09-28 17:54:21 +02:00
|
|
|
checks = data_checks_to_map_.findKey(to);
|
|
|
|
|
if (checks)
|
2019-04-11 05:36:48 +02:00
|
|
|
checks->erase(check);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete check;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
DataCheckSet *
|
|
|
|
|
Sdc::dataChecksFrom(const Pin *from) const
|
|
|
|
|
{
|
|
|
|
|
return data_checks_from_map_.findKey(from);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
DataCheckSet *
|
|
|
|
|
Sdc::dataChecksTo(const Pin *to) const
|
|
|
|
|
{
|
|
|
|
|
return data_checks_to_map_.findKey(to);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setLatchBorrowLimit(const Pin *pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
float limit)
|
|
|
|
|
{
|
|
|
|
|
pin_latch_borrow_limit_map_[pin] = limit;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setLatchBorrowLimit(const Instance *inst,
|
2018-09-28 17:54:21 +02:00
|
|
|
float limit)
|
|
|
|
|
{
|
|
|
|
|
inst_latch_borrow_limit_map_[inst] = limit;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setLatchBorrowLimit(const Clock *clk,
|
|
|
|
|
float limit)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
clk_latch_borrow_limit_map_[clk] = limit;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteLatchBorrowLimitsReferencing(Clock *clk)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
clk_latch_borrow_limit_map_.erase(clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::latchBorrowLimit(const Pin *data_pin,
|
|
|
|
|
const Pin *enable_pin,
|
|
|
|
|
const Clock *clk,
|
2018-09-28 17:54:21 +02:00
|
|
|
// Return values.
|
|
|
|
|
float &limit,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
pin_latch_borrow_limit_map_.findKey(data_pin, limit, exists);
|
|
|
|
|
if (!exists) {
|
|
|
|
|
pin_latch_borrow_limit_map_.findKey(enable_pin, limit, exists);
|
|
|
|
|
if (!exists) {
|
|
|
|
|
Instance *inst = network_->instance(data_pin);
|
|
|
|
|
inst_latch_borrow_limit_map_.findKey(inst, limit, exists);
|
|
|
|
|
if (!exists)
|
|
|
|
|
clk_latch_borrow_limit_map_.findKey(clk, limit, exists);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2019-11-11 23:30:19 +01:00
|
|
|
Sdc::setMinPulseWidth(const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
float min_width)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
for (auto rf1 : rf->range())
|
|
|
|
|
min_pulse_width_.setValue(rf1, min_width);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setMinPulseWidth(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
float min_width)
|
|
|
|
|
{
|
|
|
|
|
RiseFallValues *widths = pin_min_pulse_width_map_.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (widths == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
widths = new RiseFallValues;
|
|
|
|
|
pin_min_pulse_width_map_[pin] = widths;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
for (auto rf1 : rf->range())
|
|
|
|
|
widths->setValue(rf1, min_width);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setMinPulseWidth(const Instance *inst,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
float min_width)
|
|
|
|
|
{
|
|
|
|
|
RiseFallValues *widths = inst_min_pulse_width_map_.findKey(inst);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (widths == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
widths = new RiseFallValues;
|
|
|
|
|
inst_min_pulse_width_map_[inst] = widths;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
for (auto rf1 : rf->range())
|
|
|
|
|
widths->setValue(rf1, min_width);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setMinPulseWidth(const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
float min_width)
|
|
|
|
|
{
|
|
|
|
|
RiseFallValues *widths = clk_min_pulse_width_map_.findKey(clk);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (widths == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
widths = new RiseFallValues;
|
|
|
|
|
clk_min_pulse_width_map_[clk] = widths;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
for (auto rf1 : rf->range())
|
|
|
|
|
widths->setValue(rf1, min_width);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::minPulseWidth(const Pin *pin,
|
|
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *hi_low,
|
2018-09-28 17:54:21 +02:00
|
|
|
float &min_width,
|
|
|
|
|
bool &exists) const
|
|
|
|
|
{
|
|
|
|
|
RiseFallValues *widths = pin_min_pulse_width_map_.findKey(pin);
|
|
|
|
|
if (widths)
|
|
|
|
|
widths->value(hi_low, min_width, exists);
|
|
|
|
|
else {
|
|
|
|
|
if (pin) {
|
|
|
|
|
const Instance *inst = network_->instance(pin);
|
|
|
|
|
widths = inst_min_pulse_width_map_.findKey(inst);
|
|
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
if (widths == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
widths = clk_min_pulse_width_map_.findKey(clk);
|
|
|
|
|
if (widths)
|
|
|
|
|
widths->value(hi_low, min_width, exists);
|
|
|
|
|
else
|
|
|
|
|
min_pulse_width_.value(hi_low, min_width, exists);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteMinPulseWidthReferencing(Clock *clk)
|
|
|
|
|
{
|
|
|
|
|
RiseFallValues *widths = clk_min_pulse_width_map_.findKey(clk);
|
|
|
|
|
if (widths) {
|
|
|
|
|
delete widths;
|
2019-04-11 05:36:48 +02:00
|
|
|
clk_min_pulse_width_map_.erase(clk);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
InputDrive *
|
|
|
|
|
Sdc::findInputDrive(Port *port)
|
|
|
|
|
{
|
|
|
|
|
return input_drive_map_.findKey(port);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setInputDelay(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *clk_rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *ref_pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
bool source_latency_included,
|
|
|
|
|
bool network_latency_included,
|
|
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
bool add,
|
|
|
|
|
float delay)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ClockEdge *clk_edge = clk ? clk->edge(clk_rf) : nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
InputDelay *input_delay = findInputDelay(pin, clk_edge);
|
2019-11-11 01:10:26 +01:00
|
|
|
if (input_delay == nullptr)
|
2023-01-19 19:23:45 +01:00
|
|
|
input_delay = makeInputDelay(pin, clk_edge);
|
2019-11-11 01:10:26 +01:00
|
|
|
if (add) {
|
|
|
|
|
RiseFallMinMax *delays = input_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->mergeValue(rf, min_max, delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
else {
|
|
|
|
|
deleteInputDelays(pin, input_delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
RiseFallMinMax *delays = input_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->setValue(rf, min_max, delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
if (ref_pin) {
|
|
|
|
|
InputDelaySet *ref_inputs = input_delay_ref_pin_map_.findKey(ref_pin);
|
|
|
|
|
if (ref_inputs == nullptr) {
|
|
|
|
|
ref_inputs = new InputDelaySet;
|
|
|
|
|
input_delay_ref_pin_map_[ref_pin] = ref_inputs;
|
|
|
|
|
}
|
|
|
|
|
ref_inputs->insert(input_delay);
|
|
|
|
|
}
|
|
|
|
|
input_delay->setRefPin(ref_pin);
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
input_delay->setSourceLatencyIncluded(source_latency_included);
|
|
|
|
|
input_delay->setNetworkLatencyIncluded(network_latency_included);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
InputDelay *
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeInputDelay(const Pin *pin,
|
|
|
|
|
const ClockEdge *clk_edge)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
InputDelay *input_delay = new InputDelay(pin, clk_edge, input_delay_index_++,
|
2019-11-11 01:10:26 +01:00
|
|
|
network_);
|
|
|
|
|
input_delays_.insert(input_delay);
|
|
|
|
|
InputDelaySet *inputs = input_delay_pin_map_.findKey(pin);
|
|
|
|
|
if (inputs == nullptr) {
|
|
|
|
|
inputs = new InputDelaySet;
|
|
|
|
|
input_delay_pin_map_[pin] = inputs;
|
|
|
|
|
}
|
|
|
|
|
inputs->insert(input_delay);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *lpin : input_delay->leafPins()) {
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *leaf_inputs = input_delay_leaf_pin_map_[lpin];
|
|
|
|
|
if (leaf_inputs == nullptr) {
|
|
|
|
|
leaf_inputs = new InputDelaySet;
|
|
|
|
|
input_delay_leaf_pin_map_[lpin] = leaf_inputs;
|
|
|
|
|
}
|
|
|
|
|
leaf_inputs->insert(input_delay);
|
|
|
|
|
|
|
|
|
|
if (!network_->isTopLevelPort(lpin)) {
|
|
|
|
|
InputDelaySet *internal_inputs = input_delay_internal_pin_map_[lpin];
|
|
|
|
|
if (internal_inputs == nullptr) {
|
|
|
|
|
internal_inputs = new InputDelaySet;
|
|
|
|
|
input_delay_internal_pin_map_[pin] = internal_inputs;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-11-11 01:10:26 +01:00
|
|
|
internal_inputs->insert(input_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return input_delay;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
InputDelay *
|
|
|
|
|
Sdc::findInputDelay(const Pin *pin,
|
2023-01-19 19:23:45 +01:00
|
|
|
const ClockEdge *clk_edge)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *inputs = input_delay_pin_map_.findKey(pin);
|
|
|
|
|
if (inputs) {
|
|
|
|
|
for (InputDelay *input_delay : *inputs) {
|
2023-01-19 19:23:45 +01:00
|
|
|
if (input_delay->clkEdge() == clk_edge)
|
2019-11-11 01:10:26 +01:00
|
|
|
return input_delay;
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::removeInputDelay(const Pin *pin,
|
2022-06-11 01:26:14 +02:00
|
|
|
const RiseFallBoth *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Clock *clk,
|
|
|
|
|
const RiseFall *clk_rf,
|
|
|
|
|
const MinMaxAll *min_max)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ClockEdge *clk_edge = clk ? clk->edge(clk_rf) : nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
InputDelay *input_delay = findInputDelay(pin, clk_edge);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (input_delay) {
|
|
|
|
|
RiseFallMinMax *delays = input_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->removeValue(rf, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (delays->empty())
|
|
|
|
|
deleteInputDelay(input_delay);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::deleteInputDelays(const Pin *pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
InputDelay *except)
|
|
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *input_delays = input_delay_pin_map_[pin];
|
|
|
|
|
InputDelaySet::Iterator iter(input_delays);
|
|
|
|
|
while (iter.hasNext()) {
|
|
|
|
|
InputDelay *input_delay = iter.next();
|
|
|
|
|
if (input_delay != except)
|
|
|
|
|
deleteInputDelay(input_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
InputDelaySet *
|
|
|
|
|
Sdc::refPinInputDelays(const Pin *ref_pin) const
|
|
|
|
|
{
|
|
|
|
|
return input_delay_ref_pin_map_.findKey(ref_pin);
|
|
|
|
|
}
|
|
|
|
|
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *
|
|
|
|
|
Sdc::inputDelaysLeafPin(const Pin *leaf_pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
return input_delay_leaf_pin_map_.findKey(leaf_pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2019-10-25 17:51:59 +02:00
|
|
|
Sdc::hasInputDelay(const Pin *leaf_pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *input_delays = input_delay_leaf_pin_map_.findKey(leaf_pin);
|
|
|
|
|
return input_delays && !input_delays->empty();
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isInputDelayInternal(const Pin *pin) const
|
|
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
return input_delay_internal_pin_map_.hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::deleteInputDelaysReferencing(const Clock *clk)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet::Iterator iter(input_delays_);
|
|
|
|
|
while (iter.hasNext()) {
|
|
|
|
|
InputDelay *input_delay = iter.next();
|
2018-09-28 17:54:21 +02:00
|
|
|
if (input_delay->clock() == clk)
|
2019-10-25 17:51:59 +02:00
|
|
|
deleteInputDelay(input_delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteInputDelay(InputDelay *input_delay)
|
|
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
input_delays_.erase(input_delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *pin = input_delay->pin();
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *inputs = input_delay_pin_map_[pin];
|
|
|
|
|
inputs->erase(input_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *lpin : input_delay->leafPins()) {
|
2019-11-11 01:10:26 +01:00
|
|
|
InputDelaySet *inputs = input_delay_leaf_pin_map_[lpin];
|
|
|
|
|
inputs->erase(input_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
delete input_delay;
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-04 15:53:15 +01:00
|
|
|
void
|
2024-04-23 21:57:06 +02:00
|
|
|
Sdc::swapPortDelays(Sdc *sdc1,
|
|
|
|
|
Sdc *sdc2)
|
2023-01-04 15:53:15 +01:00
|
|
|
{
|
2024-04-23 21:57:06 +02:00
|
|
|
swap(sdc1->input_delays_, sdc2->input_delays_);
|
|
|
|
|
swap(sdc1->input_delay_pin_map_, sdc2->input_delay_pin_map_);
|
|
|
|
|
swap(sdc1->input_delay_ref_pin_map_, sdc2->input_delay_ref_pin_map_);
|
|
|
|
|
swap(sdc1->input_delay_leaf_pin_map_, sdc2->input_delay_leaf_pin_map_);
|
|
|
|
|
swap(sdc1->input_delay_internal_pin_map_, sdc2->input_delay_internal_pin_map_);
|
|
|
|
|
swap(sdc1->input_delay_index_, sdc2->input_delay_index_);
|
2023-01-19 19:23:45 +01:00
|
|
|
|
2024-04-23 21:57:06 +02:00
|
|
|
swap(sdc1->output_delays_, sdc2->output_delays_);
|
|
|
|
|
swap(sdc1->output_delay_pin_map_, sdc2->output_delay_pin_map_);
|
|
|
|
|
swap(sdc1->output_delay_ref_pin_map_, sdc2->output_delay_ref_pin_map_);
|
|
|
|
|
swap(sdc1->output_delay_leaf_pin_map_, sdc2->output_delay_leaf_pin_map_);
|
2023-01-04 15:53:15 +01:00
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setOutputDelay(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *clk_rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *ref_pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
bool source_latency_included,
|
|
|
|
|
bool network_latency_included,
|
|
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
bool add,
|
|
|
|
|
float delay)
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ClockEdge *clk_edge = clk ? clk->edge(clk_rf) : nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
OutputDelay *output_delay = findOutputDelay(pin, clk_edge);
|
2019-11-11 01:10:26 +01:00
|
|
|
if (output_delay == nullptr)
|
2023-01-19 19:23:45 +01:00
|
|
|
output_delay = makeOutputDelay(pin, clk_edge);
|
2019-11-11 01:10:26 +01:00
|
|
|
if (add) {
|
|
|
|
|
RiseFallMinMax *delays = output_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->mergeValue(rf, min_max, delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
else {
|
|
|
|
|
deleteOutputDelays(pin, output_delay);
|
2019-11-11 01:10:26 +01:00
|
|
|
RiseFallMinMax *delays = output_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->setValue(rf, min_max, delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
if (ref_pin) {
|
|
|
|
|
OutputDelaySet *ref_outputs = output_delay_ref_pin_map_.findKey(ref_pin);
|
|
|
|
|
if (ref_outputs == nullptr) {
|
|
|
|
|
ref_outputs = new OutputDelaySet;
|
|
|
|
|
output_delay_ref_pin_map_[ref_pin] = ref_outputs;
|
|
|
|
|
}
|
|
|
|
|
ref_outputs->insert(output_delay);
|
|
|
|
|
}
|
|
|
|
|
output_delay->setRefPin(ref_pin);
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
output_delay->setSourceLatencyIncluded(source_latency_included);
|
|
|
|
|
output_delay->setNetworkLatencyIncluded(network_latency_included);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
OutputDelay *
|
2019-11-11 01:10:26 +01:00
|
|
|
Sdc::findOutputDelay(const Pin *pin,
|
2023-01-19 19:23:45 +01:00
|
|
|
const ClockEdge *clk_edge)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet *outputs = output_delay_pin_map_.findKey(pin);
|
|
|
|
|
if (outputs) {
|
|
|
|
|
for (OutputDelay *output_delay : *outputs) {
|
2023-01-19 19:23:45 +01:00
|
|
|
if (output_delay->clkEdge() == clk_edge)
|
2019-11-11 01:10:26 +01:00
|
|
|
return output_delay;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
2019-11-11 01:10:26 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
OutputDelay *
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeOutputDelay(const Pin *pin,
|
|
|
|
|
const ClockEdge *clk_edge)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
OutputDelay *output_delay = new OutputDelay(pin, clk_edge, network_);
|
2019-11-11 01:10:26 +01:00
|
|
|
output_delays_.insert(output_delay);
|
|
|
|
|
OutputDelaySet *outputs = output_delay_pin_map_.findKey(pin);
|
|
|
|
|
if (outputs == nullptr) {
|
|
|
|
|
outputs = new OutputDelaySet;
|
|
|
|
|
output_delay_pin_map_[pin] = outputs;
|
|
|
|
|
}
|
|
|
|
|
outputs->insert(output_delay);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *lpin : output_delay->leafPins()) {
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet *leaf_outputs = output_delay_leaf_pin_map_[lpin];
|
|
|
|
|
if (leaf_outputs == nullptr) {
|
|
|
|
|
leaf_outputs = new OutputDelaySet;
|
|
|
|
|
output_delay_leaf_pin_map_[lpin] = leaf_outputs;
|
|
|
|
|
}
|
|
|
|
|
leaf_outputs->insert(output_delay);
|
|
|
|
|
}
|
|
|
|
|
return output_delay;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::removeOutputDelay(const Pin *pin,
|
|
|
|
|
const RiseFallBoth *rf,
|
|
|
|
|
const Clock *clk,
|
|
|
|
|
const RiseFall *clk_rf,
|
|
|
|
|
const MinMaxAll *min_max)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
ClockEdge *clk_edge = clk ? clk->edge(clk_rf) : nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
OutputDelay *output_delay = findOutputDelay(pin, clk_edge);
|
2019-11-11 01:10:26 +01:00
|
|
|
if (output_delay) {
|
|
|
|
|
RiseFallMinMax *delays = output_delay->delays();
|
2019-11-11 23:30:19 +01:00
|
|
|
delays->removeValue(rf, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::deleteOutputDelays(const Pin *pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
OutputDelay *except)
|
|
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet *output_delays = output_delay_pin_map_[pin];
|
|
|
|
|
OutputDelaySet::Iterator iter(output_delays);
|
|
|
|
|
while (iter.hasNext()) {
|
|
|
|
|
OutputDelay *output_delay = iter.next();
|
|
|
|
|
if (output_delay != except)
|
|
|
|
|
deleteOutputDelay(output_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet *
|
|
|
|
|
Sdc::outputDelaysLeafPin(const Pin *leaf_pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
return output_delay_leaf_pin_map_.findKey(leaf_pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2019-10-25 17:51:59 +02:00
|
|
|
Sdc::hasOutputDelay(const Pin *leaf_pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
return output_delay_leaf_pin_map_.hasKey(leaf_pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::deleteOutputDelaysReferencing(const Clock *clk)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet::Iterator iter(output_delays_);
|
|
|
|
|
while (iter.hasNext()) {
|
|
|
|
|
OutputDelay *output_delay = iter.next();
|
2018-09-28 17:54:21 +02:00
|
|
|
if (output_delay->clock() == clk)
|
2019-11-11 01:10:26 +01:00
|
|
|
deleteOutputDelay(output_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteOutputDelay(OutputDelay *output_delay)
|
|
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
output_delays_.erase(output_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *pin = output_delay->pin();
|
|
|
|
|
OutputDelaySet *outputs = output_delay_pin_map_[pin];
|
2019-11-11 01:10:26 +01:00
|
|
|
outputs->erase(output_delay);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *lpin : output_delay->leafPins()) {
|
2019-11-11 01:10:26 +01:00
|
|
|
OutputDelaySet *outputs = output_delay_leaf_pin_map_[lpin];
|
|
|
|
|
outputs->erase(output_delay);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
delete output_delay;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setPortExtPinCap(const Port *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Corner *corner,
|
2018-11-26 18:15:52 +01:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
float cap)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = ensurePortExtPinCap(port, corner);
|
2019-11-11 23:30:19 +01:00
|
|
|
port_cap->setPinCap(cap, rf, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setPortExtWireCap(const Port *port,
|
2018-09-28 17:54:21 +02:00
|
|
|
bool subtract_pin_cap,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float cap)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = ensurePortExtPinCap(port, corner);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (subtract_pin_cap) {
|
|
|
|
|
Pin *pin = network_->findPin(network_->name(port));
|
2024-02-08 21:54:52 +01:00
|
|
|
cap -= connectedPinCap(pin, rf, corner, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (cap < 0.0)
|
|
|
|
|
cap = 0.0;
|
|
|
|
|
}
|
2019-11-11 23:30:19 +01:00
|
|
|
port_cap->setWireCap(cap, rf, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
PortExtCap *
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::portExtCap(const Port *port,
|
|
|
|
|
const Corner *corner) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
return port_ext_cap_maps_[corner->index()].findKey(port);
|
2018-11-26 18:15:52 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::hasPortExtCap(const Port *port) const
|
2018-11-26 18:15:52 +01:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (int corner_index = 0; corner_index < corners_->count(); corner_index++) {
|
|
|
|
|
if (port_ext_cap_maps_[corner_index].hasKey(port))
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
return false;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::portExtCap(const Port *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
bool &has_pin_cap,
|
|
|
|
|
float &wire_cap,
|
|
|
|
|
bool &has_wire_cap,
|
|
|
|
|
int &fanout,
|
|
|
|
|
bool &has_fanout) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = port_ext_cap_maps_[corner->index()].findKey(port);
|
|
|
|
|
if (port_cap) {
|
|
|
|
|
port_cap->pinCap(rf, min_max, pin_cap, has_pin_cap);
|
|
|
|
|
port_cap->wireCap(rf, min_max, wire_cap, has_wire_cap);
|
|
|
|
|
port_cap->fanout(min_max, fanout, has_fanout);
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
pin_cap = 0.0F;
|
|
|
|
|
has_pin_cap = false;
|
|
|
|
|
wire_cap = 0.0F;
|
|
|
|
|
has_wire_cap = false;
|
|
|
|
|
fanout = 0.0F;
|
|
|
|
|
has_fanout = false;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::portExtCap(const Port *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max) const
|
|
|
|
|
{
|
|
|
|
|
float pin_cap, wire_cap;
|
|
|
|
|
int fanout;
|
|
|
|
|
bool has_pin_cap, has_wire_cap, has_fanout;
|
2023-01-19 19:23:45 +01:00
|
|
|
portExtCap(port, rf, corner, min_max,
|
2018-09-28 17:54:21 +02:00
|
|
|
pin_cap, has_pin_cap,
|
|
|
|
|
wire_cap, has_wire_cap,
|
|
|
|
|
fanout, has_fanout);
|
|
|
|
|
float cap = 0.0;
|
|
|
|
|
if (has_pin_cap)
|
|
|
|
|
cap += pin_cap;
|
|
|
|
|
if (has_wire_cap)
|
|
|
|
|
cap += wire_cap;
|
|
|
|
|
return cap;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::drvrPinHasWireCap(const Pin *pin,
|
|
|
|
|
const Corner *corner)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
return drvr_pin_wire_cap_maps_[corner->index()].hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::drvrPinWireCap(const Pin *pin,
|
2018-11-26 18:15:52 +01:00
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &cap,
|
2024-11-14 02:44:46 +01:00
|
|
|
bool &exists,
|
|
|
|
|
bool &subtract_pin_cap) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2024-11-14 02:44:46 +01:00
|
|
|
NetWireCaps *net_caps = drvr_pin_wire_cap_maps_[corner->index()].findKey(pin);
|
|
|
|
|
if (net_caps) {
|
|
|
|
|
net_caps->value(min_max, cap, exists);
|
|
|
|
|
subtract_pin_cap = net_caps->subtractPinCap(min_max);
|
|
|
|
|
}
|
2023-10-11 22:28:53 +02:00
|
|
|
else {
|
|
|
|
|
cap = 0.0;
|
|
|
|
|
exists = false;
|
2024-11-14 02:44:46 +01:00
|
|
|
subtract_pin_cap = false;
|
2023-10-11 22:28:53 +02:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setNetWireCap(const Net *net,
|
2018-09-28 17:54:21 +02:00
|
|
|
bool subtract_pin_cap,
|
|
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
2024-11-14 02:44:46 +01:00
|
|
|
float wire_cap)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2024-11-14 02:44:46 +01:00
|
|
|
NetWireCaps &net_caps = net_wire_cap_maps_[corner->index()][net];
|
|
|
|
|
net_caps.setValue(min_max, wire_cap);
|
|
|
|
|
net_caps.setSubtractPinCap(subtract_pin_cap, min_max);
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
|
2024-04-04 22:29:50 +02:00
|
|
|
for (const Pin *pin : *network_->drivers(net))
|
2024-11-14 02:44:46 +01:00
|
|
|
drvr_pin_wire_cap_maps_[corner->index()][pin] = &net_caps;
|
2018-11-26 18:15:52 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::hasNetWireCap(const Net *net) const
|
2018-11-26 18:15:52 +01:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
for (int i = 0; i < corners_->count(); i++) {
|
|
|
|
|
if (net_wire_cap_maps_[i].hasKey(net))
|
|
|
|
|
return true;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2018-11-26 18:15:52 +01:00
|
|
|
return false;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::connectedCap(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
float &wire_cap,
|
|
|
|
|
float &fanout,
|
2023-03-08 01:03:26 +01:00
|
|
|
bool &has_net_load) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2024-02-08 21:54:52 +01:00
|
|
|
netCaps(pin, rf, corner, min_max, pin_cap, wire_cap, fanout, has_net_load);
|
2018-09-28 17:54:21 +02:00
|
|
|
float net_wire_cap;
|
2024-11-14 02:44:46 +01:00
|
|
|
bool subtract_pin_cap;
|
|
|
|
|
drvrPinWireCap(pin, corner, min_max, net_wire_cap, has_net_load, subtract_pin_cap);
|
|
|
|
|
if (subtract_pin_cap)
|
|
|
|
|
pin_cap = 0.0;
|
2023-10-12 00:08:40 +02:00
|
|
|
if (has_net_load)
|
2018-09-28 17:54:21 +02:00
|
|
|
wire_cap += net_wire_cap;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::connectedPinCap(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
float pin_cap, wire_cap, fanout;
|
2023-03-08 01:03:26 +01:00
|
|
|
bool has_net_load;
|
2024-02-08 21:54:52 +01:00
|
|
|
connectedCap(pin, rf, corner, min_max,
|
2023-03-08 01:03:26 +01:00
|
|
|
pin_cap, wire_cap, fanout, has_net_load);
|
2018-09-28 17:54:21 +02:00
|
|
|
return pin_cap;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
class FindNetCaps : public PinVisitor
|
|
|
|
|
{
|
|
|
|
|
public:
|
2019-11-11 23:30:19 +01:00
|
|
|
FindNetCaps(const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
float &wire_cap,
|
|
|
|
|
float &fanout,
|
2023-03-08 01:03:26 +01:00
|
|
|
bool &has_net_load,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Sdc *sdc);
|
2023-01-19 19:23:45 +01:00
|
|
|
virtual void operator()(const Pin *pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
protected:
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf_;
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner_;
|
|
|
|
|
const MinMax *min_max_;
|
|
|
|
|
float &pin_cap_;
|
|
|
|
|
float &wire_cap_;
|
|
|
|
|
float &fanout_;
|
2023-03-08 01:03:26 +01:00
|
|
|
bool &has_net_load_;
|
2018-09-28 17:54:21 +02:00
|
|
|
const Sdc *sdc_;
|
|
|
|
|
};
|
|
|
|
|
|
2019-11-11 23:30:19 +01:00
|
|
|
FindNetCaps::FindNetCaps(const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
float &wire_cap,
|
|
|
|
|
float &fanout,
|
2023-03-08 01:03:26 +01:00
|
|
|
bool &has_net_load,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Sdc *sdc) :
|
|
|
|
|
PinVisitor(),
|
2019-11-11 23:30:19 +01:00
|
|
|
rf_(rf),
|
2018-09-28 17:54:21 +02:00
|
|
|
corner_(corner),
|
|
|
|
|
min_max_(min_max),
|
|
|
|
|
pin_cap_(pin_cap),
|
|
|
|
|
wire_cap_(wire_cap),
|
|
|
|
|
fanout_(fanout),
|
2023-03-08 01:03:26 +01:00
|
|
|
has_net_load_(has_net_load),
|
2018-09-28 17:54:21 +02:00
|
|
|
sdc_(sdc)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
FindNetCaps::operator()(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2024-02-08 21:54:52 +01:00
|
|
|
sdc_->pinCaps(pin, rf_, corner_, min_max_,
|
2023-03-08 01:03:26 +01:00
|
|
|
pin_cap_, wire_cap_, fanout_);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Capacitances for all pins connected to drvr_pin's net.
|
|
|
|
|
void
|
|
|
|
|
Sdc::netCaps(const Pin *drvr_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
float &wire_cap,
|
|
|
|
|
float &fanout,
|
2023-03-08 01:03:26 +01:00
|
|
|
bool &has_net_load) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
pin_cap = 0.0;
|
|
|
|
|
wire_cap = 0.0;
|
|
|
|
|
fanout = 0.0;
|
2023-03-08 01:03:26 +01:00
|
|
|
has_net_load = false;
|
2024-02-08 21:54:52 +01:00
|
|
|
FindNetCaps visitor(rf, corner, min_max, pin_cap,
|
2023-03-08 01:03:26 +01:00
|
|
|
wire_cap, fanout, has_net_load, this);
|
2023-03-09 21:23:45 +01:00
|
|
|
network_->visitConnectedPins(drvr_pin, visitor);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::pinCaps(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
float &pin_cap,
|
|
|
|
|
float &wire_cap,
|
2023-03-08 01:03:26 +01:00
|
|
|
float &fanout) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if (network_->isTopLevelPort(pin)) {
|
|
|
|
|
Port *port = network_->port(pin);
|
|
|
|
|
bool is_output = network_->direction(port)->isAnyOutput();
|
|
|
|
|
float port_pin_cap, port_wire_cap;
|
|
|
|
|
int port_fanout;
|
|
|
|
|
bool has_pin_cap, has_wire_cap, has_fanout;
|
2023-01-19 19:23:45 +01:00
|
|
|
portExtCap(port, rf, corner, min_max,
|
2018-09-28 17:54:21 +02:00
|
|
|
port_pin_cap, has_pin_cap,
|
|
|
|
|
port_wire_cap, has_wire_cap,
|
|
|
|
|
port_fanout, has_fanout);
|
|
|
|
|
if (has_pin_cap)
|
|
|
|
|
pin_cap += port_pin_cap;
|
|
|
|
|
if (has_wire_cap)
|
|
|
|
|
wire_cap += port_wire_cap;
|
|
|
|
|
if (is_output) {
|
|
|
|
|
if (has_fanout)
|
|
|
|
|
fanout += port_fanout;
|
|
|
|
|
// Output port counts as a fanout.
|
|
|
|
|
fanout++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
LibertyPort *port = network_->libertyPort(pin);
|
|
|
|
|
if (port) {
|
|
|
|
|
Instance *inst = network_->instance(pin);
|
2024-02-08 21:54:52 +01:00
|
|
|
pin_cap += portCapacitance(inst, port, rf, corner, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (port->direction()->isAnyInput())
|
|
|
|
|
fanout++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::portCapacitance(Instance *inst,
|
|
|
|
|
LibertyPort *port,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pvt *inst_pvt = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (inst)
|
|
|
|
|
inst_pvt = pvt(inst, min_max);
|
2022-10-03 20:02:28 +02:00
|
|
|
LibertyPort *corner_port = port->cornerPort(corner, min_max);
|
2024-02-08 21:54:52 +01:00
|
|
|
OperatingConditions *op_cond = operatingConditions(min_max);
|
2019-11-11 23:30:19 +01:00
|
|
|
return corner_port->capacitance(rf, min_max, op_cond, inst_pvt);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
float
|
|
|
|
|
Sdc::pinCapacitance(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Corner *corner,
|
|
|
|
|
const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
LibertyPort *port = network_->libertyPort(pin);
|
|
|
|
|
if (port) {
|
|
|
|
|
Instance *inst = network_->instance(pin);
|
2024-02-08 21:54:52 +01:00
|
|
|
return portCapacitance(inst, port, rf, corner, min_max);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return 0.0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setResistance(const Net *net,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
float res)
|
|
|
|
|
{
|
|
|
|
|
MinMaxFloatValues &values = net_res_map_[net];
|
|
|
|
|
values.setValue(min_max, res);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::resistance(const Net *net,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
float &res,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
res = 0.0;
|
|
|
|
|
MinMaxFloatValues values;
|
|
|
|
|
net_res_map_.findKey(net, values, exists);
|
|
|
|
|
if (exists)
|
|
|
|
|
values.value(min_max, res, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setPortExtFanout(const Port *port,
|
|
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
int fanout)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = ensurePortExtPinCap(port, corner);
|
2018-09-28 17:54:21 +02:00
|
|
|
port_cap->setFanout(fanout, min_max);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::portExtFanout(const Port *port,
|
|
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return values.
|
|
|
|
|
int &fanout,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = portExtCap(port, corner);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (port_cap)
|
|
|
|
|
port_cap->fanout(min_max, fanout, exists);
|
|
|
|
|
else {
|
|
|
|
|
fanout = 0.0;
|
|
|
|
|
exists = false;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
Sdc::portExtFanout(Port *port,
|
2023-01-19 19:23:45 +01:00
|
|
|
const Corner *corner,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
int fanout;
|
|
|
|
|
bool exists;
|
2023-01-19 19:23:45 +01:00
|
|
|
portExtFanout(port, corner, min_max, fanout, exists);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (exists)
|
|
|
|
|
return fanout;
|
|
|
|
|
else
|
|
|
|
|
return 0.0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
PortExtCap *
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::ensurePortExtPinCap(const Port *port,
|
|
|
|
|
const Corner *corner)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PortExtCap *port_cap = port_ext_cap_maps_[corner->index()].findKey(port);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (port_cap == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
port_cap = new PortExtCap(port);
|
2023-01-19 19:23:45 +01:00
|
|
|
port_ext_cap_maps_[corner->index()][port] = port_cap;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return port_cap;
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-04 15:53:15 +01:00
|
|
|
void
|
2024-04-23 21:57:06 +02:00
|
|
|
Sdc::swapPortExtCaps(Sdc *sdc1,
|
|
|
|
|
Sdc *sdc2)
|
2023-01-04 15:53:15 +01:00
|
|
|
{
|
2024-04-23 21:57:06 +02:00
|
|
|
for (int corner_index = 0; corner_index < sdc1->corners()->count(); corner_index++) {
|
|
|
|
|
swap(sdc1->port_ext_cap_maps_[corner_index], sdc2->port_ext_cap_maps_[corner_index]);
|
|
|
|
|
swap(sdc1->net_wire_cap_maps_[corner_index], sdc2->net_wire_cap_maps_[corner_index]);
|
2023-01-04 15:53:15 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(LibertyCell *cell,
|
|
|
|
|
LibertyPort *from,
|
|
|
|
|
LibertyPort *to)
|
|
|
|
|
{
|
|
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (disabled_cell == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
disabled_cell = new DisabledCellPorts(cell);
|
|
|
|
|
disabled_cell_ports_[cell] = disabled_cell;
|
|
|
|
|
}
|
|
|
|
|
if (from && to) {
|
|
|
|
|
disabled_cell->setDisabledFromTo(from, to);
|
2022-06-12 17:21:34 +02:00
|
|
|
for (TimingArcSet *arc_set : cell->timingArcSets(from, to))
|
2018-09-28 17:54:21 +02:00
|
|
|
arc_set->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
else if (from) {
|
|
|
|
|
disabled_cell->setDisabledFrom(from);
|
|
|
|
|
from->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
else if (to) {
|
|
|
|
|
disabled_cell->setDisabledTo(to);
|
|
|
|
|
to->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
disabled_cell->setDisabledAll();
|
|
|
|
|
cell->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(LibertyCell *cell,
|
|
|
|
|
LibertyPort *from,
|
|
|
|
|
LibertyPort *to)
|
|
|
|
|
{
|
|
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
|
|
|
|
if (disabled_cell) {
|
|
|
|
|
if (from && to) {
|
|
|
|
|
disabled_cell->removeDisabledFromTo(from, to);
|
2022-06-12 17:21:34 +02:00
|
|
|
for (TimingArcSet *arc_set : cell->timingArcSets(from, to))
|
|
|
|
|
arc_set->setIsDisabledConstraint(false);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else if (from) {
|
|
|
|
|
disabled_cell->removeDisabledFrom(from);
|
|
|
|
|
from->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
else if (to) {
|
|
|
|
|
disabled_cell->removeDisabledTo(to);
|
|
|
|
|
to->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
disabled_cell->removeDisabledAll();
|
|
|
|
|
cell->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(TimingArcSet *arc_set)
|
|
|
|
|
{
|
|
|
|
|
LibertyCell *cell = arc_set->libertyCell();
|
|
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (disabled_cell == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
disabled_cell = new DisabledCellPorts(cell);
|
|
|
|
|
disabled_cell_ports_[cell] = disabled_cell;
|
|
|
|
|
}
|
|
|
|
|
disabled_cell->setDisabled(arc_set);
|
|
|
|
|
arc_set->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(TimingArcSet *arc_set)
|
|
|
|
|
{
|
|
|
|
|
LibertyCell *cell = arc_set->libertyCell();
|
|
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
|
|
|
|
if (disabled_cell) {
|
|
|
|
|
disabled_cell->removeDisabled(arc_set);
|
|
|
|
|
arc_set->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(LibertyPort *port)
|
|
|
|
|
{
|
|
|
|
|
disabled_lib_ports_.insert(port);
|
|
|
|
|
port->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(LibertyPort *port)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_lib_ports_.erase(port);
|
2018-09-28 17:54:21 +02:00
|
|
|
port->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(Port *port)
|
|
|
|
|
{
|
|
|
|
|
disabled_ports_.insert(port);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(Port *port)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_ports_.erase(port);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(Instance *inst,
|
|
|
|
|
LibertyPort *from,
|
|
|
|
|
LibertyPort *to)
|
|
|
|
|
{
|
|
|
|
|
DisabledInstancePorts *disabled_inst = disabled_inst_ports_.findKey(inst);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (disabled_inst == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
disabled_inst = new DisabledInstancePorts(inst);
|
|
|
|
|
disabled_inst_ports_[inst] = disabled_inst;
|
|
|
|
|
}
|
|
|
|
|
if (from && to)
|
|
|
|
|
disabled_inst->setDisabledFromTo(from, to);
|
|
|
|
|
else if (from)
|
|
|
|
|
disabled_inst->setDisabledFrom(from);
|
|
|
|
|
else if (to)
|
|
|
|
|
disabled_inst->setDisabledTo(to);
|
|
|
|
|
else
|
|
|
|
|
disabled_inst->setDisabledAll();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(Instance *inst,
|
|
|
|
|
LibertyPort *from,
|
|
|
|
|
LibertyPort *to)
|
|
|
|
|
{
|
|
|
|
|
DisabledInstancePorts *disabled_inst = disabled_inst_ports_.findKey(inst);
|
|
|
|
|
if (disabled_inst) {
|
|
|
|
|
if (from && to)
|
|
|
|
|
disabled_inst->removeDisabledFromTo(from, to);
|
|
|
|
|
else if (from)
|
|
|
|
|
disabled_inst->removeDisabledFrom(from);
|
|
|
|
|
else if (to)
|
|
|
|
|
disabled_inst->removeDisabledTo(to);
|
|
|
|
|
else
|
|
|
|
|
disabled_inst->removeDisabledAll();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(Pin *from,
|
|
|
|
|
Pin *to)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PinPair pair(from, to);
|
|
|
|
|
disabled_wire_edges_.insert(pair);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(Pin *from,
|
|
|
|
|
Pin *to)
|
|
|
|
|
{
|
|
|
|
|
PinPair probe(from, to);
|
2023-01-19 19:23:45 +01:00
|
|
|
disabled_wire_edges_.erase(probe);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disable(Edge *edge)
|
|
|
|
|
{
|
|
|
|
|
disabled_edges_.insert(edge);
|
|
|
|
|
edge->setIsDisabledConstraint(true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(Edge *edge)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_edges_.erase(edge);
|
2018-09-28 17:54:21 +02:00
|
|
|
edge->setIsDisabledConstraint(false);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisabled(Edge *edge)
|
|
|
|
|
{
|
|
|
|
|
return disabled_edges_.hasKey(edge);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
class DisableEdgesThruHierPin : public HierPinThruVisitor
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
DisableEdgesThruHierPin(PinPairSet *pairs,
|
|
|
|
|
Graph *graph);
|
|
|
|
|
|
|
|
|
|
protected:
|
2023-01-19 19:23:45 +01:00
|
|
|
virtual void visit(const Pin *drvr,
|
|
|
|
|
const Pin *load);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
PinPairSet *pairs_;
|
|
|
|
|
Graph *graph_;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
DisableEdgesThruHierPin::DisableEdgesThruHierPin(PinPairSet *pairs,
|
|
|
|
|
Graph *graph) :
|
|
|
|
|
HierPinThruVisitor(),
|
|
|
|
|
pairs_(pairs),
|
|
|
|
|
graph_(graph)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
DisableEdgesThruHierPin::visit(const Pin *drvr,
|
|
|
|
|
const Pin *load)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PinPair pair(drvr, load);
|
|
|
|
|
pairs_->insert(pair);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::disable(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if (network_->isHierarchical(pin)) {
|
|
|
|
|
// Add leaf pins thru hierarchical pin to disabled_edges_.
|
|
|
|
|
DisableEdgesThruHierPin visitor(&disabled_wire_edges_, graph_);
|
|
|
|
|
visitDrvrLoadsThruHierPin(pin, network_, &visitor);
|
|
|
|
|
}
|
2020-05-19 22:07:52 +02:00
|
|
|
else
|
2018-09-28 17:54:21 +02:00
|
|
|
disabled_pins_.insert(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
class RemoveDisableEdgesThruHierPin : public HierPinThruVisitor
|
|
|
|
|
{
|
|
|
|
|
public:
|
2020-05-19 22:07:52 +02:00
|
|
|
RemoveDisableEdgesThruHierPin(PinPairSet *pairs,
|
|
|
|
|
Graph *graph);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
protected:
|
2023-01-19 19:23:45 +01:00
|
|
|
virtual void visit(const Pin *drvr,
|
|
|
|
|
const Pin *load);
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
PinPairSet *pairs_;
|
|
|
|
|
Graph *graph_;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
RemoveDisableEdgesThruHierPin::RemoveDisableEdgesThruHierPin(PinPairSet *pairs,
|
|
|
|
|
Graph *graph) :
|
|
|
|
|
HierPinThruVisitor(),
|
|
|
|
|
pairs_(pairs),
|
|
|
|
|
graph_(graph)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
RemoveDisableEdgesThruHierPin::visit(const Pin *drvr,
|
|
|
|
|
const Pin *load)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
PinPair pair(drvr, load);
|
|
|
|
|
pairs_->erase(pair);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisable(Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
if (network_->isHierarchical(pin)) {
|
|
|
|
|
// Remove leaf pins thru hierarchical pin from disabled_edges_.
|
|
|
|
|
RemoveDisableEdgesThruHierPin visitor(&disabled_wire_edges_, graph_);
|
|
|
|
|
visitDrvrLoadsThruHierPin(pin, network_, &visitor);
|
|
|
|
|
}
|
2020-05-19 22:07:52 +02:00
|
|
|
else
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_pins_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisabled(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
Port *port = network_->port(pin);
|
|
|
|
|
LibertyPort *lib_port = network_->libertyPort(pin);
|
2023-03-09 21:23:45 +01:00
|
|
|
return disabled_pins_.hasKey(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| disabled_ports_.hasKey(port)
|
|
|
|
|
|| disabled_lib_ports_.hasKey(lib_port);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisabled(const Instance *inst,
|
|
|
|
|
const Pin *from_pin,
|
|
|
|
|
const Pin *to_pin,
|
|
|
|
|
const TimingRole *role) const
|
|
|
|
|
{
|
|
|
|
|
if (role == TimingRole::wire()) {
|
|
|
|
|
// Hierarchical thru pin disables.
|
2023-01-19 19:23:45 +01:00
|
|
|
PinPair pair(from_pin, to_pin);
|
|
|
|
|
return disabled_wire_edges_.hasKey(pair);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
LibertyCell *cell = network_->libertyCell(inst);
|
|
|
|
|
LibertyPort *from_port = network_->libertyPort(from_pin);
|
|
|
|
|
LibertyPort *to_port = network_->libertyPort(to_pin);
|
2023-03-09 21:23:45 +01:00
|
|
|
DisabledInstancePorts *disabled_inst = disabled_inst_ports_.findKey(inst);
|
2018-09-28 17:54:21 +02:00
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
|
|
|
|
return (disabled_inst
|
|
|
|
|
&& disabled_inst->isDisabled(from_port, to_port, role))
|
|
|
|
|
|| (disabled_cell
|
|
|
|
|
&& disabled_cell->isDisabled(from_port, to_port, role));
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisabled(TimingArcSet *arc_set) const
|
|
|
|
|
{
|
|
|
|
|
LibertyCell *cell = arc_set->libertyCell();
|
|
|
|
|
if (cell) {
|
|
|
|
|
DisabledCellPorts *disabled_cell = disabled_cell_ports_.findKey(cell);
|
|
|
|
|
return disabled_cell
|
|
|
|
|
&& disabled_cell->isDisabled(arc_set);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
const DisabledInstancePortsMap *
|
|
|
|
|
Sdc::disabledInstancePorts() const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
return &disabled_inst_ports_;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
DisabledCellPortsMap *
|
|
|
|
|
Sdc::disabledCellPorts()
|
|
|
|
|
{
|
|
|
|
|
return &disabled_cell_ports_;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disableClockGatingCheck(Instance *inst)
|
|
|
|
|
{
|
|
|
|
|
disabled_clk_gating_checks_inst_.insert(inst);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::disableClockGatingCheck(Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
disabled_clk_gating_checks_pin_.insert(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisableClockGatingCheck(Instance *inst)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_clk_gating_checks_inst_.erase(inst);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::removeDisableClockGatingCheck(Pin *pin)
|
|
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
disabled_clk_gating_checks_pin_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisableClockGatingCheck(const Instance *inst)
|
|
|
|
|
{
|
2023-03-09 21:23:45 +01:00
|
|
|
return disabled_clk_gating_checks_inst_.hasKey(inst);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isDisableClockGatingCheck(const Pin *pin)
|
|
|
|
|
{
|
2023-03-09 21:23:45 +01:00
|
|
|
return disabled_clk_gating_checks_pin_.hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setLogicValue(const Pin *pin,
|
|
|
|
|
LogicValue value)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
logic_value_map_[pin] = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::logicValue(const Pin *pin,
|
|
|
|
|
LogicValue &value,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
logic_value_map_.findKey(pin, value, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::setCaseAnalysis(const Pin *pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
LogicValue value)
|
|
|
|
|
{
|
|
|
|
|
case_value_map_[pin] = value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::removeCaseAnalysis(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-04-11 05:36:48 +02:00
|
|
|
case_value_map_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::caseLogicValue(const Pin *pin,
|
|
|
|
|
LogicValue &value,
|
|
|
|
|
bool &exists)
|
|
|
|
|
{
|
|
|
|
|
case_value_map_.findKey(pin, value, exists);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::hasLogicValue(const Pin *pin)
|
|
|
|
|
{
|
|
|
|
|
return case_value_map_.hasKey(pin)
|
|
|
|
|
|| logic_value_map_.hasKey(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
ExceptionFrom *
|
|
|
|
|
Sdc::makeExceptionFrom(PinSet *from_pins,
|
|
|
|
|
ClockSet *from_clks,
|
|
|
|
|
InstanceSet *from_insts,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *from_rf)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if ((from_pins && !from_pins->empty())
|
|
|
|
|
|| (from_clks && !from_clks->empty())
|
|
|
|
|
|| (from_insts && !from_insts->empty()))
|
2023-01-19 19:23:45 +01:00
|
|
|
return new ExceptionFrom(from_pins, from_clks, from_insts, from_rf,
|
|
|
|
|
true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
2019-03-13 01:25:53 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2025-07-05 01:43:21 +02:00
|
|
|
bool
|
|
|
|
|
Sdc::isExceptionStartpoint(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
Net *net = network_->net(pin);
|
|
|
|
|
const LibertyPort *port = network_->libertyPort(pin);
|
|
|
|
|
return ((network_->isTopLevelPort(pin)
|
|
|
|
|
&& network_->direction(pin)->isAnyInput())
|
|
|
|
|
|| (port && port->isRegClk())
|
|
|
|
|
|| (port && port->isLatchData()))
|
|
|
|
|
// Pins connected to power/ground are invalid.
|
|
|
|
|
&& !(net
|
|
|
|
|
&& (network_->isPower(net)
|
|
|
|
|
|| network_->isGround(net)))
|
|
|
|
|
&& !network_->isHierarchical(pin);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThru *
|
|
|
|
|
Sdc::makeExceptionThru(PinSet *pins,
|
|
|
|
|
NetSet *nets,
|
|
|
|
|
InstanceSet *insts,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if ((pins && !pins->empty())
|
|
|
|
|
|| (nets && !nets->empty())
|
|
|
|
|
|| (insts && !insts->empty()))
|
2019-11-11 23:30:19 +01:00
|
|
|
return new ExceptionThru(pins, nets, insts, rf, true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
2019-03-13 01:25:53 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
ExceptionTo *
|
|
|
|
|
Sdc::makeExceptionTo(PinSet *pins,
|
|
|
|
|
ClockSet *clks,
|
|
|
|
|
InstanceSet *insts,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFallBoth *rf,
|
|
|
|
|
const RiseFallBoth *end_rf)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if ((pins && !pins->empty())
|
|
|
|
|
|| (clks && !clks->empty())
|
|
|
|
|
|| (insts && !insts->empty())
|
2019-11-11 23:30:19 +01:00
|
|
|
|| (rf != RiseFallBoth::riseFall())
|
|
|
|
|
|| (end_rf != RiseFallBoth::riseFall()))
|
2023-01-19 19:23:45 +01:00
|
|
|
return new ExceptionTo(pins, clks, insts, rf, end_rf, true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
else
|
2019-03-13 01:25:53 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Valid endpoints include gated clock enables which are not
|
|
|
|
|
// known until clock arrivals are determined.
|
|
|
|
|
bool
|
2025-07-05 01:43:21 +02:00
|
|
|
Sdc::isExceptionEndpoint(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
Net *net = network_->net(pin);
|
2025-07-05 01:43:21 +02:00
|
|
|
bool has_checks = false;
|
|
|
|
|
const LibertyPort *port = network_->libertyPort(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (port) {
|
2025-07-05 01:43:21 +02:00
|
|
|
// Look for timing checks to the pin witihout using the graph because
|
|
|
|
|
// it may not exist.
|
2018-09-28 17:54:21 +02:00
|
|
|
LibertyCell *cell = port->libertyCell();
|
2022-06-12 17:21:34 +02:00
|
|
|
for (TimingArcSet *arc_set : cell->timingArcSets(nullptr, port)) {
|
2025-07-05 01:43:21 +02:00
|
|
|
if (arc_set->role()->isTimingCheck()) {
|
|
|
|
|
has_checks = true;
|
|
|
|
|
break;
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
2025-07-05 01:43:21 +02:00
|
|
|
return ((network_->isTopLevelPort(pin)
|
|
|
|
|
&& network_->direction(pin)->isAnyOutput())
|
|
|
|
|
|| has_checks
|
|
|
|
|
|| (port && port->isLatchData()))
|
|
|
|
|
// Pins connected to power/ground are invalid.
|
|
|
|
|
&& !(net
|
|
|
|
|
&& (network_->isPower(net)
|
|
|
|
|
|| network_->isGround(net)))
|
|
|
|
|
&& !network_->isHierarchical(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeFalsePath(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to,
|
|
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
FalsePath *exception = new FalsePath(from, thrus, to, min_max, true,
|
|
|
|
|
comment);
|
|
|
|
|
addException(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeMulticyclePath(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to,
|
|
|
|
|
const MinMaxAll *min_max,
|
|
|
|
|
bool use_end_clk,
|
|
|
|
|
int path_multiplier,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
MultiCyclePath *exception = new MultiCyclePath(from, thrus, to,
|
|
|
|
|
min_max, use_end_clk,
|
|
|
|
|
path_multiplier, true,
|
|
|
|
|
comment);
|
|
|
|
|
addException(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makePathDelay(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool ignore_clk_latency,
|
2025-05-20 23:52:04 +02:00
|
|
|
bool break_path,
|
2018-09-28 17:54:21 +02:00
|
|
|
float delay,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
PathDelay *exception = new PathDelay(from, thrus, to, min_max,
|
2025-05-20 23:52:04 +02:00
|
|
|
ignore_clk_latency, break_path,
|
|
|
|
|
delay, true, comment);
|
2018-09-28 17:54:21 +02:00
|
|
|
addException(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::recordPathDelayInternalFrom(ExceptionPath *exception)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
if (from
|
|
|
|
|
&& from->hasPins()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *from->pins()) {
|
2025-07-04 02:08:44 +02:00
|
|
|
if (!isExceptionStartpoint(pin)) {
|
2025-05-20 23:52:04 +02:00
|
|
|
path_delay_internal_from_.insert(pin);
|
|
|
|
|
if (exception->breakPath())
|
|
|
|
|
path_delay_internal_from_break_.insert(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::unrecordPathDelayInternalFrom(ExceptionPath *exception)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2025-05-20 23:52:04 +02:00
|
|
|
ExceptionFrom *from = exception->from();
|
2018-09-28 17:54:21 +02:00
|
|
|
if (from
|
|
|
|
|
&& from->hasPins()
|
2025-05-20 23:52:04 +02:00
|
|
|
&& !path_delay_internal_from_.empty()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *from->pins()) {
|
2025-07-04 02:08:44 +02:00
|
|
|
if (!isExceptionStartpoint(pin)
|
2025-05-20 23:52:04 +02:00
|
|
|
&& !pathDelayFrom(pin)) {
|
|
|
|
|
path_delay_internal_from_.erase(pin);
|
|
|
|
|
if (exception->breakPath())
|
|
|
|
|
path_delay_internal_from_break_.erase(pin);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::pathDelayFrom(const Pin *pin)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionPathSet *exceptions = first_from_pin_exceptions_.findKey(pin);
|
|
|
|
|
for (ExceptionPath *exception : *exceptions) {
|
|
|
|
|
if (exception->isPathDelay())
|
|
|
|
|
return true;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::isPathDelayInternalFrom(const Pin *pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2025-05-20 23:52:04 +02:00
|
|
|
return path_delay_internal_from_.hasKey(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isPathDelayInternalFromBreak(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
return path_delay_internal_from_break_.hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
const PinSet &
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::pathDelayInternalFrom() const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2025-05-20 23:52:04 +02:00
|
|
|
return path_delay_internal_from_;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::recordPathDelayInternalTo(ExceptionPath *exception)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to
|
|
|
|
|
&& to->hasPins()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *to->pins()) {
|
2024-04-17 20:49:19 +02:00
|
|
|
if (!(hasLibertyCheckTo(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| network_->isTopLevelPort(pin))) {
|
2025-05-20 23:52:04 +02:00
|
|
|
path_delay_internal_to_.insert(pin);
|
|
|
|
|
if (exception->breakPath())
|
|
|
|
|
path_delay_internal_to_break_.insert(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::unrecordPathDelayInternalTo(ExceptionPath *exception)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to
|
|
|
|
|
&& to->hasPins()
|
2025-05-20 23:52:04 +02:00
|
|
|
&& !path_delay_internal_to_.empty()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *to->pins()) {
|
2024-04-17 20:49:19 +02:00
|
|
|
if (!(hasLibertyCheckTo(pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
|| network_->isTopLevelPort(pin))
|
2025-05-28 20:25:42 +02:00
|
|
|
&& !pathDelayTo(pin)) {
|
2025-05-20 23:52:04 +02:00
|
|
|
path_delay_internal_to_.erase(pin);
|
|
|
|
|
if (exception->breakPath())
|
|
|
|
|
path_delay_internal_to_break_.erase(pin);
|
2025-05-28 20:25:42 +02:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2024-04-17 20:49:19 +02:00
|
|
|
Sdc::hasLibertyCheckTo(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
const Instance *inst = network_->instance(pin);
|
|
|
|
|
LibertyCell *cell = network_->libertyCell(inst);
|
|
|
|
|
if (cell) {
|
|
|
|
|
LibertyPort *port = network_->libertyPort(pin);
|
|
|
|
|
if (port) {
|
2022-06-12 17:21:34 +02:00
|
|
|
for (TimingArcSet *arc_set : cell->timingArcSets(nullptr, port)) {
|
2024-04-17 20:49:19 +02:00
|
|
|
if (arc_set->role()->isTimingCheckBetween())
|
2018-09-28 17:54:21 +02:00
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::pathDelayTo(const Pin *pin)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionPathSet *exceptions = first_to_pin_exceptions_.findKey(pin);
|
|
|
|
|
for (ExceptionPath *exception : *exceptions) {
|
|
|
|
|
if (exception->isPathDelay())
|
|
|
|
|
return true;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
2025-05-20 23:52:04 +02:00
|
|
|
Sdc::isPathDelayInternalTo(const Pin *pin) const
|
|
|
|
|
{
|
|
|
|
|
return path_delay_internal_to_.hasKey(pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isPathDelayInternalToBreak(const Pin *pin) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2025-05-20 23:52:04 +02:00
|
|
|
return path_delay_internal_to_break_.hasKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::clearGroupPathMap()
|
|
|
|
|
{
|
|
|
|
|
// GroupPath exceptions are deleted with other exceptions.
|
|
|
|
|
// Delete group_path name strings.
|
2024-06-27 22:57:58 +02:00
|
|
|
for (auto [name, groups] : group_path_map_) {
|
2018-09-28 17:54:21 +02:00
|
|
|
stringDelete(name);
|
2023-01-19 19:23:45 +01:00
|
|
|
groups->deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
delete groups;
|
|
|
|
|
}
|
|
|
|
|
group_path_map_.clear();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeGroupPath(const char *name,
|
|
|
|
|
bool is_default,
|
|
|
|
|
ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to,
|
|
|
|
|
const char *comment)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
if (name && is_default)
|
2024-01-08 03:23:53 +01:00
|
|
|
report_->critical(1490, "group path name and is_default are mutually exclusive.");
|
2018-09-28 17:54:21 +02:00
|
|
|
else if (name) {
|
|
|
|
|
GroupPath *group_path = new GroupPath(name, is_default, from, thrus, to,
|
|
|
|
|
true, comment);
|
2023-01-19 19:23:45 +01:00
|
|
|
// Clone the group_path because it may get merged and hence deleted
|
|
|
|
|
// by addException.
|
|
|
|
|
ExceptionFrom *from1 = group_path->from()
|
|
|
|
|
? group_path->from()->clone(network_):nullptr;
|
|
|
|
|
ExceptionThruSeq *thrus1 = exceptionThrusClone(group_path->thrus(), network_);
|
|
|
|
|
ExceptionTo *to1 = group_path->to() ? group_path->to()->clone(network_) : nullptr;
|
|
|
|
|
ExceptionPath *clone = group_path->clone(from1, thrus1, to1, true);
|
|
|
|
|
addException(clone);
|
2018-09-28 17:54:21 +02:00
|
|
|
// A named group path can have multiple exceptions.
|
|
|
|
|
GroupPathSet *groups = group_path_map_.findKey(name);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (groups == nullptr) {
|
2023-01-19 19:23:45 +01:00
|
|
|
groups = new GroupPathSet(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
group_path_map_[stringCopy(name)] = groups;
|
|
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
if (groups->hasKey(group_path))
|
|
|
|
|
// Exact copy of existing group path.
|
|
|
|
|
delete group_path;
|
|
|
|
|
else
|
|
|
|
|
groups->insert(group_path);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else {
|
|
|
|
|
// is_default
|
|
|
|
|
GroupPath *group_path = new GroupPath(name, is_default, from, thrus, to,
|
|
|
|
|
true, comment);
|
|
|
|
|
addException(group_path);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isGroupPathName(const char *group_name)
|
|
|
|
|
{
|
|
|
|
|
return group_path_map_.hasKey(group_name);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
FilterPath *
|
|
|
|
|
Sdc::makeFilterPath(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
FilterPath *exception = new FilterPath(from, thrus, to, true);
|
|
|
|
|
addException(exception);
|
|
|
|
|
// This is the only type of exception that can be returned.
|
|
|
|
|
// There is only one of them, so it shouldn't merge.
|
|
|
|
|
return exception;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeLoopExceptions()
|
|
|
|
|
{
|
2025-04-18 01:53:55 +02:00
|
|
|
for (GraphLoop *loop : levelize_->loops())
|
2018-09-28 17:54:21 +02:00
|
|
|
makeLoopExceptions(loop);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Make a -thru pin false path from every edge entering the loop
|
|
|
|
|
// around the loop and back.
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeLoopExceptions(GraphLoop *loop)
|
|
|
|
|
{
|
2021-03-13 01:36:13 +01:00
|
|
|
debugPrint(debug_, "loop", 2, "Loop false path");
|
2023-01-19 19:23:45 +01:00
|
|
|
for (Edge *edge : *loop->edges()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
Vertex *from_vertex = edge->from(graph_);
|
|
|
|
|
Vertex *to_vertex = edge->to(graph_);
|
|
|
|
|
Pin *from_pin = from_vertex->pin();
|
|
|
|
|
Pin *to_pin = to_vertex->pin();
|
|
|
|
|
// Find edges entering the loop.
|
|
|
|
|
VertexInEdgeIterator in_edge_iter(to_vertex, graph_);
|
|
|
|
|
while (in_edge_iter.hasNext()) {
|
|
|
|
|
Edge *in_edge = in_edge_iter.next();
|
|
|
|
|
if (in_edge != edge) {
|
|
|
|
|
Pin *loop_input_pin = in_edge->from(graph_)->pin();
|
|
|
|
|
makeLoopException(loop_input_pin, to_pin, from_pin);
|
|
|
|
|
// Prevent sub-loops by blocking paths on the main loop also.
|
|
|
|
|
makeLoopException(from_pin, to_pin, loop_input_pin);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeLoopException(const Pin *loop_input_pin,
|
|
|
|
|
const Pin *loop_pin,
|
|
|
|
|
const Pin *loop_prev_pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ExceptionThruSeq *thrus = new ExceptionThruSeq;
|
|
|
|
|
makeLoopExceptionThru(loop_input_pin, thrus);
|
|
|
|
|
makeLoopExceptionThru(loop_pin, thrus);
|
|
|
|
|
makeLoopExceptionThru(loop_prev_pin, thrus);
|
|
|
|
|
makeLoopExceptionThru(loop_pin, thrus);
|
|
|
|
|
makeLoopPath(thrus);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::makeLoopPath(ExceptionThruSeq *thrus)
|
|
|
|
|
{
|
|
|
|
|
FalsePath *exception = new LoopPath(thrus, true);
|
|
|
|
|
addException(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::makeLoopExceptionThru(const Pin *pin,
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus)
|
|
|
|
|
{
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "levelize", 2, " %s", network_->pathName(pin));
|
2023-01-19 19:23:45 +01:00
|
|
|
PinSet *pins = new PinSet(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
pins->insert(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionThru *thru = makeExceptionThru(pins, nullptr, nullptr,
|
2019-11-11 23:30:19 +01:00
|
|
|
RiseFallBoth::riseFall());
|
2018-09-28 17:54:21 +02:00
|
|
|
thrus->push_back(thru);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteLoopExceptions()
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
// erase prevents range iteration.
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet::Iterator except_iter(exceptions_);
|
|
|
|
|
while (except_iter.hasNext()) {
|
|
|
|
|
ExceptionPath *except = except_iter.next();
|
|
|
|
|
if (except->isLoop())
|
|
|
|
|
deleteException(except);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::addException(ExceptionPath *exception)
|
|
|
|
|
{
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, "add exception for %s",
|
|
|
|
|
exception->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
if (exception->isPathDelay()) {
|
2025-05-20 23:52:04 +02:00
|
|
|
recordPathDelayInternalFrom(exception);
|
|
|
|
|
recordPathDelayInternalTo(exception);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (exception->to() == nullptr)
|
2018-09-28 17:54:21 +02:00
|
|
|
path_delays_without_to_ = true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Check to see if the exception has from/to mixed object types.
|
|
|
|
|
// If so, the priority of the exception is mixed.
|
|
|
|
|
// Split it into separate exceptions that have consistent priority.
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
if (from
|
|
|
|
|
&& (from->hasPins() || from->hasInstances())
|
2023-06-29 03:09:23 +02:00
|
|
|
&& from->hasClocks()
|
|
|
|
|
// There is only one filter so there are no competing priorities.
|
|
|
|
|
&& !exception->isFilter()) {
|
2019-03-13 01:25:53 +01:00
|
|
|
PinSet *pins1 = from->pins() ? new PinSet(*from->pins()) : nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
InstanceSet *insts1 =
|
2019-03-13 01:25:53 +01:00
|
|
|
from->instances() ? new InstanceSet(*from->instances()) : nullptr;
|
|
|
|
|
ExceptionFrom *from1 = new ExceptionFrom(pins1, nullptr, insts1,
|
2023-01-19 19:23:45 +01:00
|
|
|
from->transition(), true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus1 = exceptionThrusClone(exception->thrus(), network_);
|
|
|
|
|
ExceptionTo *to = exception->to();
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionTo *to1 = to ? to->clone(network_) : nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *exception1 = exception->clone(from1, thrus1, to1, true);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, " split exception for %s",
|
|
|
|
|
exception1->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
addException1(exception1);
|
|
|
|
|
|
|
|
|
|
ClockSet *clks2 = new ClockSet(*from->clks());
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionFrom *from2 = new ExceptionFrom(nullptr, clks2, nullptr,
|
2023-01-19 19:23:45 +01:00
|
|
|
from->transition(), true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus2 = exceptionThrusClone(exception->thrus(), network_);
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionTo *to2 = to ? to->clone(network_) : nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *exception2 = exception->clone(from2, thrus2, to2, true);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, " split exception for %s",
|
|
|
|
|
exception2->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
addException1(exception2);
|
|
|
|
|
|
|
|
|
|
delete exception;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
addException1(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::addException1(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to
|
|
|
|
|
&& (to->hasPins() || to->hasInstances())
|
|
|
|
|
&& to->hasClocks()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionFrom *from1 = exception->from() ? exception->from()->clone(network_):nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus1 = exceptionThrusClone(exception->thrus(), network_);
|
2019-03-13 01:25:53 +01:00
|
|
|
PinSet *pins1 = to->pins() ? new PinSet(*to->pins()) : nullptr;
|
|
|
|
|
InstanceSet *insts1 = to->instances() ? new InstanceSet(*to->instances()) : nullptr;
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionTo *to1 = new ExceptionTo(pins1, nullptr, insts1, to->transition(),
|
|
|
|
|
to->endTransition(), true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *exception1 = exception->clone(from1, thrus1, to1, true);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, " split exception for %s",
|
|
|
|
|
exception1->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
addException2(exception1);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionFrom *from2 = exception->from() ? exception->from()->clone(network_):nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus2 = exceptionThrusClone(exception->thrus(), network_);
|
|
|
|
|
ClockSet *clks2 = new ClockSet(*to->clks());
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionTo *to2 = new ExceptionTo(nullptr, clks2, nullptr, to->transition(),
|
2023-01-19 19:23:45 +01:00
|
|
|
to->endTransition(), true, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *exception2 = exception->clone(from2, thrus2, to2, true);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, " split exception for %s",
|
|
|
|
|
exception2->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
addException2(exception2);
|
|
|
|
|
|
|
|
|
|
delete exception;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
addException2(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::addException2(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
if (exception->isMultiCycle() || exception->isPathDelay())
|
|
|
|
|
deleteMatchingExceptions(exception);
|
|
|
|
|
recordException(exception);
|
|
|
|
|
mergeException(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// If a path delay/multicycle exception is redefined with a different
|
|
|
|
|
// delay/cycle count, the new exception overrides the existing
|
|
|
|
|
// exception. Multiple related exceptions are merged to reduce the
|
|
|
|
|
// number of tags. To support overrides, relevant merged exceptions must be
|
|
|
|
|
// expanded to find and delete or override the new exception.
|
|
|
|
|
// For example, the exception
|
|
|
|
|
// set_multi_cycle_path -from {A B} -to {C D} 2
|
|
|
|
|
// is a merged representation of the following four exceptions:
|
|
|
|
|
// set_multi_cycle_path -from A -to C 2
|
|
|
|
|
// set_multi_cycle_path -from A -to D 2
|
|
|
|
|
// set_multi_cycle_path -from B -to C 2
|
|
|
|
|
// set_multi_cycle_path -from B -to D 2
|
|
|
|
|
// If the following exception is later defined,
|
|
|
|
|
// set_multi_cycle_path -from A -to C 3
|
|
|
|
|
// The cycle count of one of the merged exceptions changes.
|
|
|
|
|
// This prevents the original four exceptions from merging into one
|
|
|
|
|
// exception.
|
|
|
|
|
//
|
|
|
|
|
// This situation is handled by breaking the original merged exception
|
|
|
|
|
// into multiple smaller exceptions that exclude the new subset
|
|
|
|
|
// exception. This is NOT done by expanding the merged exception,
|
|
|
|
|
// since the number of exception points can be huge leading to serious
|
|
|
|
|
// run time problems.
|
|
|
|
|
//
|
|
|
|
|
// For the example above, the merged exception is broken down into the
|
|
|
|
|
// following set of exceptions that exclude the new subset exception.
|
|
|
|
|
//
|
|
|
|
|
// set_multi_cycle_path -from {B} -to {C D} 2
|
|
|
|
|
// set_multi_cycle_path -from {A} -to {D} 2
|
|
|
|
|
//
|
|
|
|
|
// In general, the merged exception is broken down as follows:
|
|
|
|
|
//
|
|
|
|
|
// -from {merged_from - subset_from} -thru merged_thru... -to merged_to
|
|
|
|
|
// -from merged_from -thru {merged_thru - subset_thru}... -to merged_to
|
|
|
|
|
// -from merged_from -thru merged_thru... -to {merged_to - subset_to}
|
|
|
|
|
//
|
|
|
|
|
// Where the {set1 - set2} is the set difference of of the from/thru/to
|
|
|
|
|
// objects of the merged/subset exception. If the set difference is empty,
|
|
|
|
|
// that group of exceptions matches the subset so it should not be included
|
|
|
|
|
// in the expansion.
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteMatchingExceptions(ExceptionPath *exception)
|
|
|
|
|
{
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, "find matches for %s",
|
|
|
|
|
exception->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet matches;
|
|
|
|
|
findMatchingExceptions(exception, matches);
|
|
|
|
|
|
|
|
|
|
ExceptionPathSet expanded_matches;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : matches)
|
2018-09-28 17:54:21 +02:00
|
|
|
// Expand the matching exception into a set of exceptions that
|
|
|
|
|
// that do not cover the new exception. Do not record them
|
|
|
|
|
// to prevent merging with the match, which will be deleted.
|
|
|
|
|
expandExceptionExcluding(match, exception, expanded_matches);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : matches)
|
2018-09-28 17:54:21 +02:00
|
|
|
deleteException(match);
|
|
|
|
|
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : expanded_matches)
|
|
|
|
|
addException(match);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptions(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
|
|
|
|
if (exception->from())
|
|
|
|
|
findMatchingExceptionsFirstFrom(exception, matches);
|
|
|
|
|
else if (exception->thrus())
|
|
|
|
|
findMatchingExceptionsFirstThru(exception, matches);
|
|
|
|
|
else if (exception->to())
|
|
|
|
|
findMatchingExceptionsFirstTo(exception, matches);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsFirstFrom(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
2023-01-19 19:23:45 +01:00
|
|
|
findMatchingExceptionsPins(exception, from->pins(),
|
|
|
|
|
first_from_pin_exceptions_,
|
|
|
|
|
matches);
|
|
|
|
|
findMatchingExceptionsInsts(exception, from->instances(),
|
|
|
|
|
first_from_inst_exceptions_, matches);
|
|
|
|
|
findMatchingExceptionsClks(exception, from->clks(),
|
|
|
|
|
first_from_clk_exceptions_,
|
|
|
|
|
matches);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsFirstThru(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
|
|
|
|
ExceptionThru *thru = (*exception->thrus())[0];
|
|
|
|
|
findMatchingExceptionsPins(exception, thru->pins(),
|
|
|
|
|
first_thru_pin_exceptions_,
|
|
|
|
|
matches);
|
|
|
|
|
findMatchingExceptionsInsts(exception, thru->instances(),
|
|
|
|
|
first_thru_inst_exceptions_,
|
|
|
|
|
matches);
|
2024-08-07 21:27:32 +02:00
|
|
|
if (!first_thru_net_exceptions_.empty()
|
|
|
|
|
&& thru->nets()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Net *net : *thru->nets()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
// Potential matches includes exceptions that match net that are not
|
|
|
|
|
// the first exception point.
|
|
|
|
|
ExceptionPathSet *potential_matches =
|
2023-01-19 19:23:45 +01:00
|
|
|
first_thru_net_exceptions_.findKey(net);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (potential_matches) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : *potential_matches) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThru *match_thru = (*match->thrus())[0];
|
|
|
|
|
if (match_thru->nets()->hasKey(net)
|
|
|
|
|
&& match->overrides(exception)
|
2023-06-15 18:52:32 +02:00
|
|
|
&& match->intersectsPts(exception, network_))
|
2018-09-28 17:54:21 +02:00
|
|
|
matches.insert(match);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsFirstTo(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
findMatchingExceptionsPins(exception, to->pins(), first_to_pin_exceptions_,
|
|
|
|
|
matches);
|
|
|
|
|
findMatchingExceptionsInsts(exception, to->instances(),
|
|
|
|
|
first_to_inst_exceptions_,
|
|
|
|
|
matches);
|
|
|
|
|
findMatchingExceptionsClks(exception, to->clks(), first_to_clk_exceptions_,
|
|
|
|
|
matches);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsClks(ExceptionPath *exception,
|
|
|
|
|
ClockSet *clks,
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockExceptionsMap &exception_map,
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (clks) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet clks_matches;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (Clock *clk : *clks)
|
|
|
|
|
clks_matches.insertSet(exception_map.findKey(clk));
|
2018-09-28 17:54:21 +02:00
|
|
|
findMatchingExceptions(exception, &clks_matches, matches);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsPins(ExceptionPath *exception,
|
|
|
|
|
PinSet *pins,
|
2023-01-19 19:23:45 +01:00
|
|
|
PinExceptionsMap &exception_map,
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (pins) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet pins_matches;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Pin *pin : *pins)
|
|
|
|
|
pins_matches.insertSet(exception_map.findKey(pin));
|
2018-09-28 17:54:21 +02:00
|
|
|
findMatchingExceptions(exception, &pins_matches, matches);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptionsInsts(ExceptionPath *exception,
|
|
|
|
|
InstanceSet *insts,
|
2023-01-19 19:23:45 +01:00
|
|
|
InstanceExceptionsMap &exception_map,
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (insts) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet insts_matches;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (const Instance *inst : *insts)
|
|
|
|
|
insts_matches.insertSet(exception_map.findKey(inst));
|
2018-09-28 17:54:21 +02:00
|
|
|
findMatchingExceptions(exception, &insts_matches, matches);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::findMatchingExceptions(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet *potential_matches,
|
|
|
|
|
ExceptionPathSet &matches)
|
|
|
|
|
{
|
|
|
|
|
if (potential_matches) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : *potential_matches) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (match->overrides(exception)
|
2023-06-15 18:52:32 +02:00
|
|
|
&& match->intersectsPts(exception, network_))
|
2018-09-28 17:54:21 +02:00
|
|
|
matches.insert(match);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::expandExceptionExcluding(ExceptionPath *exception,
|
|
|
|
|
ExceptionPath *excluding,
|
|
|
|
|
ExceptionPathSet &expansions)
|
|
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (from) {
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionFrom *from_cpy = from->clone(network_);
|
|
|
|
|
from_cpy->deleteObjects(excluding->from(), network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (from_cpy->hasObjects()) {
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionThruSeq *thrus_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (thrus)
|
|
|
|
|
thrus_cpy = clone(thrus, network_);
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionTo *to_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (to)
|
2023-01-19 19:23:45 +01:00
|
|
|
to_cpy = to->clone(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *expand = exception->clone(from_cpy,thrus_cpy,to_cpy,true);
|
|
|
|
|
expansions.insert(expand);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
delete from_cpy;
|
|
|
|
|
}
|
|
|
|
|
if (thrus) {
|
|
|
|
|
ExceptionThruSeq::Iterator thru_iter(thrus);
|
|
|
|
|
ExceptionThruSeq::Iterator thru_iter2(excluding->thrus());
|
|
|
|
|
while (thru_iter.hasNext()
|
|
|
|
|
&& thru_iter2.hasNext()) {
|
|
|
|
|
ExceptionThru *thru = thru_iter.next();
|
|
|
|
|
ExceptionThru *thru2 = thru_iter2.next();
|
|
|
|
|
ExceptionThru *thru_cpy = thru->clone(network_);
|
2023-01-19 19:23:45 +01:00
|
|
|
thru_cpy->deleteObjects(thru2, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (thru_cpy->hasObjects()) {
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionFrom *from_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (from)
|
2023-01-19 19:23:45 +01:00
|
|
|
from_cpy = from->clone(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThruSeq *thrus_cpy = new ExceptionThruSeq;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionThru *thru1 : *thrus) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (thru1 == thru)
|
|
|
|
|
thrus_cpy->push_back(thru_cpy);
|
|
|
|
|
else {
|
|
|
|
|
ExceptionThru *thru_cpy = thru->clone(network_);
|
|
|
|
|
thrus_cpy->push_back(thru_cpy);
|
|
|
|
|
}
|
|
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionTo *to_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (to)
|
2023-01-19 19:23:45 +01:00
|
|
|
to_cpy = to->clone(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *expand = exception->clone(from_cpy, thrus_cpy, to_cpy,
|
|
|
|
|
true);
|
|
|
|
|
expansions.insert(expand);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
delete thru_cpy;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (to) {
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionTo *to_cpy = to->clone(network_);
|
|
|
|
|
to_cpy->deleteObjects(excluding->to(), network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (to_cpy->hasObjects()) {
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionFrom *from_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (from)
|
2023-01-19 19:23:45 +01:00
|
|
|
from_cpy = from->clone(network_);
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionThruSeq *thrus_cpy = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (thrus)
|
|
|
|
|
thrus_cpy = clone(thrus, network_);
|
|
|
|
|
ExceptionPath *expand = exception->clone(from_cpy,thrus_cpy,to_cpy,true);
|
|
|
|
|
expansions.insert(expand);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
delete to_cpy;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static ExceptionThruSeq *
|
2023-01-19 19:23:45 +01:00
|
|
|
clone(ExceptionThruSeq *thrus,
|
|
|
|
|
Network *network)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
ExceptionThruSeq *thrus_cpy = new ExceptionThruSeq;
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionThru *thru : *thrus) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionThru *thru_cpy = thru->clone(network);
|
|
|
|
|
thrus_cpy->push_back(thru_cpy);
|
|
|
|
|
}
|
|
|
|
|
return thrus_cpy;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordException(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
exceptions_.insert(exception);
|
2024-07-25 17:18:36 +02:00
|
|
|
exception->setId(++exception_id_);
|
2018-09-28 17:54:21 +02:00
|
|
|
recordMergeHashes(exception);
|
|
|
|
|
recordExceptionFirstPts(exception);
|
2025-10-31 18:36:57 +01:00
|
|
|
recordExceptionPins(exception);
|
2020-11-14 18:34:26 +01:00
|
|
|
checkForThruHpins(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::checkForThruHpins(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
if (thrus) {
|
|
|
|
|
for (ExceptionThru *thru : *thrus) {
|
|
|
|
|
if (thru->edges()) {
|
|
|
|
|
have_thru_hpin_exceptions_ = true;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordMergeHashes(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionPtIterator missing_pt_iter(exception);
|
|
|
|
|
while (missing_pt_iter.hasNext()) {
|
|
|
|
|
ExceptionPt *missing_pt = missing_pt_iter.next();
|
|
|
|
|
recordMergeHash(exception, missing_pt);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordMergeHash(ExceptionPath *exception,
|
|
|
|
|
ExceptionPt *missing_pt)
|
|
|
|
|
{
|
2019-08-08 23:13:02 +02:00
|
|
|
size_t hash = exception->hash(missing_pt);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 3,
|
|
|
|
|
"record merge hash %zu %s missing %s",
|
|
|
|
|
hash,
|
|
|
|
|
exception->asString(network_),
|
|
|
|
|
missing_pt->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet *set = exception_merge_hash_.findKey(hash);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (set == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_merge_hash_[hash] = set;
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Record a mapping from first pin/clock/instance's to a set of exceptions.
|
|
|
|
|
// The first exception point is when the exception becomes active.
|
|
|
|
|
// After it becomes active, its state changes as the other
|
|
|
|
|
// exception points are traversed.
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionFirstPts(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
if (exception->from())
|
|
|
|
|
recordExceptionFirstFrom(exception);
|
|
|
|
|
else if (exception->thrus())
|
|
|
|
|
recordExceptionFirstThru(exception);
|
|
|
|
|
else if (exception->to())
|
|
|
|
|
recordExceptionFirstTo(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionFirstFrom(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
recordExceptionPins(exception, from->pins(), first_from_pin_exceptions_);
|
|
|
|
|
recordExceptionInsts(exception, from->instances(),
|
|
|
|
|
first_from_inst_exceptions_);
|
|
|
|
|
recordExceptionClks(exception, from->clks(), first_from_clk_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
|
2025-10-31 18:36:57 +01:00
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionPins(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
if (from)
|
|
|
|
|
recordExceptionPins(exception, from->pins(), pin_exceptions_);
|
|
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
if (thrus) {
|
|
|
|
|
for (ExceptionThru *thru : *thrus)
|
|
|
|
|
recordExceptionPins(exception, thru->pins(), pin_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to)
|
|
|
|
|
recordExceptionPins(exception, to->pins(), pin_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionFirstThru(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionThru *thru = (*exception->thrus())[0];
|
|
|
|
|
recordExceptionPins(exception, thru->pins(), first_thru_pin_exceptions_);
|
|
|
|
|
recordExceptionInsts(exception, thru->instances(),
|
|
|
|
|
first_thru_inst_exceptions_);
|
|
|
|
|
recordExceptionEdges(exception, thru->edges(), first_thru_edge_exceptions_);
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionThru *thru : *exception->thrus())
|
2018-09-28 17:54:21 +02:00
|
|
|
recordExceptionNets(exception, thru->nets(), first_thru_net_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionFirstTo(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
recordExceptionPins(exception, to->pins(), first_to_pin_exceptions_);
|
|
|
|
|
recordExceptionInsts(exception, to->instances(), first_to_inst_exceptions_);
|
|
|
|
|
recordExceptionClks(exception, to->clks(), first_to_clk_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionClks(ExceptionPath *exception,
|
|
|
|
|
ClockSet *clks,
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockExceptionsMap &exception_map)
|
|
|
|
|
{
|
|
|
|
|
if (clks) {
|
|
|
|
|
for (Clock *clk : *clks) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(clk);
|
|
|
|
|
if (set == nullptr) {
|
|
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_map[clk] = set;
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionEdges(ExceptionPath *exception,
|
|
|
|
|
EdgePinsSet *edges,
|
2023-01-19 19:23:45 +01:00
|
|
|
EdgeExceptionsMap &exception_map)
|
|
|
|
|
{
|
|
|
|
|
if (edges) {
|
|
|
|
|
for (const EdgePins &edge : *edges) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(edge);
|
|
|
|
|
if (set == nullptr) {
|
|
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_map.insert(edge, set);
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionPins(ExceptionPath *exception,
|
|
|
|
|
PinSet *pins,
|
2023-01-19 19:23:45 +01:00
|
|
|
PinExceptionsMap &exception_map)
|
|
|
|
|
{
|
|
|
|
|
if (pins) {
|
|
|
|
|
for (const Pin *pin : *pins) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(pin);
|
|
|
|
|
if (set == nullptr) {
|
|
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_map.insert(pin, set);
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionHpin(ExceptionPath *exception,
|
|
|
|
|
Pin *pin,
|
2023-01-19 19:23:45 +01:00
|
|
|
PinExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionPathSet *set = exception_map.findKey(pin);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (set == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
set = new ExceptionPathSet;
|
2023-01-19 19:23:45 +01:00
|
|
|
exception_map.insert(pin, set);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionInsts(ExceptionPath *exception,
|
|
|
|
|
InstanceSet *insts,
|
2023-01-19 19:23:45 +01:00
|
|
|
InstanceExceptionsMap &exception_map)
|
|
|
|
|
{
|
|
|
|
|
if (insts) {
|
|
|
|
|
for (const Instance *inst : *insts) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(inst);
|
|
|
|
|
if (set == nullptr) {
|
|
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_map[inst] = set;
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::recordExceptionNets(ExceptionPath *exception,
|
|
|
|
|
NetSet *nets,
|
2023-01-19 19:23:45 +01:00
|
|
|
NetExceptionsMap &exception_map)
|
|
|
|
|
{
|
|
|
|
|
if (nets) {
|
|
|
|
|
for (const Net *net : *nets) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(net);
|
|
|
|
|
if (set == nullptr) {
|
|
|
|
|
set = new ExceptionPathSet;
|
|
|
|
|
exception_map[net] = set;
|
|
|
|
|
}
|
|
|
|
|
set->insert(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Exceptions of the same type can be merged if they differ in exactly
|
|
|
|
|
// one exception point (-from, -thru or -to).
|
|
|
|
|
// For example, the following exceptions:
|
|
|
|
|
// set_false_path -from {A B} -to C
|
|
|
|
|
// set_false_path -from {A B} -to D
|
|
|
|
|
// can be merged to form:
|
|
|
|
|
// set_false_path -from {A B} -to {C D}
|
|
|
|
|
//
|
|
|
|
|
// A hash is generated for each exception missing one exception point
|
|
|
|
|
// to find potential matches. If a match is found, the exceptions are
|
|
|
|
|
// merged. Next we try to merge the surviving exception until we run
|
|
|
|
|
// out of merges.
|
|
|
|
|
void
|
|
|
|
|
Sdc::mergeException(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionPath *merged = findMergeMatch(exception);
|
|
|
|
|
while (merged)
|
|
|
|
|
merged = findMergeMatch(merged);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Return the merged result.
|
|
|
|
|
ExceptionPath *
|
|
|
|
|
Sdc::findMergeMatch(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
bool first_pt = true;
|
|
|
|
|
ExceptionPtIterator missing_pt_iter(exception);
|
|
|
|
|
while (missing_pt_iter.hasNext()) {
|
|
|
|
|
ExceptionPt *missing_pt = missing_pt_iter.next();
|
2019-08-08 23:13:02 +02:00
|
|
|
size_t hash = exception->hash(missing_pt);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet *matches = exception_merge_hash_.findKey(hash);
|
|
|
|
|
if (matches) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *match : *matches) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPt *match_missing_pt;
|
|
|
|
|
if (match != exception
|
|
|
|
|
// Exceptions are not merged if their priorities are
|
|
|
|
|
// different. This allows exceptions to be pruned during
|
|
|
|
|
// search at the endpoint.
|
|
|
|
|
&& exception->mergeable(match)
|
|
|
|
|
&& match->mergeablePts(exception, missing_pt, match_missing_pt)) {
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 1, "merge %s",
|
|
|
|
|
exception->asString(network_));
|
|
|
|
|
debugPrint(debug_, "exception_merge", 1, " with %s",
|
|
|
|
|
match->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
// Unrecord the exception that is being merged away.
|
|
|
|
|
unrecordException(exception);
|
|
|
|
|
unrecordMergeHashes(match);
|
2023-01-19 19:23:45 +01:00
|
|
|
missing_pt->mergeInto(match_missing_pt, network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
recordMergeHashes(match);
|
|
|
|
|
// First point maps only change if the exception point that
|
|
|
|
|
// is being merged is the first exception point.
|
|
|
|
|
if (first_pt)
|
|
|
|
|
recordExceptionFirstPts(match);
|
|
|
|
|
// Have to wait until after exception point merge to delete
|
|
|
|
|
// the exception.
|
|
|
|
|
delete exception;
|
|
|
|
|
return match;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
first_pt = false;
|
|
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
return nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteExceptions()
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
exceptions_.deleteContentsClear();
|
2024-07-25 17:18:36 +02:00
|
|
|
exception_id_ = 0;
|
2023-01-19 19:23:45 +01:00
|
|
|
|
|
|
|
|
first_from_pin_exceptions_.deleteContentsClear();
|
|
|
|
|
first_from_clk_exceptions_.deleteContentsClear();
|
|
|
|
|
first_from_inst_exceptions_.deleteContentsClear();
|
|
|
|
|
first_to_pin_exceptions_.deleteContentsClear();
|
|
|
|
|
first_to_clk_exceptions_.deleteContentsClear();
|
|
|
|
|
first_to_inst_exceptions_.deleteContentsClear();
|
|
|
|
|
first_thru_pin_exceptions_.deleteContentsClear();
|
|
|
|
|
first_thru_inst_exceptions_.deleteContentsClear();
|
|
|
|
|
first_thru_net_exceptions_.deleteContentsClear();
|
|
|
|
|
first_thru_edge_exceptions_.deleteContentsClear();
|
|
|
|
|
first_thru_edge_exceptions_.clear();
|
2025-05-20 23:52:04 +02:00
|
|
|
path_delay_internal_from_.clear();
|
|
|
|
|
path_delay_internal_from_break_.clear();
|
|
|
|
|
path_delay_internal_to_.clear();
|
|
|
|
|
path_delay_internal_to_break_.clear();
|
2025-11-05 00:50:54 +01:00
|
|
|
pin_exceptions_.deleteContentsClear();
|
2018-09-28 17:54:21 +02:00
|
|
|
|
|
|
|
|
deleteExceptionPtHashMapSets(exception_merge_hash_);
|
|
|
|
|
exception_merge_hash_.clear();
|
2020-11-14 18:34:26 +01:00
|
|
|
have_thru_hpin_exceptions_ = false;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteExceptionPtHashMapSets(ExceptionPathPtHash &map)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
map.deleteContents();
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteExceptionsReferencing(Clock *clk)
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
// erase prevents range iteration.
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet::ConstIterator exception_iter(exceptions_);
|
|
|
|
|
while (exception_iter.hasNext()) {
|
|
|
|
|
ExceptionPath *exception = exception_iter.next();
|
|
|
|
|
bool deleted = false;
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
if (from) {
|
|
|
|
|
ClockSet *clks = from->clks();
|
|
|
|
|
if (clks && clks->hasKey(clk)) {
|
|
|
|
|
unrecordException(exception);
|
|
|
|
|
from->deleteClock(clk);
|
|
|
|
|
if (from->hasObjects())
|
|
|
|
|
recordException(exception);
|
|
|
|
|
else {
|
|
|
|
|
deleteException(exception);
|
|
|
|
|
deleted = true;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!deleted) {
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to) {
|
|
|
|
|
ClockSet *clks = to->clks();
|
|
|
|
|
if (clks && clks->hasKey(clk)) {
|
|
|
|
|
unrecordException(exception);
|
|
|
|
|
to->deleteClock(clk);
|
|
|
|
|
if (to->hasObjects())
|
|
|
|
|
recordException(exception);
|
|
|
|
|
else
|
|
|
|
|
deleteException(exception);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::deleteException(ExceptionPath *exception)
|
|
|
|
|
{
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 2, "delete %s",
|
|
|
|
|
exception->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
unrecordException(exception);
|
|
|
|
|
delete exception;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordException(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
unrecordMergeHashes(exception);
|
|
|
|
|
unrecordExceptionFirstPts(exception);
|
2019-04-11 05:36:48 +02:00
|
|
|
exceptions_.erase(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordMergeHashes(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionPtIterator missing_pt_iter(exception);
|
|
|
|
|
while (missing_pt_iter.hasNext()) {
|
|
|
|
|
ExceptionPt *missing_pt = missing_pt_iter.next();
|
|
|
|
|
unrecordMergeHash(exception, missing_pt);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordMergeHash(ExceptionPath *exception,
|
|
|
|
|
ExceptionPt *missing_pt)
|
|
|
|
|
{
|
2019-08-08 23:13:02 +02:00
|
|
|
size_t hash = exception->hash(missing_pt);
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_merge", 3,
|
|
|
|
|
"unrecord merge hash %zu %s missing %s",
|
|
|
|
|
hash,
|
|
|
|
|
exception->asString(network_),
|
|
|
|
|
missing_pt->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet *matches = exception_merge_hash_.findKey(hash);
|
|
|
|
|
if (matches)
|
2019-04-11 05:36:48 +02:00
|
|
|
matches->erase(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionFirstPts(ExceptionPath *exception)
|
|
|
|
|
{
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (from) {
|
|
|
|
|
unrecordExceptionPins(exception, from->pins(), first_from_pin_exceptions_);
|
|
|
|
|
unrecordExceptionClks(exception, from->clks(), first_from_clk_exceptions_);
|
2023-01-19 19:23:45 +01:00
|
|
|
unrecordExceptionInsts(exception, from->instances(), first_from_inst_exceptions_);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
else if (thrus) {
|
|
|
|
|
ExceptionThru *thru = (*thrus)[0];
|
|
|
|
|
unrecordExceptionPins(exception, thru->pins(), first_thru_pin_exceptions_);
|
|
|
|
|
unrecordExceptionInsts(exception, thru->instances(),
|
|
|
|
|
first_thru_inst_exceptions_);
|
|
|
|
|
unrecordExceptionNets(exception, thru->nets(), first_thru_net_exceptions_);
|
|
|
|
|
unrecordExceptionEdges(exception, thru->edges(),
|
|
|
|
|
first_thru_edge_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
else if (to) {
|
|
|
|
|
unrecordExceptionPins(exception, to->pins(), first_to_pin_exceptions_);
|
|
|
|
|
unrecordExceptionClks(exception, to->clks(), first_to_clk_exceptions_);
|
|
|
|
|
unrecordExceptionInsts(exception, to->instances(),
|
|
|
|
|
first_to_inst_exceptions_);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionClks(ExceptionPath *exception,
|
|
|
|
|
ClockSet *clks,
|
2023-01-19 19:23:45 +01:00
|
|
|
ClockExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (clks) {
|
|
|
|
|
for (Clock *clk : *clks) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(clk);
|
|
|
|
|
if (set)
|
|
|
|
|
set->erase(exception);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionPins(ExceptionPath *exception,
|
|
|
|
|
PinSet *pins,
|
2023-01-19 19:23:45 +01:00
|
|
|
PinExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (pins) {
|
|
|
|
|
for (const Pin *pin : *pins) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(pin);
|
|
|
|
|
if (set)
|
|
|
|
|
set->erase(exception);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionInsts(ExceptionPath *exception,
|
|
|
|
|
InstanceSet *insts,
|
2023-01-19 19:23:45 +01:00
|
|
|
InstanceExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (insts) {
|
|
|
|
|
for (const Instance *inst : *insts) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(inst);
|
|
|
|
|
if (set)
|
|
|
|
|
set->erase(exception);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionEdges(ExceptionPath *exception,
|
|
|
|
|
EdgePinsSet *edges,
|
2023-01-19 19:23:45 +01:00
|
|
|
EdgeExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (edges) {
|
|
|
|
|
for (const EdgePins &edge : *edges) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(edge);
|
|
|
|
|
if (set)
|
|
|
|
|
set->erase(exception);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionNets(ExceptionPath *exception,
|
|
|
|
|
NetSet *nets,
|
2023-01-19 19:23:45 +01:00
|
|
|
NetExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (nets) {
|
|
|
|
|
for (const Net *net : *nets) {
|
|
|
|
|
ExceptionPathSet *set = exception_map.findKey(net);
|
|
|
|
|
if (set)
|
|
|
|
|
set->erase(exception);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::unrecordExceptionHpin(ExceptionPath *exception,
|
|
|
|
|
Pin *pin,
|
2023-01-19 19:23:45 +01:00
|
|
|
PinExceptionsMap &exception_map)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
ExceptionPathSet *set = exception_map.findKey(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (set)
|
2019-04-11 05:36:48 +02:00
|
|
|
set->erase(exception);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
class ExpandException : public ExpandedExceptionVisitor
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
ExpandException(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &expansions,
|
|
|
|
|
Network *network);
|
2025-10-31 18:36:57 +01:00
|
|
|
virtual void visit(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionTo *to);
|
|
|
|
|
|
|
|
|
|
private:
|
|
|
|
|
ExceptionPathSet &expansions_;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ExpandException::ExpandException(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &expansions,
|
|
|
|
|
Network *network) :
|
|
|
|
|
ExpandedExceptionVisitor(exception, network),
|
|
|
|
|
expansions_(expansions)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
ExpandException::visit(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to)
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionFrom *from_clone = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (from)
|
2023-01-19 19:23:45 +01:00
|
|
|
from_clone = from->clone(network_);
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionThruSeq *thrus_clone = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (thrus) {
|
|
|
|
|
thrus_clone = new ExceptionThruSeq;
|
2025-09-08 00:22:06 +02:00
|
|
|
for (ExceptionThru *thru : *thrus) {
|
|
|
|
|
ExceptionThru *thru_clone = thru->clone(network_);
|
|
|
|
|
thrus_clone->push_back(thru_clone);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
ExceptionTo *to_clone = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
if (to)
|
2023-01-19 19:23:45 +01:00
|
|
|
to_clone = to->clone(network_);
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPath *expand = exception_->clone(from_clone, thrus_clone,
|
|
|
|
|
to_clone, true);
|
|
|
|
|
expansions_.insert(expand);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// Expand exception from/thrus/to sets so there is only one exception
|
|
|
|
|
// point in each from/thru/to.
|
|
|
|
|
void
|
|
|
|
|
Sdc::expandException(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathSet &expansions)
|
|
|
|
|
{
|
|
|
|
|
ExpandException expander(exception, expansions, network_);
|
|
|
|
|
expander.visitExpansions();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::resetPath(ExceptionFrom *from,
|
|
|
|
|
ExceptionThruSeq *thrus,
|
|
|
|
|
ExceptionTo *to,
|
|
|
|
|
const MinMaxAll *min_max)
|
|
|
|
|
{
|
|
|
|
|
checkFromThrusTo(from, thrus, to);
|
|
|
|
|
ExceptionPathSet::Iterator except_iter(exceptions_);
|
|
|
|
|
while (except_iter.hasNext()) {
|
|
|
|
|
ExceptionPath *match = except_iter.next();
|
2023-06-15 18:52:32 +02:00
|
|
|
if (match->resetMatch(from, thrus, to, min_max, network_)) {
|
2021-01-01 20:46:51 +01:00
|
|
|
debugPrint(debug_, "exception_match", 3, "reset match %s",
|
|
|
|
|
match->asString(network_));
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionPathSet expansions;
|
|
|
|
|
expandException(match, expansions);
|
|
|
|
|
deleteException(match);
|
|
|
|
|
ExceptionPathSet::Iterator expand_iter(expansions);
|
|
|
|
|
while (expand_iter.hasNext()) {
|
|
|
|
|
ExceptionPath *expand = expand_iter.next();
|
2023-06-15 18:52:32 +02:00
|
|
|
if (expand->resetMatch(from, thrus, to, min_max, network_)) {
|
2025-05-20 23:52:04 +02:00
|
|
|
unrecordPathDelayInternalFrom(expand);
|
|
|
|
|
unrecordPathDelayInternalTo(expand);
|
2018-09-28 17:54:21 +02:00
|
|
|
delete expand;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
addException(expand);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::exceptionFromStates(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *clk_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
2019-11-11 23:30:19 +01:00
|
|
|
return exceptionFromStates(pin, rf, clk, clk_rf, min_max, true, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::exceptionFromStates(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *clk_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool include_filter,
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
|
|
|
|
bool srch_from = true;
|
|
|
|
|
if (pin) {
|
2023-01-19 19:23:45 +01:00
|
|
|
if (srch_from && !first_from_pin_exceptions_.empty())
|
|
|
|
|
srch_from &= exceptionFromStates(first_from_pin_exceptions_.findKey(pin),
|
2022-08-11 00:43:11 +02:00
|
|
|
pin, rf, min_max, include_filter,
|
2018-09-28 17:54:21 +02:00
|
|
|
states);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (srch_from && !first_thru_pin_exceptions_.empty())
|
|
|
|
|
srch_from &= exceptionFromStates(first_thru_pin_exceptions_.findKey(pin),
|
2022-08-11 00:43:11 +02:00
|
|
|
pin, rf, min_max, include_filter,
|
2018-09-28 17:54:21 +02:00
|
|
|
states);
|
|
|
|
|
|
|
|
|
|
if (srch_from
|
2023-01-19 19:23:45 +01:00
|
|
|
&& (!first_from_inst_exceptions_.empty()
|
|
|
|
|
|| !first_thru_inst_exceptions_.empty())) {
|
2018-09-28 17:54:21 +02:00
|
|
|
Instance *inst = network_->instance(pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (srch_from && !first_from_inst_exceptions_.empty())
|
|
|
|
|
srch_from &= exceptionFromStates(first_from_inst_exceptions_.findKey(inst),
|
2019-11-11 23:30:19 +01:00
|
|
|
pin, rf, min_max, include_filter,
|
2018-09-28 17:54:21 +02:00
|
|
|
states);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (srch_from && !first_thru_inst_exceptions_.empty())
|
|
|
|
|
srch_from &= exceptionFromStates(first_thru_inst_exceptions_.findKey(inst),
|
2019-11-11 23:30:19 +01:00
|
|
|
pin, rf, min_max, include_filter,
|
2018-09-28 17:54:21 +02:00
|
|
|
states);
|
|
|
|
|
}
|
|
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
if (srch_from && clk && !first_from_clk_exceptions_.empty())
|
|
|
|
|
srch_from &= exceptionFromStates(first_from_clk_exceptions_.findKey(clk),
|
2019-11-11 23:30:19 +01:00
|
|
|
pin, clk_rf, min_max, include_filter,
|
2018-09-28 17:54:21 +02:00
|
|
|
states);
|
|
|
|
|
if (!srch_from) {
|
|
|
|
|
delete states;
|
2019-03-13 01:25:53 +01:00
|
|
|
states = nullptr;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
return srch_from;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::exceptionFromStates(const ExceptionPathSet *exceptions,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool include_filter,
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
|
|
|
|
if (exceptions) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *exception : *exceptions) {
|
2018-09-28 17:54:21 +02:00
|
|
|
if (exception->matches(min_max, false)
|
2019-03-13 01:25:53 +01:00
|
|
|
&& (exception->from() == nullptr
|
2019-11-11 23:30:19 +01:00
|
|
|
|| exception->from()->transition()->matches(rf))
|
2018-09-28 17:54:21 +02:00
|
|
|
&& (include_filter || !exception->isFilter())) {
|
|
|
|
|
ExceptionState *state = exception->firstState();
|
2019-11-11 23:30:19 +01:00
|
|
|
if (state->matchesNextThru(nullptr, pin, rf, min_max, network_))
|
2018-09-28 17:54:21 +02:00
|
|
|
// -from clk -thru reg/clk
|
|
|
|
|
state = state->nextState();
|
|
|
|
|
// If the exception is -from and has no -to transition it is
|
|
|
|
|
// complete out of the gate.
|
|
|
|
|
if (state->isComplete()
|
|
|
|
|
&& exception->isFalse()) {
|
|
|
|
|
// Leave the completed false path state as a marker on the tag,
|
|
|
|
|
// but flush all other exception states because they are lower
|
|
|
|
|
// priority.
|
2019-03-13 01:25:53 +01:00
|
|
|
if (states == nullptr)
|
2024-07-25 17:18:36 +02:00
|
|
|
states = new ExceptionStateSet();
|
2018-09-28 17:54:21 +02:00
|
|
|
states->clear();
|
|
|
|
|
states->insert(state);
|
|
|
|
|
// No need to examine other exceptions from this
|
|
|
|
|
// pin/clock/instance.
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2019-03-13 01:25:53 +01:00
|
|
|
if (states == nullptr)
|
2024-07-25 17:18:36 +02:00
|
|
|
states = new ExceptionStateSet();
|
2018-09-28 17:54:21 +02:00
|
|
|
states->insert(state);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::exceptionFromClkStates(const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const Clock *clk,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *clk_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
|
|
|
|
if (pin) {
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_from_pin_exceptions_.empty())
|
|
|
|
|
exceptionFromStates(first_from_pin_exceptions_.findKey(pin),
|
2019-11-11 23:30:19 +01:00
|
|
|
nullptr, rf, min_max, true, states);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_from_inst_exceptions_.empty()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
Instance *inst = network_->instance(pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
exceptionFromStates(first_from_inst_exceptions_.findKey(inst),
|
2019-11-11 23:30:19 +01:00
|
|
|
pin, rf, min_max, true, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2024-08-26 02:05:34 +02:00
|
|
|
exceptionThruStates(first_thru_pin_exceptions_.findKey(pin),
|
|
|
|
|
rf, min_max, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_from_clk_exceptions_.empty())
|
|
|
|
|
exceptionFromStates(first_from_clk_exceptions_.findKey(clk),
|
2019-11-11 23:30:19 +01:00
|
|
|
pin, clk_rf, min_max, true, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::filterRegQStates(const Pin *to_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_from_pin_exceptions_.empty()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
const ExceptionPathSet *exceptions =
|
2023-01-19 19:23:45 +01:00
|
|
|
first_from_pin_exceptions_.findKey(to_pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
if (exceptions) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *exception : *exceptions) {
|
2018-09-28 17:54:21 +02:00
|
|
|
// Hack for filter -from reg/Q.
|
|
|
|
|
if (exception->isFilter()
|
2019-11-11 23:30:19 +01:00
|
|
|
&& exception->matchesFirstPt(to_rf, min_max)) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionState *state = exception->firstState();
|
2019-03-13 01:25:53 +01:00
|
|
|
if (states == nullptr)
|
2024-07-25 17:18:36 +02:00
|
|
|
states = new ExceptionStateSet();
|
2018-09-28 17:54:21 +02:00
|
|
|
states->insert(state);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2025-07-04 02:08:44 +02:00
|
|
|
void
|
2018-09-28 17:54:21 +02:00
|
|
|
Sdc::exceptionThruStates(const Pin *from_pin,
|
|
|
|
|
const Pin *to_pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *to_rf,
|
2025-07-04 02:08:44 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
ExceptionStateSet *&states) const
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
exceptionThruStates(first_thru_pin_exceptions_.findKey(to_pin),
|
|
|
|
|
to_rf, min_max, states);
|
|
|
|
|
if (!first_thru_edge_exceptions_.empty()) {
|
|
|
|
|
EdgePins edge_pins(from_pin, to_pin);
|
|
|
|
|
exceptionThruStates(first_thru_edge_exceptions_.findKey(edge_pins),
|
2019-11-11 23:30:19 +01:00
|
|
|
to_rf, min_max, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_thru_inst_exceptions_.empty()
|
2018-09-28 17:54:21 +02:00
|
|
|
&& (network_->direction(to_pin)->isAnyOutput()
|
|
|
|
|
|| network_->isLatchData(to_pin))) {
|
|
|
|
|
const Instance *to_inst = network_->instance(to_pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
exceptionThruStates(first_thru_inst_exceptions_.findKey(to_inst),
|
2019-11-11 23:30:19 +01:00
|
|
|
to_rf, min_max, states);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::exceptionThruStates(const ExceptionPathSet *exceptions,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *to_rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return value.
|
|
|
|
|
ExceptionStateSet *&states) const
|
|
|
|
|
{
|
|
|
|
|
if (exceptions) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *exception : *exceptions) {
|
2019-11-11 23:30:19 +01:00
|
|
|
if (exception->matchesFirstPt(to_rf, min_max)) {
|
2018-09-28 17:54:21 +02:00
|
|
|
ExceptionState *state = exception->firstState();
|
2019-03-13 01:25:53 +01:00
|
|
|
if (states == nullptr)
|
2024-07-25 17:18:36 +02:00
|
|
|
states = new ExceptionStateSet();
|
2018-09-28 17:54:21 +02:00
|
|
|
states->insert(state);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2025-10-30 16:53:36 +01:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
void
|
|
|
|
|
Sdc::exceptionTo(ExceptionPathType type,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool match_min_max_exactly,
|
|
|
|
|
// Return values.
|
|
|
|
|
ExceptionPath *&hi_priority_exception,
|
|
|
|
|
int &hi_priority) const
|
|
|
|
|
{
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_to_inst_exceptions_.empty()) {
|
2018-09-28 17:54:21 +02:00
|
|
|
Instance *inst = network_->instance(pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
exceptionTo(first_to_inst_exceptions_.findKey(inst), type, pin, rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_edge, min_max, match_min_max_exactly,
|
|
|
|
|
hi_priority_exception, hi_priority);
|
|
|
|
|
}
|
2023-01-19 19:23:45 +01:00
|
|
|
if (!first_to_pin_exceptions_.empty())
|
|
|
|
|
exceptionTo(first_to_pin_exceptions_.findKey(pin), type, pin, rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
clk_edge, min_max, match_min_max_exactly,
|
|
|
|
|
hi_priority_exception, hi_priority);
|
2023-01-19 19:23:45 +01:00
|
|
|
if (clk_edge && !first_to_clk_exceptions_.empty())
|
|
|
|
|
exceptionTo(first_to_clk_exceptions_.findKey(clk_edge->clock()),
|
2019-11-11 23:30:19 +01:00
|
|
|
type, pin, rf, clk_edge, min_max, match_min_max_exactly,
|
2018-09-28 17:54:21 +02:00
|
|
|
hi_priority_exception, hi_priority);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::exceptionTo(const ExceptionPathSet *to_exceptions,
|
|
|
|
|
ExceptionPathType type,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool match_min_max_exactly,
|
|
|
|
|
// Return values.
|
|
|
|
|
ExceptionPath *&hi_priority_exception,
|
|
|
|
|
int &hi_priority) const
|
|
|
|
|
{
|
|
|
|
|
if (to_exceptions) {
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *exception : *to_exceptions) {
|
2019-11-11 23:30:19 +01:00
|
|
|
exceptionTo(exception, type, pin, rf, clk_edge,
|
2018-09-28 17:54:21 +02:00
|
|
|
min_max, match_min_max_exactly,
|
|
|
|
|
hi_priority_exception, hi_priority);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::exceptionTo(ExceptionPath *exception,
|
|
|
|
|
ExceptionPathType type,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool match_min_max_exactly,
|
|
|
|
|
// Return values.
|
|
|
|
|
ExceptionPath *&hi_priority_exception,
|
|
|
|
|
int &hi_priority) const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
if ((type == ExceptionPathType::any
|
2018-09-28 17:54:21 +02:00
|
|
|
|| exception->type() == type)
|
2019-11-11 23:30:19 +01:00
|
|
|
&& exceptionMatchesTo(exception, pin, rf, clk_edge, min_max,
|
2018-09-28 17:54:21 +02:00
|
|
|
match_min_max_exactly, false)) {
|
|
|
|
|
int priority = exception->priority(min_max);
|
2019-03-13 01:25:53 +01:00
|
|
|
if (hi_priority_exception == nullptr
|
2018-09-28 17:54:21 +02:00
|
|
|
|| priority > hi_priority
|
|
|
|
|
|| (priority == hi_priority
|
|
|
|
|
&& exception->tighterThan(hi_priority_exception))) {
|
|
|
|
|
hi_priority = priority;
|
|
|
|
|
hi_priority_exception = exception;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::exceptionMatchesTo(ExceptionPath *exception,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool match_min_max_exactly,
|
|
|
|
|
bool require_to_pin) const
|
|
|
|
|
{
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
return exception->matches(min_max, match_min_max_exactly)
|
2019-03-13 01:25:53 +01:00
|
|
|
&& ((to == nullptr
|
2018-09-28 17:54:21 +02:00
|
|
|
&& !require_to_pin)
|
|
|
|
|
|| (to
|
2019-11-11 23:30:19 +01:00
|
|
|
&& to->matches(pin, clk_edge, rf, network_)));
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
Sdc::isCompleteTo(ExceptionState *state,
|
|
|
|
|
const Pin *pin,
|
2019-11-11 23:30:19 +01:00
|
|
|
const RiseFall *rf,
|
2018-09-28 17:54:21 +02:00
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
bool match_min_max_exactly,
|
|
|
|
|
bool require_to_pin) const
|
|
|
|
|
{
|
2019-03-13 01:25:53 +01:00
|
|
|
return state->nextThru() == nullptr
|
2019-11-11 23:30:19 +01:00
|
|
|
&& exceptionMatchesTo(state->exception(), pin, rf, clk_edge,
|
2018-09-28 17:54:21 +02:00
|
|
|
min_max, match_min_max_exactly, require_to_pin);
|
|
|
|
|
}
|
|
|
|
|
|
2022-08-09 06:33:58 +02:00
|
|
|
bool
|
|
|
|
|
Sdc::isCompleteTo(ExceptionState *state,
|
|
|
|
|
const Pin *pin,
|
|
|
|
|
const RiseFall *rf,
|
|
|
|
|
const MinMax *min_max) const
|
|
|
|
|
{
|
|
|
|
|
ExceptionPath *exception = state->exception();
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
return state->nextThru() == nullptr
|
|
|
|
|
&& to
|
|
|
|
|
&& exception->matches(min_max, true)
|
|
|
|
|
&& to->matches(pin, rf, network_);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2025-10-30 16:53:36 +01:00
|
|
|
void
|
|
|
|
|
Sdc::groupPathsTo(const Pin *pin,
|
|
|
|
|
const RiseFall *rf,
|
|
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return value.
|
|
|
|
|
ExceptionPathSeq &group_paths) const
|
|
|
|
|
{
|
|
|
|
|
if (!first_to_inst_exceptions_.empty()) {
|
|
|
|
|
Instance *inst = network_->instance(pin);
|
|
|
|
|
groupPathsTo(first_to_inst_exceptions_.findKey(inst), pin, rf,
|
|
|
|
|
clk_edge, min_max, group_paths);
|
|
|
|
|
}
|
|
|
|
|
if (!first_to_pin_exceptions_.empty())
|
|
|
|
|
groupPathsTo(first_to_pin_exceptions_.findKey(pin), pin, rf,
|
|
|
|
|
clk_edge, min_max, group_paths);
|
|
|
|
|
if (clk_edge && !first_to_clk_exceptions_.empty())
|
|
|
|
|
groupPathsTo(first_to_clk_exceptions_.findKey(clk_edge->clock()),
|
|
|
|
|
pin, rf, clk_edge, min_max, group_paths);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::groupPathsTo(const ExceptionPathSet *to_exceptions,
|
|
|
|
|
const Pin *pin,
|
|
|
|
|
const RiseFall *rf,
|
|
|
|
|
const ClockEdge *clk_edge,
|
|
|
|
|
const MinMax *min_max,
|
|
|
|
|
// Return value.
|
|
|
|
|
ExceptionPathSeq &group_paths) const
|
|
|
|
|
{
|
|
|
|
|
if (to_exceptions) {
|
|
|
|
|
for (ExceptionPath *exception : *to_exceptions) {
|
|
|
|
|
if (exception->isGroupPath()
|
|
|
|
|
&& exceptionMatchesTo(exception, pin, rf, clk_edge, min_max, true, false))
|
|
|
|
|
group_paths.push_back(exception);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
Wireload *
|
|
|
|
|
Sdc::wireload(const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
return wireload_[min_max->index()];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setWireload(Wireload *wireload,
|
|
|
|
|
const MinMaxAll *min_max)
|
|
|
|
|
{
|
2019-07-18 15:19:00 +02:00
|
|
|
for (auto mm_index : min_max->rangeIndex())
|
|
|
|
|
wireload_[mm_index] = wireload;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setWireloadMode(WireloadMode mode)
|
|
|
|
|
{
|
|
|
|
|
wireload_mode_ = mode;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
WireloadMode
|
|
|
|
|
Sdc::wireloadMode()
|
|
|
|
|
{
|
|
|
|
|
return wireload_mode_;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
const WireloadSelection *
|
|
|
|
|
Sdc::wireloadSelection(const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
const WireloadSelection *sel = wireload_selection_[min_max->index()];
|
2019-03-13 01:25:53 +01:00
|
|
|
if (sel == nullptr) {
|
2018-09-28 17:54:21 +02:00
|
|
|
// Look for a default.
|
|
|
|
|
LibertyLibrary *lib = network_->defaultLibertyLibrary();
|
|
|
|
|
if (lib) {
|
|
|
|
|
WireloadSelection *default_sel = lib->defaultWireloadSelection();
|
|
|
|
|
if (default_sel) {
|
|
|
|
|
sel = default_sel;
|
|
|
|
|
setWireloadSelection(default_sel, MinMaxAll::all());
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return sel;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
Sdc::setWireloadSelection(WireloadSelection *selection,
|
|
|
|
|
const MinMaxAll *min_max)
|
|
|
|
|
{
|
2019-07-18 15:19:00 +02:00
|
|
|
for (auto mm_index : min_max->rangeIndex())
|
|
|
|
|
wireload_selection_[mm_index] = selection;
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::connectPinAfter(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2020-11-14 18:34:26 +01:00
|
|
|
if (have_thru_hpin_exceptions_) {
|
|
|
|
|
PinSet *drvrs = network_->drivers(pin);
|
2023-01-19 19:23:45 +01:00
|
|
|
for (ExceptionPath *exception : exceptions_) {
|
2020-11-14 18:34:26 +01:00
|
|
|
ExceptionPt *first_pt = exception->firstPt();
|
2023-04-13 02:30:04 +02:00
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
if (thrus) {
|
|
|
|
|
for (ExceptionThru *thru : *exception->thrus()) {
|
|
|
|
|
if (thru->edges()) {
|
|
|
|
|
thru->connectPinAfter(drvrs, network_);
|
|
|
|
|
if (first_pt == thru)
|
|
|
|
|
recordExceptionEdges(exception, thru->edges(),
|
|
|
|
|
first_thru_edge_exceptions_);
|
|
|
|
|
}
|
2020-11-14 18:34:26 +01:00
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::disconnectPinBefore(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2025-10-31 18:36:57 +01:00
|
|
|
auto itr = pin_exceptions_.find(pin);
|
|
|
|
|
if (itr != pin_exceptions_.end()) {
|
|
|
|
|
for (ExceptionPath *exception : *itr->second) {
|
|
|
|
|
ExceptionFrom *from = exception->from();
|
|
|
|
|
if (from)
|
|
|
|
|
from->disconnectPinBefore(pin, network_);
|
|
|
|
|
ExceptionTo *to = exception->to();
|
|
|
|
|
if (to)
|
|
|
|
|
to->disconnectPinBefore(pin, network_);
|
2020-11-14 18:34:26 +01:00
|
|
|
ExceptionPt *first_pt = exception->firstPt();
|
2023-04-13 02:30:04 +02:00
|
|
|
ExceptionThruSeq *thrus = exception->thrus();
|
|
|
|
|
if (thrus) {
|
2025-10-31 18:36:57 +01:00
|
|
|
for (ExceptionThru *thru : *exception->thrus()) {
|
|
|
|
|
thru->disconnectPinBefore(pin, network_);
|
|
|
|
|
if (thru == first_pt)
|
|
|
|
|
recordExceptionEdges(exception, thru->edges(),
|
|
|
|
|
first_thru_edge_exceptions_);
|
|
|
|
|
}
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
}
|
2025-10-31 18:36:57 +01:00
|
|
|
first_from_pin_exceptions_.erase(pin);
|
|
|
|
|
first_thru_pin_exceptions_.erase(pin);
|
|
|
|
|
first_to_pin_exceptions_.erase(pin);
|
|
|
|
|
pin_exceptions_.erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
2025-10-31 18:36:57 +01:00
|
|
|
|
2023-04-20 03:12:32 +02:00
|
|
|
for (int corner_index = 0; corner_index < corners_->count(); corner_index++)
|
|
|
|
|
drvr_pin_wire_cap_maps_[corner_index].erase(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
Sdc::clkHpinDisablesChanged(const Pin *pin)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
2019-10-25 17:51:59 +02:00
|
|
|
if (isLeafPinClock(pin))
|
2018-09-28 17:54:21 +02:00
|
|
|
clkHpinDisablesInvalid();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
2019-10-25 17:51:59 +02:00
|
|
|
// Find the leaf load pins corresponding to pin.
|
|
|
|
|
// If the pin is hierarchical, the leaf pins are:
|
2018-09-28 17:54:21 +02:00
|
|
|
// hierarchical input - load pins inside the hierarchical instance
|
|
|
|
|
// hierarchical output - load pins outside the hierarchical instance
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
findLeafLoadPins(const Pin *pin,
|
2019-10-25 17:51:59 +02:00
|
|
|
const Network *network,
|
|
|
|
|
PinSet *leaf_pins)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if (network->isHierarchical(pin)) {
|
|
|
|
|
PortDirection *dir = network->direction(pin);
|
|
|
|
|
bool is_input = dir->isAnyInput();
|
|
|
|
|
bool is_output = dir->isAnyOutput();
|
|
|
|
|
const Instance *hinst = network->instance(pin);
|
|
|
|
|
PinConnectedPinIterator *pin_iter = network->connectedPinIterator(pin);
|
|
|
|
|
while (pin_iter->hasNext()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *pin1 = pin_iter->next();
|
2018-09-28 17:54:21 +02:00
|
|
|
bool is_inside = network->isInside(pin1, hinst);
|
|
|
|
|
if (((is_input && is_inside)
|
|
|
|
|
|| (is_output && !is_inside))
|
|
|
|
|
&& network->isLoad(pin1))
|
2019-10-25 17:51:59 +02:00
|
|
|
leaf_pins->insert(pin1);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
delete pin_iter;
|
|
|
|
|
}
|
|
|
|
|
else
|
2019-10-25 17:51:59 +02:00
|
|
|
leaf_pins->insert(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2019-10-25 17:51:59 +02:00
|
|
|
// Find the leaf driver pins corresponding to pin.
|
|
|
|
|
// If the pin is hierarchical, the leaf pins are:
|
2018-09-28 17:54:21 +02:00
|
|
|
// hierarchical input - driver pins outside the hierarchical instance
|
|
|
|
|
// hierarchical output - driver pins inside the hierarchical instance
|
|
|
|
|
void
|
2023-01-19 19:23:45 +01:00
|
|
|
findLeafDriverPins(const Pin *pin,
|
2019-10-25 17:51:59 +02:00
|
|
|
const Network *network,
|
|
|
|
|
PinSet *leaf_pins)
|
2018-09-28 17:54:21 +02:00
|
|
|
{
|
|
|
|
|
if (network->isHierarchical(pin)) {
|
|
|
|
|
PortDirection *dir = network->direction(pin);
|
|
|
|
|
bool is_input = dir->isAnyInput();
|
|
|
|
|
bool is_output = dir->isAnyOutput();
|
|
|
|
|
const Instance *hinst = network->instance(pin);
|
|
|
|
|
PinConnectedPinIterator *pin_iter = network->connectedPinIterator(pin);
|
|
|
|
|
while (pin_iter->hasNext()) {
|
2023-01-19 19:23:45 +01:00
|
|
|
const Pin *pin1 = pin_iter->next();
|
2018-09-28 17:54:21 +02:00
|
|
|
bool is_inside = network->isInside(pin1, hinst);
|
|
|
|
|
if (((is_input && !is_inside)
|
|
|
|
|
|| (is_output && is_inside))
|
|
|
|
|
&& network->isDriver(pin1))
|
2019-10-25 17:51:59 +02:00
|
|
|
leaf_pins->insert(pin1);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
delete pin_iter;
|
|
|
|
|
}
|
|
|
|
|
else
|
2019-10-25 17:51:59 +02:00
|
|
|
leaf_pins->insert(pin);
|
2018-09-28 17:54:21 +02:00
|
|
|
}
|
|
|
|
|
|
2024-11-14 02:44:46 +01:00
|
|
|
////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
|
|
NetWireCaps::NetWireCaps() :
|
|
|
|
|
subtract_pin_cap_{false, false}
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bool
|
|
|
|
|
NetWireCaps::subtractPinCap(const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
return subtract_pin_cap_[min_max->index()];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
NetWireCaps::setSubtractPinCap(bool subtrace_pin_cap,
|
|
|
|
|
const MinMax *min_max)
|
|
|
|
|
{
|
|
|
|
|
subtract_pin_cap_[min_max->index()] = subtrace_pin_cap;
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-28 17:54:21 +02:00
|
|
|
} // namespace
|