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ucsd 20190410 seg fault accessing/setting power_default_signal_toggle_rate

This commit is contained in:
James Cherry 2019-04-10 20:36:48 -07:00
parent fcfec7ae54
commit 2d519b4740
61 changed files with 834 additions and 1596 deletions
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32
CMakeLists.txt
View File

@ -21,6 +21,7 @@ project(STA VERSION 2.0.13)
set(CMAKE_VERBOSE_MAKEFILE ON)
set(CMAKE_CXX_STANDARD 11)
set(CMAKE_CXX_STANDARD_REQUIRED ON)
# Disable compiler specific extensions like gnu++11.
set(CMAKE_CXX_EXTENSIONS OFF)
set(STA_HOME ${PROJECT_SOURCE_DIR})
@ -31,15 +32,20 @@ if(NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE RELEASE)
endif()
message(STATUS "Host system: ${CMAKE_HOST_SYSTEM}")
message(STATUS "Compiler version: ${CMAKE_CXX_COMPILER_VERSION}")
message(STATUS "Compiler ID: ${CMAKE_CXX_COMPILER_ID}")
message(STATUS "Compiler path: ${CMAKE_CXX_COMPILER}")
message(STATUS "Build type: ${CMAKE_BUILD_TYPE}")
# Compiler specific options.
if (CMAKE_CXX_COMPILER_ID MATCHES AppleClang|Clang|GNU)
set(STA_COMPILE_OPTIONS -Wall -Wcast-qual -Wunused-parameter -Wredundant-decls -Wno-deprecated-register)
endif()
if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
set(STA_COMPILE_OPTIONS -Wall -Wcast-qual -Wunused-parameter -Wredundant-decls -Wno-deprecated-register)
endif()
message(STATUS "System name: ${CMAKE_SYSTEM_NAME}")
message(STATUS "CXX flags DEBUG: ${CMAKE_CXX_FLAGS_DEBUG}")
message(STATUS "CXX flags RELEASE: ${CMAKE_CXX_FLAGS_RELEASE}")
message(STATUS "CXX flags RELWITHDEBINFO: ${CMAKE_CXX_FLAGS_RELWITHDEBINFO}")
message(STATUS "Compiler: ${CMAKE_CXX_COMPILER_ID} ${CMAKE_CXX_COMPILER_VERSION}")
message(STATUS "Build type: ${CMAKE_BUILD_TYPE}")
message(STATUS "Build CXX_FLAGS: ${CMAKE_CXX_FLAGS_${CMAKE_BUILD_TYPE}}")
message(STATUS "STA CXX_FLAGS: ${STA_COMPILE_OPTIONS}")
message(STATUS "Install prefix: ${CMAKE_INSTALL_PREFIX}")
################################################################
@ -693,16 +699,8 @@ endif()
message(STATUS "STA executable: ${STA_HOME}/app/sta")
# Compiler specific options.
if (CMAKE_CXX_COMPILER_ID MATCHES AppleClang|Clang|GNU)
set(STA_COMPILE_OPTIONS -Wall -Wcast-qual -Wunused-parameter -Wredundant-decls -Wno-deprecated-register)
endif()
# g++ still needs -pthreads when using std::thread
# g++ std::thread apparently still needs -pthreads.
if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
set(STA_COMPILE_OPTIONS -Wall -Wcast-qual -Wunused-parameter -Wredundant-decls -Wno-deprecated-register)
target_link_libraries(sta -pthread)
endif()

20
dcalc/ArcDelayCalc.hh
View File

@ -52,21 +52,9 @@ public:
// Find the parasitic for drvr_pin that is acceptable to the delay
// calculator by probing parasitics_.
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish) = 0;
// Call after the parasitic returned by findParasitic is no longer
// needed. This gives the arc delay calculator a chance to delete
// temporary estimated or reduced parasitics. The default action is
// to do nothing.
virtual void finish(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
Parasitic *parasitic,
bool delete_at_finish) = 0;
virtual Parasitic *findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap) = 0;
// Find the wire delays and slews for an input port without a driving cell.
// This call primarily initializes the load delay/slew iterator.
@ -140,6 +128,8 @@ public:
const DcalcAnalysisPt *dcalc_ap,
int digits,
string *result) = 0;
virtual void finishDrvrPin() = 0;
protected:
GateTimingModel *gateModel(TimingArc *arc,
const DcalcAnalysisPt *dcalc_ap) const;

46
dcalc/ArnoldiDelayCalc.cc
View File

@ -113,12 +113,9 @@ public:
ArnoldiDelayCalc(StaState *sta);
virtual ~ArnoldiDelayCalc();
virtual ArcDelayCalc *copy();
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish);
virtual Parasitic *findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap);
virtual void gateDelay(const LibertyCell *drvr_cell,
TimingArc *arc,
const Slew &in_slew,
@ -261,25 +258,21 @@ ArnoldiDelayCalc::~ArnoldiDelayCalc()
delete reduce_;
}
void
Parasitic *
ArnoldiDelayCalc::findParasitic(const Pin *drvr_pin,
const TransRiseFall *drvr_tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish)
const DcalcAnalysisPt *dcalc_ap)
{
parasitic = nullptr;
delete_at_finish = false;
// set_load has precidence over parasitics.
if (!sdc_->drvrPinHasWireCap(drvr_pin)) {
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
const Corner *corner = dcalc_ap->corner();
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
const ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
Parasitic *parasitic_network =
parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
bool delete_parasitic_network = false;
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
const Corner *corner = dcalc_ap->corner();
if (parasitic_network == nullptr) {
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
@ -287,27 +280,28 @@ ArnoldiDelayCalc::findParasitic(const Pin *drvr_pin,
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, drvr_tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic_network = parasitics_->makeWireloadNetwork(drvr_pin,
wireload,
fanout,
op_cond,
parasitic_network = parasitics_->makeWireloadNetwork(drvr_pin, wireload,
fanout, op_cond,
parasitic_ap);
delete_parasitic_network = true;
}
}
if (parasitic_network) {
parasitic = reduce_->reduceToArnoldi(parasitic_network,
drvr_pin,
parasitic_ap->couplingCapFactor(),
drvr_tr, op_cond, corner,
cnst_min_max, parasitic_ap);
Parasitic *parasitic = reduce_->reduceToArnoldi(parasitic_network,
drvr_pin,
parasitic_ap->couplingCapFactor(),
drvr_tr, op_cond, corner,
cnst_min_max, parasitic_ap);
if (delete_parasitic_network) {
Net *net = network_->net(drvr_pin);
parasitics_->deleteParasiticNetwork(net, parasitic_ap);
}
delete_at_finish = true;
reduced_parasitic_drvrs_.push_back(drvr_pin);
return parasitic;
}
}
return nullptr;
}
void

88
dcalc/DmpDelayCalc.cc
View File

@ -126,12 +126,9 @@ class DmpCeffTwoPoleDelayCalc : public DmpCeffDelayCalc
public:
DmpCeffTwoPoleDelayCalc(StaState *sta);
virtual ArcDelayCalc *copy();
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish);
virtual Parasitic *findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap);
virtual void inputPortDelay(const Pin *port_pin,
float in_slew,
const TransRiseFall *tr,
@ -198,54 +195,57 @@ DmpCeffTwoPoleDelayCalc::copy()
return new DmpCeffTwoPoleDelayCalc(this);
}
void
Parasitic *
DmpCeffTwoPoleDelayCalc::findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish)
const DcalcAnalysisPt *dcalc_ap)
{
parasitic = nullptr;
delete_at_finish = false;
// set_load has precidence over parasitics.
if (!sdc_->drvrPinHasWireCap(drvr_pin)) {
const ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
const Corner *corner = dcalc_ap->corner();
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
// Prefer PiPoleResidue.
parasitic = parasitics_->findPiPoleResidue(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr) {
Parasitic *parasitic_network =
parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
if (parasitic_network)
parasitic = parasitics_->reduceToPiPoleResidue2(parasitic_network,
drvr_pin,
tr, op_cond, corner,
cnst_min_max,
parasitic_ap);
delete_at_finish = true;
Parasitic *parasitic = parasitics_->findPiPoleResidue(drvr_pin, tr,
parasitic_ap);
if (parasitic)
return parasitic;
parasitic = parasitics_->findPiElmore(drvr_pin, tr, parasitic_ap);
if (parasitic)
return parasitic;
Parasitic *parasitic_network =
parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
if (parasitic_network) {
parasitics_->reduceToPiPoleResidue2(parasitic_network, drvr_pin,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
dcalc_ap->constraintMinMax(),
parasitic_ap);
parasitic = parasitics_->findPiPoleResidue(drvr_pin, tr, parasitic_ap);
reduced_parasitic_drvrs_.push_back(drvr_pin);
return parasitic;
}
if (parasitic == nullptr)
parasitic = parasitics_->findPiElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr)
parasitic = parasitics_->findLumpedElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr) {
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
float pin_cap, wire_cap, fanout;
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic = parasitics_->estimatePiElmore(drvr_pin, tr, wireload,
fanout, pin_cap,
op_cond, corner,cnst_min_max,
parasitic_ap);
delete_at_finish = true;
}
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
float pin_cap, wire_cap, fanout;
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic = parasitics_->estimatePiElmore(drvr_pin, tr, wireload,
fanout, pin_cap,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
cnst_min_max,
parasitic_ap);
// Estimated parasitics are not recorded in the "database", so
// it for deletion after the drvr pin delay calc is finished.
unsaved_parasitics_.push_back(parasitic);
return parasitic;
}
}
return nullptr;
}
void

130
dcalc/GraphDelayCalc1.cc
View File

@ -348,11 +348,11 @@ GraphDelayCalc1::deleteVertexBefore(Vertex *vertex)
{
iter_->deleteVertexBefore(vertex);
if (incremental_)
invalid_delays_.eraseKey(vertex);
invalid_delays_.erase(vertex);
MultiDrvrNet *multi_drvr = multiDrvrNet(vertex);
if (multi_drvr) {
multi_drvr->drvrs()->eraseKey(vertex);
multi_drvr_net_map_.eraseKey(vertex);
multi_drvr->drvrs()->erase(vertex);
multi_drvr_net_map_.erase(vertex);
}
}
@ -649,10 +649,7 @@ GraphDelayCalc1::seedNoDrvrCellSlew(Vertex *drvr_vertex,
Delay drive_delay = delay_zero;
float drive_res;
drive->driveResistance(tr, cnst_min_max, drive_res, exists);
Parasitic *parasitic;
bool delete_parasitic;
arc_delay_calc->findParasitic(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
Parasitic *parasitic = arc_delay_calc->findParasitic(drvr_pin, tr, dcalc_ap);
if (exists) {
float cap = loadCap(drvr_pin, parasitic, tr, dcalc_ap);
drive_delay = cap * drive_res;
@ -665,8 +662,6 @@ GraphDelayCalc1::seedNoDrvrCellSlew(Vertex *drvr_vertex,
parasitic, dcalc_ap);
annotateLoadDelays(drvr_vertex, tr, drive_delay, false, dcalc_ap,
arc_delay_calc);
arc_delay_calc->finish(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
}
void
@ -687,16 +682,11 @@ GraphDelayCalc1::seedNoDrvrSlew(Vertex *drvr_vertex,
}
if (!drvr_vertex->slewAnnotated(tr, slew_min_max))
graph_->setSlew(drvr_vertex, tr, ap_index, slew);
Parasitic *parasitic;
bool delete_parasitic;
arc_delay_calc->findParasitic(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
Parasitic *parasitic = arc_delay_calc->findParasitic(drvr_pin, tr, dcalc_ap);
arc_delay_calc->inputPortDelay(drvr_pin, delayAsFloat(slew), tr,
parasitic, dcalc_ap);
annotateLoadDelays(drvr_vertex, tr, delay_zero, false, dcalc_ap,
arc_delay_calc);
arc_delay_calc->finish(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
}
void
@ -827,10 +817,8 @@ GraphDelayCalc1::findInputArcDelay(LibertyCell *drvr_cell,
if (drvr_tr) {
DcalcAPIndex ap_index = dcalc_ap->index();
const Pvt *pvt = dcalc_ap->operatingConditions();
Parasitic *drvr_parasitic;
bool delete_parasitic;
arc_delay_calc_->findParasitic(drvr_pin, drvr_tr, dcalc_ap,
drvr_parasitic, delete_parasitic);
Parasitic *drvr_parasitic = arc_delay_calc_->findParasitic(drvr_pin, drvr_tr,
dcalc_ap);
float load_cap = loadCap(drvr_pin, drvr_parasitic, drvr_tr, dcalc_ap);
ArcDelay intrinsic_delay;
@ -855,8 +843,6 @@ GraphDelayCalc1::findInputArcDelay(LibertyCell *drvr_cell,
graph_->setSlew(drvr_vertex, drvr_tr, ap_index, gate_slew);
annotateLoadDelays(drvr_vertex, drvr_tr, load_delay, false, dcalc_ap,
arc_delay_calc_);
arc_delay_calc_->finish(drvr_pin, drvr_tr, dcalc_ap,
drvr_parasitic, delete_parasitic);
}
}
@ -932,10 +918,10 @@ bool
GraphDelayCalc1::findDriverDelays(Vertex *drvr_vertex,
ArcDelayCalc *arc_delay_calc)
{
bool delay_changed = false;
MultiDrvrNet *multi_drvr = multiDrvrNet(drvr_vertex);
if (multi_drvr) {
Vertex *dcalc_drvr = multi_drvr->dcalcDrvr();
bool delay_changed = false;
if (drvr_vertex == dcalc_drvr) {
bool init_load_slews = true;
VertexSet::Iterator drvr_iter(multi_drvr->drvrs());
@ -948,10 +934,11 @@ GraphDelayCalc1::findDriverDelays(Vertex *drvr_vertex,
init_load_slews = false;
}
}
return delay_changed;
}
else
return findDriverDelays1(drvr_vertex, true, nullptr, arc_delay_calc);
delay_changed = findDriverDelays1(drvr_vertex, true, nullptr, arc_delay_calc);
arc_delay_calc->finishDrvrPin();
return delay_changed;
}
bool
@ -1027,29 +1014,21 @@ GraphDelayCalc1::findDriverEdgeDelays(LibertyCell *drvr_cell,
while (arc_iter.hasNext()) {
TimingArc *arc = arc_iter.next();
const TransRiseFall *tr = arc->toTrans()->asRiseFall();
Parasitic *parasitic;
bool delete_parasitic;
arc_delay_calc->findParasitic(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
Parasitic *parasitic = arc_delay_calc->findParasitic(drvr_pin, tr,
dcalc_ap);
float related_out_cap = 0.0;
if (related_out_pin) {
Parasitic *related_out_parasitic;
bool delete_related;
arc_delay_calc->findParasitic(related_out_pin, tr, dcalc_ap,
related_out_parasitic, delete_related);
Parasitic *related_out_parasitic =
arc_delay_calc->findParasitic(related_out_pin, tr, dcalc_ap);
related_out_cap = loadCap(related_out_pin,
related_out_parasitic,
tr, dcalc_ap);
arc_delay_calc->finish(related_out_pin, 0, dcalc_ap,
related_out_parasitic, delete_related);
}
delay_changed |= findArcDelay(drvr_cell, drvr_pin, drvr_vertex,
multi_drvr, arc, parasitic,
related_out_cap,
in_vertex, edge, pvt, dcalc_ap,
arc_delay_calc);
arc_delay_calc->finish(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
}
}
@ -1065,14 +1044,10 @@ GraphDelayCalc1::loadCap(const Pin *drvr_pin,
const TransRiseFall *drvr_tr,
const DcalcAnalysisPt *dcalc_ap) const
{
Parasitic *drvr_parasitic;
bool delete_parasitic;
arc_delay_calc_->findParasitic(drvr_pin, drvr_tr, dcalc_ap,
drvr_parasitic, delete_parasitic);
float load_cap = loadCap(drvr_pin, nullptr, drvr_parasitic, drvr_tr, dcalc_ap);
arc_delay_calc_->finish(drvr_pin, drvr_tr, dcalc_ap,
drvr_parasitic, delete_parasitic);
return load_cap;
Parasitic *drvr_parasitic = arc_delay_calc_->findParasitic(drvr_pin, drvr_tr,
dcalc_ap);
float cap = loadCap(drvr_pin, nullptr, drvr_parasitic, drvr_tr, dcalc_ap);
return cap;
}
float
@ -1130,8 +1105,7 @@ GraphDelayCalc1::loadCap(Parasitic *drvr_parasitic,
{
// set_load has precidence over parasitics.
if (!has_set_load && drvr_parasitic) {
if (parasitics_->isLumpedElmore(drvr_parasitic)
|| parasitics_->isParasiticNetwork(drvr_parasitic))
if (parasitics_->isParasiticNetwork(drvr_parasitic))
wire_cap += parasitics_->capacitance(drvr_parasitic);
else {
// PiModel includes both pin and external caps.
@ -1380,28 +1354,20 @@ GraphDelayCalc1::findMultiDrvrGateDelay(MultiDrvrNet *multi_drvr,
arc_delay_calc->gateDelay(drvr_cell1, arc1, from_slew1,
0.0, 0, 0.0, pvt, dcalc_ap,
intrinsic_delay1, intrinsic_slew1);
Parasitic *parasitic1;
bool delete_parasitic1;
arc_delay_calc->findParasitic(drvr_pin1, drvr_tr1, dcalc_ap,
parasitic1, delete_parasitic1);
Parasitic *parasitic1 =
arc_delay_calc->findParasitic(drvr_pin1, drvr_tr1, dcalc_ap);
const Pin *related_out_pin1 = 0;
float related_out_cap1 = 0.0;
if (related_out_port) {
Instance *inst1 = network_->instance(drvr_pin1);
related_out_pin1 = network_->findPin(inst1, related_out_port);
if (related_out_pin1) {
Parasitic *related_out_parasitic1;
bool delete_related1 = false;
arc_delay_calc->findParasitic(related_out_pin1, drvr_tr,
dcalc_ap,
related_out_parasitic1,
delete_related1);
Parasitic *related_out_parasitic1 =
arc_delay_calc->findParasitic(related_out_pin1, drvr_tr,
dcalc_ap);
related_out_cap1 = loadCap(related_out_pin1,
related_out_parasitic1,
drvr_tr, dcalc_ap);
arc_delay_calc->finish(related_out_pin1, drvr_tr, dcalc_ap,
related_out_parasitic1,
delete_related1);
}
}
float load_cap1 = loadCap(drvr_pin1, parasitic1,
@ -1414,8 +1380,6 @@ GraphDelayCalc1::findMultiDrvrGateDelay(MultiDrvrNet *multi_drvr,
gate_delay1, gate_slew1);
delay_sum += 1.0F / (gate_delay1 - intrinsic_delay1);
slew_sum += 1.0F / gate_slew1;
arc_delay_calc->finish(drvr_pin1, drvr_tr1, dcalc_ap,
parasitic1, delete_parasitic1);
}
}
}
@ -1602,16 +1566,11 @@ GraphDelayCalc1::findCheckEdgeDelays(Edge *edge,
delayAsString(to_slew, this));
float related_out_cap = 0.0;
if (related_out_pin) {
Parasitic *related_out_parasitic;
bool delete_related;
arc_delay_calc->findParasitic(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic,
delete_related);
Parasitic *related_out_parasitic =
arc_delay_calc->findParasitic(related_out_pin, to_tr, dcalc_ap);
related_out_cap = loadCap(related_out_pin,
related_out_parasitic,
to_tr, dcalc_ap);
arc_delay_calc->finish(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic, delete_related);
}
ArcDelay check_delay;
arc_delay_calc->checkDelay(cell, arc,
@ -1628,6 +1587,7 @@ GraphDelayCalc1::findCheckEdgeDelays(Edge *edge,
}
}
}
if (delay_changed && observer_)
observer_->checkDelayChangedTo(to_vertex);
}
@ -1761,26 +1721,19 @@ GraphDelayCalc1::ceff(Edge *edge,
related_out_pin = network_->findPin(inst, related_out_port);
float related_out_cap = 0.0;
if (related_out_pin) {
Parasitic *related_out_parasitic;
bool delete_related;
arc_delay_calc_->findParasitic(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic, delete_related);
Parasitic *related_out_parasitic =
arc_delay_calc_->findParasitic(related_out_pin, to_tr, dcalc_ap);
related_out_cap = loadCap(related_out_pin, related_out_parasitic,
to_tr, dcalc_ap);
arc_delay_calc_->finish(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic, delete_related);
}
Parasitic *to_parasitic;
bool delete_to_parasitic;
arc_delay_calc_->findParasitic(to_pin, to_tr, dcalc_ap,
to_parasitic, delete_to_parasitic);
Parasitic *to_parasitic = arc_delay_calc_->findParasitic(to_pin, to_tr,
dcalc_ap);
const Slew &from_slew = edgeFromSlew(from_vertex, from_tr, edge, dcalc_ap);
float load_cap = loadCap(to_pin, to_parasitic, to_tr, dcalc_ap);
ceff = arc_delay_calc_->ceff(cell, arc,
from_slew, load_cap, to_parasitic,
related_out_cap, pvt, dcalc_ap);
arc_delay_calc_->finish(to_pin, to_tr, dcalc_ap,
to_parasitic, delete_to_parasitic);
arc_delay_calc_->finishDrvrPin();
}
return ceff;
}
@ -1815,14 +1768,10 @@ GraphDelayCalc1::reportDelayCalc(Edge *edge,
related_out_pin = network_->findPin(inst, related_out_port);
float related_out_cap = 0.0;
if (related_out_pin) {
Parasitic *related_out_parasitic;
bool delete_related;
arc_delay_calc_->findParasitic(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic, delete_related);
Parasitic *related_out_parasitic =
arc_delay_calc_->findParasitic(related_out_pin, to_tr, dcalc_ap);
related_out_cap = loadCap(related_out_pin, related_out_parasitic,
to_tr, dcalc_ap);
arc_delay_calc_->finish(related_out_pin, to_tr, dcalc_ap,
related_out_parasitic, delete_related);
}
if (role->isTimingCheck()) {
const Slew &from_slew = checkEdgeClkSlew(from_vertex, from_tr, dcalc_ap);
@ -1835,19 +1784,16 @@ GraphDelayCalc1::reportDelayCalc(Edge *edge,
digits, result);
}
else {
Parasitic *to_parasitic;
bool delete_to_parasitic;
arc_delay_calc_->findParasitic(to_pin, to_tr, dcalc_ap,
to_parasitic, delete_to_parasitic);
Parasitic *to_parasitic =
arc_delay_calc_->findParasitic(to_pin, to_tr, dcalc_ap);
const Slew &from_slew = edgeFromSlew(from_vertex, from_tr, edge, dcalc_ap);
float load_cap = loadCap(to_pin, to_parasitic, to_tr, dcalc_ap);
arc_delay_calc_->reportGateDelay(cell, arc,
from_slew, load_cap, to_parasitic,
related_out_cap, pvt, dcalc_ap,
digits, result);
arc_delay_calc_->finish(to_pin, to_tr, dcalc_ap,
to_parasitic, delete_to_parasitic);
}
arc_delay_calc_->finishDrvrPin();
}
return result;
}

93
dcalc/LumpedCapDelayCalc.cc
View File

@ -46,68 +46,63 @@ LumpedCapDelayCalc::copy()
return new LumpedCapDelayCalc(this);
}
void
Parasitic *
LumpedCapDelayCalc::findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish)
const DcalcAnalysisPt *dcalc_ap)
{
parasitic = nullptr;
delete_at_finish = false;
// set_load has precidence over parasitics.
if (!sdc_->drvrPinHasWireCap(drvr_pin)) {
const ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
// Prefer capacitive load.
parasitic = parasitics_->findLumpedElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr)
parasitic = parasitics_->findPiElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr) {
parasitic = parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
if (parasitic) {
parasitic = parasitics_->reduceToPiElmore(parasitic, drvr_pin, tr,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
dcalc_ap->constraintMinMax(),
parasitic_ap);
delete_at_finish = true;
}
// Prefer PiElmore.
Parasitic *parasitic = parasitics_->findPiElmore(drvr_pin, tr,parasitic_ap);
if (parasitic)
return parasitic;
Parasitic *parasitic_network =
parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
if (parasitic_network) {
parasitics_->reduceToPiElmore(parasitic_network, drvr_pin,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
dcalc_ap->constraintMinMax(),
parasitic_ap);
parasitic = parasitics_->findPiElmore(drvr_pin, tr,parasitic_ap);
reduced_parasitic_drvrs_.push_back(drvr_pin);
return parasitic;
}
if (parasitic == nullptr) {
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
float pin_cap, wire_cap, fanout;
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic =
parasitics_->estimatePiElmore(drvr_pin, tr, wireload, fanout,pin_cap,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
cnst_min_max,
parasitic_ap);
delete_at_finish = true;
}
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
float pin_cap, wire_cap, fanout;
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic = parasitics_->estimatePiElmore(drvr_pin, tr, wireload,
fanout, pin_cap,
dcalc_ap->operatingConditions(),
dcalc_ap->corner(),
cnst_min_max,
parasitic_ap);
// Estimated parasitics are not recorded in the "database", so
// it for deletion after the drvr pin delay calc is finished.
unsaved_parasitics_.push_back(parasitic);
return parasitic;
}
}
return nullptr;
}
void
LumpedCapDelayCalc::finish(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
Parasitic *parasitic,
bool delete_at_finish)
LumpedCapDelayCalc::finishDrvrPin()
{
if (parasitic) {
const ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
if (delete_at_finish)
parasitics_->deleteParasitic(drvr_pin, tr, parasitic_ap, parasitic);
else
parasitics_->finish(parasitic);
}
for (auto parasitic : unsaved_parasitics_)
parasitics_->deleteUnsavedParasitic(parasitic);
unsaved_parasitics_.clear();
for (auto drvr_pin : reduced_parasitic_drvrs_)
parasitics_->deleteDrvrReducedParasitics(drvr_pin);
reduced_parasitic_drvrs_.clear();
}
void

20
dcalc/LumpedCapDelayCalc.hh
View File

@ -28,17 +28,9 @@ class LumpedCapDelayCalc : public ArcDelayCalc
public:
LumpedCapDelayCalc(StaState *sta);
virtual ArcDelayCalc *copy();
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish);
virtual void finish(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
Parasitic *parasitic,
bool delete_at_finish);
virtual Parasitic *findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap);
virtual void inputPortDelay(const Pin *port_pin,
float in_slew,
const TransRiseFall *tr,
@ -97,6 +89,7 @@ public:
const DcalcAnalysisPt *dcalc_ap,
int digits,
string *result);
virtual void finishDrvrPin();
protected:
// Find the liberty library to use for logic/slew thresholds.
@ -110,6 +103,11 @@ protected:
float multi_drvr_slew_factor_;
const LibertyLibrary *drvr_library_;
const TransRiseFall *drvr_tr_;
// Parasitics returned by findParasitic that are reduced or estimated
// that can be deleted after delay calculation for the driver pin
// is finished.
Vector<Parasitic*> unsaved_parasitics_;
Vector<const Pin *> reduced_parasitic_drvrs_;
};
ArcDelayCalc *

47
dcalc/RCDelayCalc.cc
View File

@ -35,53 +35,6 @@ RCDelayCalc::copy()
return new RCDelayCalc(this);
}
void
RCDelayCalc::findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish)
{
parasitic = nullptr;
delete_at_finish = false;
// set_load has precidence over parasitics.
if (!sdc_->drvrPinHasWireCap(drvr_pin)) {
const OperatingConditions *op_cond = dcalc_ap->operatingConditions();
const Corner *corner = dcalc_ap->corner();
const MinMax *cnst_min_max = dcalc_ap->constraintMinMax();
const ParasiticAnalysisPt *parasitic_ap = dcalc_ap->parasiticAnalysisPt();
// Prefer PiElmore.
parasitic = parasitics_->findPiElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr) {
Parasitic *parasitic_network =
parasitics_->findParasiticNetwork(drvr_pin, parasitic_ap);
if (parasitic_network) {
parasitic = parasitics_->reduceToPiElmore(parasitic_network, drvr_pin,
tr, op_cond, corner,
cnst_min_max, parasitic_ap);
delete_at_finish = true;
}
}
if (parasitic == nullptr)
parasitic = parasitics_->findLumpedElmore(drvr_pin, tr, parasitic_ap);
if (parasitic == nullptr) {
Wireload *wireload = sdc_->wireloadDefaulted(cnst_min_max);
if (wireload) {
float pin_cap, wire_cap, fanout;
bool has_wire_cap;
graph_delay_calc_->netCaps(drvr_pin, tr, dcalc_ap,
pin_cap, wire_cap, fanout, has_wire_cap);
parasitic = parasitics_->estimatePiElmore(drvr_pin, tr, wireload,
fanout, pin_cap, op_cond,
corner, cnst_min_max,
parasitic_ap);
delete_at_finish = true;
}
}
}
}
void
RCDelayCalc::inputPortDelay(const Pin *,
float in_slew,

6
dcalc/RCDelayCalc.hh
View File

@ -27,12 +27,6 @@ class RCDelayCalc : public LumpedCapDelayCalc
public:
RCDelayCalc(StaState *sta);
virtual ArcDelayCalc *copy();
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish);
virtual void inputPortDelay(const Pin *port_pin,
float in_slew,
const TransRiseFall *tr,

25
dcalc/UnitDelayCalc.cc
View File

@ -37,26 +37,12 @@ UnitDelayCalc::copy()
return new UnitDelayCalc(this);
}
void
Parasitic *
UnitDelayCalc::findParasitic(const Pin *,
const TransRiseFall *,
const DcalcAnalysisPt *,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish)
const DcalcAnalysisPt *)
{
// No parasitics are required for this delay calculator.
parasitic = nullptr;
delete_at_finish = false;
}
void
UnitDelayCalc::finish(const Pin *,
const TransRiseFall *,
const DcalcAnalysisPt *,
Parasitic *, bool)
{
// This space intentionally left blank.
return nullptr;
}
void
@ -150,4 +136,9 @@ UnitDelayCalc::reportCheckDelay(const LibertyCell *,
*result += "Check = 1.0\n";
}
void
UnitDelayCalc::finishDrvrPin()
{
}
} // namespace

15
dcalc/UnitDelayCalc.hh
View File

@ -27,17 +27,9 @@ class UnitDelayCalc : public ArcDelayCalc
public:
UnitDelayCalc(StaState *sta);
virtual ArcDelayCalc *copy();
virtual void findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
// Return values.
Parasitic *&parasitic,
bool &delete_at_finish);
virtual void finish(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap,
Parasitic *parasitic,
bool delete_at_finish);
virtual Parasitic *findParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const DcalcAnalysisPt *dcalc_ap);
virtual void gateDelay(const LibertyCell *drvr_cell,
TimingArc *arc,
const Slew &in_slew,
@ -96,6 +88,7 @@ public:
const DcalcAnalysisPt *dcalc_ap,
int digits,
string *result);
virtual void finishDrvrPin();
};
ArcDelayCalc *

2
graph/Graph.cc
View File

@ -530,7 +530,7 @@ void
Graph::deleteVertex(Vertex *vertex)
{
if (vertex->isRegClk())
reg_clk_vertices_.eraseKey(vertex);
reg_clk_vertices_.erase(vertex);
Pin *pin = vertex->pin_;
if (vertex->isBidirectDriver())
pin_bidirect_drvr_vertex_map_.erase(pin_bidirect_drvr_vertex_map_

8
liberty/Liberty.cc
View File

@ -1742,6 +1742,8 @@ LibertyPort::LibertyPort(LibertyCell *cell,
function_(nullptr),
tristate_enable_(nullptr),
scaled_ports_(nullptr),
// capacitance_ intentionally not initialized so
// liberty reader can apply default capacitance.
min_period_(0.0),
pulse_clk_trigger_(nullptr),
pulse_clk_sense_(nullptr),
@ -1858,6 +1860,12 @@ LibertyPort::capacitance(const TransRiseFall *tr,
return cap * lib->scaleFactor(ScaleFactorType::pin_cap, liberty_cell_, pvt);
}
bool
LibertyPort::capacitanceIsOneValue() const
{
return capacitance_.isOneValue();
}
void
LibertyPort::setFunction(FuncExpr *func)
{

1
liberty/Liberty.hh
View File

@ -632,6 +632,7 @@ public:
const MinMax *min_max,
const OperatingConditions *op_cond,
const Pvt *pvt) const;
bool capacitanceIsOneValue() const;
void setCapacitance(float cap);
void setCapacitance(const TransRiseFall *tr,
const MinMax *min_max,

2
liberty/LibertyParser.cc
View File

@ -138,7 +138,7 @@ LibertyGroup::addDefine(LibertyDefine *define)
const char *define_name = define->name();
LibertyDefine *prev_define = define_map_->findKey(define_name);
if (prev_define) {
define_map_->eraseKey(define_name);
define_map_->erase(define_name);
delete prev_define;
}
(*define_map_)[define_name] = define;

4
network/ConcreteLibrary.cc
View File

@ -60,14 +60,14 @@ void
ConcreteLibrary::renameCell(ConcreteCell *cell,
const char *cell_name)
{
cell_map_.eraseKey(cell->name());
cell_map_.erase(cell->name());
cell_map_[cell_name] = cell;
}
void
ConcreteLibrary::deleteCell(ConcreteCell *cell)
{
cell_map_.eraseKey(cell->name());
cell_map_.erase(cell->name());
delete cell;
}

18
network/ConcreteNetwork.cc
View File

@ -436,7 +436,7 @@ ConcreteNetwork::findLibrary(const char *name)
void
ConcreteNetwork::deleteLibrary(ConcreteLibrary *library)
{
library_map_.eraseKey(library->name());
library_map_.erase(library->name());
library_seq_.eraseObject(library);
delete library;
}
@ -1138,8 +1138,8 @@ ConcreteNetwork::makePins(Instance *inst)
}
void
ConcreteNetwork::swapCell(Instance *inst,
LibertyCell *cell)
ConcreteNetwork::replaceCell(Instance *inst,
LibertyCell *cell)
{
InstancePinIterator *pin_iter = pinIterator(inst);
ConcreteCell *ccell = cell;
@ -1323,7 +1323,7 @@ ConcreteNetwork::disconnectNetPin(ConcreteNet *cnet,
Net *net = reinterpret_cast<Net*>(cnet);
PinSet *drvrs = net_drvr_pin_map_.findKey(net);
if (drvrs)
drvrs->eraseKey(pin);
drvrs->erase(pin);
}
else
clearNetDrvPinrMap();
@ -1366,12 +1366,12 @@ ConcreteNetwork::deleteNet(Net *net)
pin->net_ = nullptr;
}
constant_nets_[int(LogicValue::zero)].eraseKey(net);
constant_nets_[int(LogicValue::one)].eraseKey(net);
constant_nets_[int(LogicValue::zero)].erase(net);
constant_nets_[int(LogicValue::one)].erase(net);
PinSet *drvrs = net_drvr_pin_map_.findKey(net);
if (drvrs) {
delete drvrs;
net_drvr_pin_map_.eraseKey(net);
net_drvr_pin_map_.erase(net);
}
ConcreteInstance *cinst =
@ -1554,7 +1554,7 @@ ConcreteInstance::addChild(ConcreteInstance *child)
void
ConcreteInstance::deleteChild(ConcreteInstance *child)
{
children_->eraseKey(child->name());
children_->erase(child->name());
}
void
@ -1591,7 +1591,7 @@ ConcreteInstance::addNet(const char *name,
void
ConcreteInstance::deleteNet(ConcreteNet *net)
{
nets_->eraseKey(net->name());
nets_->erase(net->name());
}
void

4
network/ConcreteNetwork.hh
View File

@ -190,8 +190,8 @@ public:
virtual Instance *makeInstance(Cell *cell,
const char *name,
Instance *parent);
virtual void swapCell(Instance *inst,
LibertyCell *cell);
virtual void replaceCell(Instance *inst,
LibertyCell *cell);
virtual void deleteInstance(Instance *inst);
virtual Pin *connect(Instance *inst,
Port *port,

8
network/HpinDrvrLoad.cc
View File

@ -121,7 +121,7 @@ visitPinsAboveNet2(const Pin *hpin,
visitPinsAboveNet2(above_pin, above_net1, visited,
above_drvrs, above_loads,
hpin_path, network);
hpin_path->eraseKey(above_pin);
hpin_path->erase(above_pin);
}
}
}
@ -141,7 +141,7 @@ visitPinsAboveNet2(const Pin *hpin,
visitPinsAboveNet2(above_pin, above_net1, visited,
above_drvrs, above_loads,
hpin_path, network);
hpin_path->eraseKey(above_pin);
hpin_path->erase(above_pin);
}
if (network->isDriver(above_pin)) {
@ -198,7 +198,7 @@ visitPinsBelowNet2(const Pin *hpin,
visitPinsBelowNet2(below_pin, below_net, below_net1, visited,
below_drvrs, below_loads,
hpin_path, network);
hpin_path->eraseKey(below_pin);
hpin_path->erase(below_pin);
}
}
}
@ -219,7 +219,7 @@ visitPinsBelowNet2(const Pin *hpin,
visitPinsAboveNet2(above_pin, above_net1,
visited, below_drvrs, below_loads,
hpin_path, network);
hpin_path->eraseKey(above_pin);
hpin_path->erase(above_pin);
}
}
}

4
network/Network.hh
View File

@ -483,8 +483,8 @@ public:
const char *name,
Instance *parent) = 0;
virtual void makePins(Instance *inst) = 0;
virtual void swapCell(Instance *inst,
LibertyCell *cell) = 0;
virtual void replaceCell(Instance *inst,
LibertyCell *cell) = 0;
// Deleting instance also deletes instance pins.
virtual void deleteInstance(Instance *inst) = 0;
// Connect the port on an instance to a net.

6
network/SdcNetwork.cc
View File

@ -929,10 +929,10 @@ NetworkNameAdapter::makeNet(const char *name,
}
void
NetworkNameAdapter::swapCell(Instance *inst,
LibertyCell *cell)
NetworkNameAdapter::replaceCell(Instance *inst,
LibertyCell *cell)
{
network_edit_->swapCell(inst, cell);
network_edit_->replaceCell(inst, cell);
}
Pin *

4
network/SdcNetwork.hh
View File

@ -123,8 +123,8 @@ public:
const char *name,
Instance *parent);
virtual void makePins(Instance *inst);
virtual void swapCell(Instance *inst,
LibertyCell *cell);
virtual void replaceCell(Instance *inst,
LibertyCell *cell);
virtual Net *makeNet(const char *name,
Instance *parent);
virtual Pin *connect(Instance *inst,

749
parasitics/ConcreteParasitics.cc
View File

File diff suppressed because it is too large Load Diff

95
parasitics/ConcreteParasitics.hh
View File

@ -26,21 +26,15 @@
namespace sta {
class ConcreteParasiticNode;
class ConcreteParasiticDevice;
class ConcreteLumpedElmore;
class ConcreteParasitic;
class ConcretePiElmore;
class ConcretePiPoleResidue;
class ConcreteParasiticNetwork;
class ConcreteParasiticNode;
class ConcreteParasiticDevice;
typedef Map<const Pin*, ConcreteLumpedElmore*> ConcreteLumpedElmoreMap;
typedef Vector<ConcreteLumpedElmoreMap*> ConcreteLumpedElmoreMapSeq;
typedef Map<const Pin*, ConcretePiElmore*> ConcretePiElmoreMap;
typedef Vector<ConcretePiElmoreMap*> ConcretePiElmoreMapSeq;
typedef Map<const Pin*, ConcretePiPoleResidue*> ConcretePiPoleResidueMap;
typedef Vector<ConcretePiPoleResidueMap*> ConcretePiPoleResidueMapSeq;
typedef Map<const Net*, ConcreteParasiticNetwork*> ConcreteParasiticNetworkMap;
typedef Vector<ConcreteParasiticNetworkMap*> ConcreteParasiticNetworkMapSeq;
typedef Map<const Pin*, ConcreteParasitic**> ConcreteParasiticMap;
typedef Map<const Net*, ConcreteParasiticNetwork**> ConcreteParasiticNetworkMap;
// This class acts as a BUILDER for all parasitics.
class ConcreteParasitics : public Parasitics, public EstimateParasitics
@ -50,44 +44,22 @@ public:
virtual ~ConcreteParasitics();
bool haveParasitics();
virtual void clear();
virtual void makeParasiticAnalysisPtAfter();
virtual void finish(Parasitic *parasitic);
virtual void save();
virtual void deleteParasitics();
virtual void deleteParasitics(const Net *net,
const ParasiticAnalysisPt *ap);
virtual void deleteParasitics(const Pin *drvr_pin,
const ParasiticAnalysisPt *ap);
virtual void deleteParasitic(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap,
Parasitic *parasitic);
virtual void deleteUnsavedParasitic(Parasitic *parasitic);
virtual bool isReducedParasiticNetwork(Parasitic *parasitic) const;
virtual void setIsReducedParasiticNetwork(Parasitic *parasitic,
bool is_reduced);
virtual float capacitance(Parasitic *parasitic) const;
virtual bool isLumpedElmore(Parasitic *parasitic) const;
virtual bool hasLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *makeLumpedElmore(const Pin *drvr_pin,
float cap,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual void deleteLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual bool isPiElmore(Parasitic *parasitic) const;
virtual bool hasPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
@ -95,9 +67,6 @@ public:
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap,
float c2, float rpi, float c1);
virtual void deletePiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual bool isPiModel(Parasitic *parasitic) const;
virtual void piModel(Parasitic *parasitic, float &c2, float &rpi,
@ -110,9 +79,6 @@ public:
float elmore);
virtual bool isPiPoleResidue(Parasitic* parasitic) const;
virtual bool hasPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
@ -131,11 +97,11 @@ public:
ComplexFloat &pole, ComplexFloat &residue) const;
virtual bool isParasiticNetwork(Parasitic *parasitic) const;
virtual bool hasParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findParasiticNetwork(const Pin *pin,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *makeParasiticNetwork(Net *net,
virtual Parasitic *makeParasiticNetwork(const Net *net,
bool includes_pin_caps,
const ParasiticAnalysisPt *ap);
virtual void deleteParasiticNetwork(const Net *net,
@ -192,62 +158,55 @@ public:
const MinMax *min_max,
const ParasiticAnalysisPt *ap);
virtual void disconnectPinBefore(const Pin *pin);
virtual void loadPinCapacitanceChanged(const Pin *pin);
virtual void reduceTo(Parasitic *parasitic,
const Net *net,
ReduceParasiticsTo reduce_to,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiElmore(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual Parasitic *reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
virtual void reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Net *net,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual Parasitic *reduceToPiPoleResidue2(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void deleteDrvrReducedParasitics(const Pin *drvr_pin);
protected:
int mapSize();
int parasiticAnalysisPtIndex(const ParasiticAnalysisPt *ap,
const TransRiseFall *tr) const;
int parasiticNetworkAnalysisPtIndex(const ParasiticAnalysisPt *ap) const;
Parasitic *ensureRspf(const Pin *drvr_pin);
void deleteParasitics(int ap_index);
void disconnectPinBefore(const Pin *drvr_pin, const Pin *pin, int ap_index);
void makeAnalysisPtAfter();
void deleteReducedParasitics(const Pin *pin);
// Arrays of parasitic lookup maps indexed by analysis pt index.
ConcreteLumpedElmoreMapSeq *lumped_elmore_maps_;
ConcretePiElmoreMapSeq *pi_elmore_maps_;
ConcretePiPoleResidueMapSeq *pi_pole_residue_maps_;
ConcreteParasiticNetworkMapSeq *parasitic_network_maps_;
// Driver pin to array of parasitics indexed by analysis pt index
// and transition.
ConcreteParasiticMap drvr_parasitic_map_;
ConcreteParasiticNetworkMap parasitic_network_map_;
mutable std::mutex lock_;
using EstimateParasitics::estimatePiElmore;
friend class ConcreteLumpedElmore;
friend class ConcretePiElmore;
friend class ConcreteParasiticNode;
friend class ConcreteParasiticResistor;

19
parasitics/ConcreteParasiticsPvt.hh
View File

@ -57,7 +57,6 @@ class ConcreteParasitic : public Parasitic
public:
virtual ~ConcreteParasitic();
virtual float capacitance() const = 0;
virtual bool isLumpedElmore() const;
virtual bool isPiElmore() const;
virtual bool isPiModel() const;
virtual bool isPiPoleResidue() const;
@ -102,24 +101,6 @@ private:
ConcreteElmoreLoadMap *loads_;
};
class ConcreteLumpedElmore : public ConcreteParasitic,
public ConcreteElmore
{
public:
ConcreteLumpedElmore(float cap);
virtual bool isLumpedElmore() const { return true; }
virtual float capacitance() const { return cap_; }
void setCapacitance(float cap);
virtual void findElmore(const Pin *load_pin,
float &elmore,
bool &exists) const;
virtual void setElmore(const Pin *load_pin,
float elmore);
private:
float cap_;
};
// Pi model for a driver pin.
class ConcretePi
{

115
parasitics/NullParasitics.cc
View File

@ -29,11 +29,6 @@ NullParasitics::clear()
{
}
void
NullParasitics::finish(Parasitic *)
{
}
void
NullParasitics::save()
{
@ -56,10 +51,12 @@ NullParasitics::deleteParasitics(const Pin *, const ParasiticAnalysisPt *)
}
void
NullParasitics::deleteParasitic(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *,
Parasitic *)
NullParasitics::deleteUnsavedParasitic(Parasitic *)
{
}
void
NullParasitics::deleteDrvrReducedParasitics(const Pin *)
{
}
@ -69,52 +66,6 @@ NullParasitics::capacitance(Parasitic *) const
return 0.0;
}
bool
NullParasitics::hasLumpedElmore(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *) const
{
return false;
}
Parasitic *
NullParasitics::findLumpedElmore(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *) const
{
return nullptr;
}
bool
NullParasitics::isLumpedElmore(Parasitic *) const
{
return false;
}
Parasitic *
NullParasitics::makeLumpedElmore(const Pin *,
float,
const TransRiseFall *,
const ParasiticAnalysisPt *)
{
return nullptr;
}
void
NullParasitics::deleteLumpedElmore(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *)
{
}
bool
NullParasitics::hasPiElmore(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *) const
{
return false;
}
Parasitic *
NullParasitics::findPiElmore(const Pin *,
const TransRiseFall *,
@ -134,18 +85,6 @@ NullParasitics::makePiElmore(const Pin *,
return nullptr;
}
void
NullParasitics::deletePiElmore(const Pin *)
{
}
void
NullParasitics::deletePiElmore(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *)
{
}
bool
NullParasitics::isPiElmore(Parasitic *) const
{
@ -207,14 +146,6 @@ NullParasitics::isPiPoleResidue(Parasitic* ) const
return false;
}
bool
NullParasitics::hasPiPoleResidue(const Pin *,
const TransRiseFall *,
const ParasiticAnalysisPt *) const
{
return false;
}
Parasitic *
NullParasitics::findPiPoleResidue(const Pin *,
const TransRiseFall *,
@ -270,12 +201,18 @@ NullParasitics::poleResidue(const Parasitic *,
}
bool
NullParasitics::hasParasiticNetwork(const Net *,
const ParasiticAnalysisPt *) const
NullParasitics::isParasiticNetwork(Parasitic *) const
{
return false;
}
Parasitic *
NullParasitics::findParasiticNetwork(const Net *,
const ParasiticAnalysisPt *) const
{
return nullptr;
}
Parasitic *
NullParasitics::findParasiticNetwork(const Pin *,
const ParasiticAnalysisPt *) const
@ -283,14 +220,8 @@ NullParasitics::findParasiticNetwork(const Pin *,
return nullptr;
}
bool
NullParasitics::isParasiticNetwork(Parasitic *) const
{
return false;
}
Parasitic *
NullParasitics::makeParasiticNetwork(Net *,
NullParasitics::makeParasiticNetwork(const Net *,
bool,
const ParasiticAnalysisPt *)
{
@ -447,7 +378,6 @@ void
NullParasitics::reduceTo(Parasitic *,
const Net *,
ReduceParasiticsTo ,
const TransRiseFall *,
const OperatingConditions *,
const Corner *,
const MinMax *,
@ -458,7 +388,6 @@ NullParasitics::reduceTo(Parasitic *,
void
NullParasitics::reduceToPiElmore(Parasitic *,
const Net *,
const TransRiseFall *,
const OperatingConditions *,
const Corner *,
const MinMax *,
@ -466,21 +395,18 @@ NullParasitics::reduceToPiElmore(Parasitic *,
{
}
Parasitic *
void
NullParasitics::reduceToPiElmore(Parasitic *,
const Pin *,
const TransRiseFall *,
const OperatingConditions *,
const Corner *,
const MinMax *,
const ParasiticAnalysisPt *)
{
return nullptr;
}
void
NullParasitics::reduceToPiPoleResidue2(Parasitic *, const Net *,
const TransRiseFall *,
const OperatingConditions *,
const Corner *,
const MinMax *,
@ -488,16 +414,14 @@ NullParasitics::reduceToPiPoleResidue2(Parasitic *, const Net *,
{
}
Parasitic *
void
NullParasitics::reduceToPiPoleResidue2(Parasitic *,
const Pin *,
const TransRiseFall *,
const OperatingConditions *,
const Corner *,
const MinMax *,
const ParasiticAnalysisPt *)
{
return nullptr;
}
Parasitic *
@ -519,4 +443,9 @@ NullParasitics::disconnectPinBefore(const Pin *)
{
}
void
NullParasitics::loadPinCapacitanceChanged(const Pin *)
{
}
} // namespace

71
parasitics/NullParasitics.hh
View File

@ -28,42 +28,17 @@ class NullParasitics : public Parasitics
public:
NullParasitics(StaState *sta);
virtual void clear();
virtual void makeParasiticAnalysisPtAfter() {}
virtual void finish(Parasitic *parasitic);
virtual void save();
virtual void deleteParasitics();
virtual void deleteParasitics(const Net *net,
const ParasiticAnalysisPt *ap);
virtual void deleteParasitics(const Pin *pin,
const ParasiticAnalysisPt *ap);
virtual void deleteParasitic(const Pin *pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap,
Parasitic *parasitic);
virtual void deleteUnsavedParasitic(Parasitic *parasitic);
virtual void deleteDrvrReducedParasitics(const Pin *drvr_pin);
virtual float capacitance(Parasitic *parasitic) const;
virtual bool
hasLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *
findLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual bool isLumpedElmore(Parasitic *parasitic) const;
virtual Parasitic *
makeLumpedElmore(const Pin *drvr_pin,
float cap,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual void deleteLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual bool hasPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *
findPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
@ -72,10 +47,6 @@ public:
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap,
float c2, float rpi, float c1);
void deletePiElmore(const Pin *drvr_pin);
virtual void deletePiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap);
virtual bool isPiElmore(Parasitic *parasitic) const;
virtual bool
isReducedParasiticNetwork(Parasitic *parasitic) const;
@ -92,10 +63,6 @@ public:
virtual bool isPiModel(Parasitic* parasitic) const;
virtual bool isPiPoleResidue(Parasitic* parasitic) const;
virtual bool
hasPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *
findPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
@ -115,15 +82,14 @@ public:
virtual void poleResidue(const Parasitic *parasitic, int pole_index,
ComplexFloat &pole, ComplexFloat &residue) const;
virtual bool
hasParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const;
virtual bool isParasiticNetwork(Parasitic *parasitic) const;
virtual Parasitic *findParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *
findParasiticNetwork(const Pin *pin,
const ParasiticAnalysisPt *ap) const;
virtual bool isParasiticNetwork(Parasitic *parasitic) const;
virtual Parasitic *
makeParasiticNetwork(Net *net,
makeParasiticNetwork(const Net *net,
bool pin_cap_included,
const ParasiticAnalysisPt *ap);
virtual ParasiticDeviceIterator *deviceIterator(Parasitic *) { return nullptr; }
@ -174,40 +140,35 @@ public:
virtual void reduceTo(Parasitic *parasitic,
const Net *net,
ReduceParasiticsTo reduce_to,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiElmore(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
// Reduce parasitic network to pi elmore model for drvr_pin.
virtual Parasitic *reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
virtual void reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Net *net,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual Parasitic *reduceToPiPoleResidue2(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
virtual Parasitic *
estimatePiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
@ -218,7 +179,9 @@ public:
const Corner *corner,
const MinMax *min_max,
const ParasiticAnalysisPt *ap);
virtual void disconnectPinBefore(const Pin *pin);
virtual void loadPinCapacitanceChanged(const Pin *pin);
private:
DISALLOW_COPY_AND_ASSIGN(NullParasitics);

13
parasitics/Parasitics.cc
View File

@ -32,19 +32,6 @@ Parasitics::Parasitics(StaState *sta) :
{
}
bool
Parasitics::hasParasiticNetwork(const Pin *pin,
const ParasiticAnalysisPt *ap) const
{
if (ap) {
// Only call findParasiticNet if there is an analysis pt (parasitics exist).
Net *net = findParasiticNet(pin);
return hasParasiticNetwork(net, ap);
}
else
return false;
}
Net *
Parasitics::findParasiticNet(const Pin *pin) const
{

79
parasitics/Parasitics.hh
View File

@ -48,10 +48,7 @@ public:
virtual ~Parasitics() {}
// Clear all state.
virtual void clear() = 0;
virtual void makeParasiticAnalysisPtAfter() = 0;
// Notification that a consumer is finished using a parasitic.
virtual void finish(Parasitic *parasitic) = 0;
// Save parasitics to database file.
virtual void save() = 0;
// Delete all parasitics.
@ -62,11 +59,9 @@ public:
// Delete all parasitics on pin at analysis point.
virtual void deleteParasitics(const Pin *pin,
const ParasiticAnalysisPt *ap) = 0;
// Delete a parasitic.
virtual void deleteParasitic(const Pin *pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap,
Parasitic *parasitic) = 0;
virtual void deleteUnsavedParasitic(Parasitic *parasitic) = 0;
virtual void deleteDrvrReducedParasitics(const Pin *drvr_pin) = 0;
virtual bool isReducedParasiticNetwork(Parasitic *parasitic) const = 0;
// Flag this parasitic as reduced from a parasitic network.
virtual void setIsReducedParasiticNetwork(Parasitic *parasitic,
@ -75,32 +70,11 @@ public:
// Capacitance value of parasitic object.
virtual float capacitance(Parasitic *parasitic) const = 0;
////////////////////////////////////////////////////////////////
// Lumped capacitive parasitic with elmore delays to loads.
virtual bool isLumpedElmore(Parasitic *parasitic) const = 0;
virtual bool hasLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *findLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *makeLumpedElmore(const Pin *drvr_pin,
float cap,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) = 0;
// Delete lumped elmore if it exists.
virtual void deleteLumpedElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) = 0;
////////////////////////////////////////////////////////////////
// Pi model driver load with elmore delays to load pins (RSPF).
// This follows the SPEF documentation of c2/c1, with c2 being the
// capacitor on the driver pin (the SPF documentation calls this c1).
// capacitor on the driver pin.
virtual bool isPiElmore(Parasitic *parasitic) const = 0;
virtual bool hasPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *findPiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const = 0;
@ -110,10 +84,6 @@ public:
float c2,
float rpi,
float c1) = 0;
// Delete pi elmore if it exists.
virtual void deletePiElmore(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) = 0;
////////////////////////////////////////////////////////////////
// Pi models are common to PiElmore and PiPoleResidue.
@ -143,9 +113,6 @@ public:
////////////////////////////////////////////////////////////////
// Pi model driver load with pole/residue interconnect model to load pins.
virtual bool isPiPoleResidue(Parasitic* parasitic) const = 0;
virtual bool hasPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *findPiPoleResidue(const Pin *drvr_pin,
const TransRiseFall *tr,
const ParasiticAnalysisPt *ap) const=0;
@ -176,13 +143,11 @@ public:
// This api assumes that parasitic networks are not rise/fall
// dependent because they do not include pin capacitances.
virtual bool isParasiticNetwork(Parasitic *parasitic) const = 0;
virtual bool hasParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const = 0;
virtual bool hasParasiticNetwork(const Pin *pin,
const ParasiticAnalysisPt *ap) const;
virtual Parasitic *findParasiticNetwork(const Net *net,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *findParasiticNetwork(const Pin *pin,
const ParasiticAnalysisPt *ap) const = 0;
virtual Parasitic *makeParasiticNetwork(Net *net,
virtual Parasitic *makeParasiticNetwork(const Net *net,
bool pin_cap_included,
const ParasiticAnalysisPt *ap) = 0;
virtual ParasiticDeviceIterator *deviceIterator(Parasitic *parasitic) = 0;
@ -260,7 +225,6 @@ public:
virtual void reduceTo(Parasitic *parasitic,
const Net *net,
ReduceParasiticsTo reduce_to,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
@ -268,36 +232,32 @@ public:
// Reduce parasitic network to pi elmore models.
virtual void reduceToPiElmore(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
// Reduce parasitic network to pi elmore model for drvr_pin.
virtual Parasitic *reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
virtual void reduceToPiElmore(Parasitic *parasitic,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
// Reduce parasitic network to pi and 2nd order pole/residue models.
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Net *net,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
// Reduce parasitic network to pi and 2nd order pole/residue models
// for drvr_pin.
virtual Parasitic *reduceToPiPoleResidue2(Parasitic *parasitic,
const Pin *drvr_pin,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
virtual void reduceToPiPoleResidue2(Parasitic *parasitic,
const Pin *drvr_pin,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap) = 0;
// Estimate parasitic as pi elmore using wireload model.
virtual Parasitic *estimatePiElmore(const Pin *drvr_pin,
@ -316,6 +276,7 @@ public:
const ParasiticAnalysisPt *ap);
// Network edit before/after methods.
virtual void disconnectPinBefore(const Pin *pin) = 0;
virtual void loadPinCapacitanceChanged(const Pin *pin) = 0;
protected:
void makeWireloadNetworkWorst(Parasitic *parasitic,

192
parasitics/ReduceParasitics.cc
View File

@ -17,9 +17,11 @@
#include "Machine.hh"
#include "Error.hh"
#include "Debug.hh"
#include "MinMax.hh"
#include "Liberty.hh"
#include "Network.hh"
#include "Sdc.hh"
#include "Corner.hh"
#include "Parasitics.hh"
#include "ReduceParasitics.hh"
@ -46,6 +48,7 @@ public:
float &c2,
float &rpi,
float &c1);
bool pinCapsOneValue() { return pin_caps_one_value_; }
protected:
void reducePiDfs(const Pin *drvr_pin,
@ -75,6 +78,7 @@ protected:
ParasiticNodeSet visited_nodes_;
ParasiticNodeValueMap node_values_;
ParasiticDeviceSet loop_resistors_;
bool pin_caps_one_value_;
};
ReduceToPi::ReduceToPi(StaState *sta) :
@ -83,7 +87,8 @@ ReduceToPi::ReduceToPi(StaState *sta) :
tr_(nullptr),
op_cond_(nullptr),
corner_(nullptr),
cnst_min_max_(nullptr)
cnst_min_max_(nullptr),
pin_caps_one_value_(true)
{
}
@ -117,16 +122,16 @@ ReduceToPi::reduceToPi(const Pin *drvr_pin,
if (y2 == 0.0 && y3 == 0.0) {
// Capacitive load.
c1 = static_cast<float>(y1);
c1 = y1;
c2 = 0.0;
rpi = 0.0;
}
else {
c1 = static_cast<float>(y2 * y2 / y3);
c2 = static_cast<float>(y1 - y2 * y2 / y3);
rpi = static_cast<float>(-y3 * y3 / (y2 * y2 * y2));
c1 = y2 * y2 / y3;
c2 = y1 - y2 * y2 / y3;
rpi = -y3 * y3 / (y2 * y2 * y2);
}
debugPrint3(debug_, "parasitic_reduce", 1,
debugPrint3(debug_, "parasitic_reduce", 2,
" Pi model c2=%.3g rpi=%.3g c1=%.3g\n",
c2, rpi, c1);
}
@ -169,7 +174,7 @@ ReduceToPi::reducePiDfs(const Pin *drvr_pin,
&& device != from_res) {
if (isVisited(onode)) {
// Resistor loop.
debugPrint1(debug_, "parasitic_reduce", 1,
debugPrint1(debug_, "parasitic_reduce", 2,
" loop detected thru resistor %s\n",
parasitics_->name(device));
markLoopResistor(device);
@ -190,9 +195,9 @@ ReduceToPi::reducePiDfs(const Pin *drvr_pin,
}
delete device_iter2;
setDownstreamCap(node, static_cast<float>(dwn_cap));
setDownstreamCap(node, dwn_cap);
leave(node);
debugPrint5(debug_, "parasitic_reduce", 2,
debugPrint5(debug_, "parasitic_reduce", 3,
" node %s y1=%.3g y2=%.3g y3=%.3g cap=%.3g\n",
parasitics_->name(node), y1, y2, y3, dwn_cap);
}
@ -206,9 +211,11 @@ ReduceToPi::pinCapacitance(ParasiticNode *node)
Port *port = network_->port(pin);
LibertyPort *lib_port = network_->libertyPort(port);
if (lib_port) {
if (!pin_cap_included_)
if (!pin_cap_included_) {
pin_cap = sdc_->pinCapacitance(pin,tr_, op_cond_, corner_,
cnst_min_max_);
pin_caps_one_value_ &= lib_port->capacitanceIsOneValue();
}
}
else if (network_->isTopLevelPort(pin))
pin_cap = sdc_->portExtCap(port, tr_, cnst_min_max_);
@ -231,7 +238,7 @@ ReduceToPi::isVisited(ParasiticNode *node)
void
ReduceToPi::leave(ParasiticNode *node)
{
visited_nodes_.eraseKey(node);
visited_nodes_.erase(node);
}
bool
@ -256,7 +263,7 @@ ReduceToPi::setDownstreamCap(ParasiticNode *node,
float
ReduceToPi::downstreamCap(ParasiticNode *node)
{
return static_cast<float>(node_values_[node]);
return node_values_[node];
}
////////////////////////////////////////////////////////////////
@ -265,6 +272,15 @@ class ReduceToPiElmore : public ReduceToPi
{
public:
ReduceToPiElmore(StaState *sta);
void makePiElmore(Parasitic *parasitic_network,
const Pin *drvr_pin,
ParasiticNode *drvr_node,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
void reduceElmoreDfs(const Pin *drvr_pin,
ParasiticNode *node,
ParasiticDevice *from_res,
@ -273,43 +289,60 @@ public:
const ParasiticAnalysisPt *ap);
};
ReduceToPiElmore::ReduceToPiElmore(StaState *sta) :
ReduceToPi(sta)
{
}
Parasitic *
reduceToPiElmore(Parasitic *parasitic,
void
reduceToPiElmore(Parasitic *parasitic_network,
const Pin *drvr_pin,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap,
StaState *sta)
{
debugPrint1(sta->debug(), "parasitic_reduce", 1,
"Reduce driver %s\n",
sta->network()->pathName(drvr_pin));
Parasitics *parasitics = sta->parasitics();
ParasiticNode *drvr_node = parasitics->findNode(parasitic, drvr_pin);
ParasiticNode *drvr_node = parasitics->findNode(parasitic_network,
drvr_pin);
if (drvr_node) {
debugPrint1(sta->debug(), "parasitic_reduce", 1,
"Reduce driver %s\n",
sta->network()->pathName(drvr_pin));
ReduceToPiElmore reducer(sta);
float c2, rpi, c1;
reducer.reduceToPi(drvr_pin, drvr_node,
parasitics->includesPinCaps(parasitic),
coupling_cap_factor,
tr, op_cond, corner, cnst_min_max, ap,
c2, rpi, c1);
Parasitic *pi_elmore = parasitics->makePiElmore(drvr_pin, tr, ap,
c2, rpi, c1);
parasitics->setIsReducedParasiticNetwork(pi_elmore, true);
reducer.reduceElmoreDfs(drvr_pin, drvr_node, 0, 0.0, pi_elmore, ap);
return pi_elmore;
reducer.makePiElmore(parasitic_network, drvr_pin, drvr_node,
coupling_cap_factor, TransRiseFall::rise(),
op_cond, corner, cnst_min_max, ap);
if (!reducer.pinCapsOneValue())
reducer.makePiElmore(parasitic_network, drvr_pin, drvr_node,
coupling_cap_factor, TransRiseFall::fall(),
op_cond, corner, cnst_min_max, ap);
}
else
return 0;
}
ReduceToPiElmore::ReduceToPiElmore(StaState *sta) :
ReduceToPi(sta)
{
}
void
ReduceToPiElmore::makePiElmore(Parasitic *parasitic_network,
const Pin *drvr_pin,
ParasiticNode *drvr_node,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap)
{
float c2, rpi, c1;
reduceToPi(drvr_pin, drvr_node,
parasitics_->includesPinCaps(parasitic_network),
coupling_cap_factor,
tr, op_cond, corner, cnst_min_max, ap,
c2, rpi, c1);
Parasitic *pi_elmore = parasitics_->makePiElmore(drvr_pin, tr, ap,
c2, rpi, c1);
parasitics_->setIsReducedParasiticNetwork(pi_elmore, true);
reduceElmoreDfs(drvr_pin, drvr_node, 0, 0.0, pi_elmore, ap);
}
// Find elmore delays on 2nd DFS search using downstream capacitances
@ -325,11 +358,11 @@ ReduceToPiElmore::reduceElmoreDfs(const Pin *drvr_pin,
const Pin *pin = parasitics_->connectionPin(node);
if (from_res && pin) {
if (network_->isLoad(pin)) {
debugPrint2(debug_, "parasitic_reduce", 1,
debugPrint2(debug_, "parasitic_reduce", 2,
" Load %s elmore=%.3g\n",
network_->pathName(pin),
elmore);
parasitics_->setElmore(pi_elmore, pin, static_cast<float>(elmore));
parasitics_->setElmore(pi_elmore, pin, elmore);
}
}
visit(node);
@ -364,6 +397,15 @@ public:
const Pin *drvr_pin,
ParasiticNode *drvr_node,
const ParasiticAnalysisPt *ap);
void makePiPoleResidue2(Parasitic *parasitic_network,
const Pin *drvr_pin,
ParasiticNode *drvr_node,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap);
private:
void findMoments(const Pin *drvr_pin,
@ -415,40 +457,56 @@ ReduceToPiPoleResidue2::ReduceToPiPoleResidue2(StaState *sta) :
// "An Explicit RC-Circuit Delay Approximation Based on the First
// Three Moments of the Impulse Response", Proceedings of the 33rd
// Design Automation Conference, 1996, pg 611-616.
Parasitic *
reduceToPiPoleResidue2(Parasitic *parasitic,
void
reduceToPiPoleResidue2(Parasitic *parasitic_network,
const Pin *drvr_pin,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap,
StaState *sta)
{
debugPrint1(sta->debug(), "parasitic_reduce", 1,
"Reduce driver %s\n",
sta->network()->pathName(drvr_pin));
Parasitics *parasitics = sta->parasitics();
ParasiticNode *drvr_node = parasitics->findNode(parasitic, drvr_pin);
ParasiticNode *drvr_node = parasitics->findNode(parasitic_network, drvr_pin);
if (drvr_node) {
debugPrint1(sta->debug(), "parasitic_reduce", 1,
"Reduce driver %s\n",
sta->network()->pathName(drvr_pin));
ReduceToPiPoleResidue2 reducer(sta);
float c2, rpi, c1;
reducer.reduceToPi(drvr_pin, drvr_node,
parasitics->includesPinCaps(parasitic),
coupling_cap_factor,
tr, op_cond, corner, cnst_min_max, ap,
c2, rpi, c1);
Parasitic *pi_pole_residue = parasitics->makePiPoleResidue(drvr_pin,
tr, ap,
c2, rpi, c1);
parasitics->setIsReducedParasiticNetwork(pi_pole_residue, true);
reducer.findPolesResidues(parasitic, pi_pole_residue,
drvr_pin, drvr_node, ap);
return pi_pole_residue;
reducer.makePiPoleResidue2(parasitic_network, drvr_pin, drvr_node,
coupling_cap_factor, TransRiseFall::rise(),
op_cond, corner, cnst_min_max, ap);
if (!reducer.pinCapsOneValue())
reducer.makePiPoleResidue2(parasitic_network, drvr_pin, drvr_node,
coupling_cap_factor, TransRiseFall::fall(),
op_cond, corner, cnst_min_max, ap);
}
else
return 0;
}
void
ReduceToPiPoleResidue2::makePiPoleResidue2(Parasitic *parasitic_network,
const Pin *drvr_pin,
ParasiticNode *drvr_node,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
const ParasiticAnalysisPt *ap)
{
float c2, rpi, c1;
reduceToPi(drvr_pin, drvr_node,
parasitics_->includesPinCaps(parasitic_network),
coupling_cap_factor,
tr, op_cond, corner, cnst_min_max, ap,
c2, rpi, c1);
Parasitic *pi_pole_residue = parasitics_->makePiPoleResidue(drvr_pin,
tr, ap,
c2, rpi, c1);
parasitics_->setIsReducedParasiticNetwork(pi_pole_residue, true);
findPolesResidues(parasitic_network, pi_pole_residue,
drvr_pin, drvr_node, ap);
}
ReduceToPiPoleResidue2::~ReduceToPiPoleResidue2()
@ -639,8 +697,8 @@ ReduceToPiPoleResidue2::findPolesResidues(Parasitic *pi_pole_residue,
network_->pathName(load_pin), p1, k1);
ComplexFloatSeq *poles = new ComplexFloatSeq(1);
ComplexFloatSeq *residues = new ComplexFloatSeq(1);
(*poles)[0] = ComplexFloat(static_cast<float>(p1), 0.0);
(*residues)[0] = ComplexFloat(static_cast<float>(k1), 0.0);
(*poles)[0] = ComplexFloat(p1, 0.0);
(*residues)[0] = ComplexFloat(k1, 0.0);
parasitics_->setPoleResidue(pi_pole_residue, load_pin, poles, residues);
}
else {
@ -660,10 +718,10 @@ ReduceToPiPoleResidue2::findPolesResidues(Parasitic *pi_pole_residue,
ComplexFloatSeq *poles = new ComplexFloatSeq(2);
ComplexFloatSeq *residues = new ComplexFloatSeq(2);
(*poles)[0] = ComplexFloat(static_cast<float>(p1), 0.0);
(*residues)[0] = ComplexFloat(static_cast<float>(k1), 0.0);
(*poles)[1] = ComplexFloat(static_cast<float>(p2), 0.0);
(*residues)[1] = ComplexFloat(static_cast<float>(k2), 0.0);
(*poles)[0] = ComplexFloat(p1, 0.0);
(*residues)[0] = ComplexFloat(k1, 0.0);
(*poles)[1] = ComplexFloat(p2, 0.0);
(*residues)[1] = ComplexFloat(k2, 0.0);
parasitics_->setPoleResidue(pi_pole_residue, load_pin, poles, residues);
}
}

10
parasitics/ReduceParasitics.hh
View File

@ -24,11 +24,10 @@ class ParasiticAnalysisPt;
class StaState;
// Reduce parasitic network to pi elmore model for drvr_pin.
Parasitic *
reduceToPiElmore(Parasitic *parasitic,
void
reduceToPiElmore(Parasitic *parasitic_network,
const Pin *drvr_pin,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,
@ -37,11 +36,10 @@ reduceToPiElmore(Parasitic *parasitic,
// Reduce parasitic network to pi and 2nd order pole/residue models
// for drvr_pin.
Parasitic *
reduceToPiPoleResidue2(Parasitic *parasitic,
void
reduceToPiPoleResidue2(Parasitic *parasitic_network,
const Pin *drvr_pin,
float coupling_cap_factor,
const TransRiseFall *tr,
const OperatingConditions *op_cond,
const Corner *corner,
const MinMax *cnst_min_max,

42
parasitics/SpefReader.cc
View File

@ -346,7 +346,7 @@ SpefReader::setDesignFlow(StringSeq *flow)
Pin *
SpefReader::findPin(char *name)
{
Pin *pin = 0;
Pin *pin = nullptr;
if (name) {
char *delim = strrchr(name, delimiter_);
if (delim) {
@ -376,7 +376,7 @@ SpefReader::findPin(char *name)
Net *
SpefReader::findNet(char *name)
{
Net *net = 0;
Net *net = nullptr;
name = nameMapLookup(name);
if (name) {
net = findNetRelative(name);
@ -408,13 +408,12 @@ SpefReader::rspfDrvrBegin(Pin *drvr_pin,
if (drvr_pin) {
// Incremental parasitics do not overwrite existing parasitics.
if (!(increment_ &&
parasitics_->hasPiElmore(drvr_pin, TransRiseFall::rise(), ap_))) {
parasitics_->findPiElmore(drvr_pin, TransRiseFall::rise(), ap_))) {
float c2 = pi->c2()->value(triple_index_) * cap_scale_;
float rpi = pi->r1()->value(triple_index_) * res_scale_;
float c1 = pi->c1()->value(triple_index_) * cap_scale_;
// Delete pi model and elmore delays.
parasitics_->deletePiElmore(drvr_pin, TransRiseFall::rise(), ap_);
parasitics_->deletePiElmore(drvr_pin, TransRiseFall::fall(), ap_);
parasitics_->deleteParasitics(drvr_pin, ap_);
// Only one parasitic, save it under rise transition.
parasitic_ = parasitics_->makePiElmore(drvr_pin,
TransRiseFall::rise(),
@ -438,7 +437,7 @@ SpefReader::rspfLoad(Pin *load_pin,
void
SpefReader::rspfDrvrFinish()
{
parasitic_ = 0;
parasitic_ = nullptr;
}
// Net cap (total_cap) is ignored.
@ -449,19 +448,16 @@ SpefReader::dspfBegin(Net *net,
if (net) {
// Incremental parasitics do not overwrite existing parasitics.
if (increment_
&& parasitics_->hasParasiticNetwork(net, ap_))
parasitic_ = 0;
else {
parasitics_->deleteParasitics(net, ap_);
&& parasitics_->findParasiticNetwork(net, ap_))
parasitic_ = nullptr;
else
parasitic_ = parasitics_->makeParasiticNetwork(net, pin_cap_included_,
ap_);
}
net_ = net;
}
else {
parasitic_ = 0;
net_ = 0;
parasitic_ = nullptr;
net_ = nullptr;
}
delete total_cap;
}
@ -474,18 +470,14 @@ SpefReader::dspfFinish()
if (!quiet_)
parasitics_->check(parasitic_);
if (reduce_to_ != ReduceParasiticsTo::none) {
TransRiseFallIterator tr_iter;
while (tr_iter.hasNext()) {
TransRiseFall *tr = tr_iter.next();
parasitics_->reduceTo(parasitic_, net_, reduce_to_, tr,
op_cond_, corner_, cnst_min_max_, ap_);
}
parasitics_->reduceTo(parasitic_, net_, reduce_to_, op_cond_,
corner_, cnst_min_max_, ap_);
if (delete_after_reduce_)
parasitics_->deleteParasiticNetwork(net_, ap_);
}
}
parasitic_ = 0;
net_ = 0;
parasitic_ = nullptr;
net_ = nullptr;
}
// Caller is only interested in nodes on net_.
@ -510,10 +502,10 @@ SpefReader::findParasiticNode(char *name,
int &ext_node_id,
Pin *&ext_pin)
{
node = 0;
ext_net = 0;
node = nullptr;
ext_net = nullptr;
ext_node_id = 0;
ext_pin = 0;
ext_pin = nullptr;
if (name) {
if (parasitic_) {
char *delim = strrchr(name, delimiter_);

2
sdc/Clock.cc
View File

@ -161,7 +161,7 @@ Clock::addPin(Pin *pin)
void
Clock::deletePin(Pin *pin)
{
pins_->eraseKey(pin);
pins_->erase(pin);
}
void

4
sdc/ClockGroups.cc
View File

@ -74,9 +74,9 @@ ClockGroups::removeClock(Clock *clk)
while (group_iter.hasNext()) {
ClockGroup *group = group_iter.next();
ClockSet *clks = group->clks();
clks->eraseKey(clk);
clks->erase(clk);
if (clks->empty()) {
groups_.eraseKey(group);
groups_.erase(group);
delete group;
}
}

8
sdc/DisabledPorts.cc
View File

@ -66,7 +66,7 @@ void
DisabledPorts::removeDisabledFrom(LibertyPort *port)
{
if (from_)
from_->eraseKey(port);
from_->erase(port);
}
void
@ -81,7 +81,7 @@ void
DisabledPorts::removeDisabledTo(LibertyPort *port)
{
if (to_)
to_->eraseKey(port);
to_->erase(port);
}
void
@ -103,7 +103,7 @@ DisabledPorts::removeDisabledFromTo(LibertyPort *from, LibertyPort *to)
LibertyPortPair probe(from, to);
LibertyPortPair *pair = from_to_->findKey(&probe);
if (pair) {
from_to_->eraseKey(pair);
from_to_->erase(pair);
delete pair;
}
}
@ -148,7 +148,7 @@ void
DisabledCellPorts::removeDisabled(TimingArcSet *arc_set)
{
if (arc_sets_)
arc_sets_->eraseKey(arc_set);
arc_sets_->erase(arc_set);
}
bool

18
sdc/ExceptionPath.cc
View File

@ -1198,7 +1198,7 @@ void
ExceptionFromTo::deletePin(Pin *pin)
{
if (pins_) {
pins_->eraseKey(pin);
pins_->erase(pin);
// Incrementally update hash.
hash_ -= hashPtr(pin) * hash_pin;
}
@ -1208,7 +1208,7 @@ void
ExceptionFromTo::deleteClock(Clock *clk)
{
if (clks_) {
clks_->eraseKey(clk);
clks_->erase(clk);
// Incrementally update hash.
hash_ -= clk->index() * hash_clk;
}
@ -1218,7 +1218,7 @@ void
ExceptionFromTo::deleteInstance(Instance *inst)
{
if (insts_) {
insts_->eraseKey(inst);
insts_->erase(inst);
// Incrementally update hash.
hash_ -= hashPtr(inst) * hash_inst;
}
@ -1587,7 +1587,7 @@ ExceptionThru::deletePinEdges(Pin *pin,
EdgePins *edge_pins = edge_iter.next();
if (edge_pins->first == pin
|| edge_pins->second == pin) {
edges_->eraseKey(edge_pins);
edges_->erase(edge_pins);
delete edge_pins;
}
}
@ -1840,7 +1840,7 @@ void
ExceptionThru::deletePin(Pin *pin)
{
if (pins_) {
pins_->eraseKey(pin);
pins_->erase(pin);
// Incrementally update hash.
hash_ -= hashPtr(pin) * hash_pin;
}
@ -1850,7 +1850,7 @@ void
ExceptionThru::deleteNet(Net *net)
{
if (nets_) {
nets_->eraseKey(net);
nets_->erase(net);
// Incrementally update hash.
hash_ -= hashPtr(net) * hash_net;
}
@ -1860,7 +1860,7 @@ void
ExceptionThru::deleteInstance(Instance *inst)
{
if (insts_) {
insts_->eraseKey(inst);
insts_->erase(inst);
// Incrementally update hash.
hash_ -= hashPtr(inst) * hash_inst;
}
@ -1870,7 +1870,7 @@ void
ExceptionThru::deleteEdge(EdgePins *edge)
{
if (edges_) {
edges_->eraseKey(edge);
edges_->erase(edge);
// Hash is unchanged because edges are derived from hierarchical pins.
}
}
@ -2519,7 +2519,7 @@ DeletePinPairsThru::visit(Pin *drvr,
Pin *load)
{
PinPair probe(drvr, load);
pairs_->eraseKey(&probe);
pairs_->erase(&probe);
}
static void

7
sdc/RiseFallMinMax.cc
View File

@ -243,6 +243,13 @@ RiseFallMinMax::equal(const RiseFallMinMax *values) const
return true;
}
bool
RiseFallMinMax::isOneValue() const
{
float value;
return isOneValue(value);
}
bool
RiseFallMinMax::isOneValue(float &value) const
{

1
sdc/RiseFallMinMax.hh
View File

@ -61,6 +61,7 @@ public:
void mergeWith(RiseFallMinMax *rfmm);
void clear();
bool equal(const RiseFallMinMax *values) const;
bool isOneValue() const;
bool isOneValue(float &value) const;
bool isOneValue(const MinMax *min_max,
// Return values.

78
sdc/Sdc.cc
View File

@ -1160,7 +1160,7 @@ Sdc::deleteClkPinMappings(Clock *clk)
if (pin_clks) {
pin_clks->erase(clk);
if (pin_clks->empty()) {
clock_pin_map_.eraseKey(pin);
clock_pin_map_.erase(pin);
delete pin_clks;
}
}
@ -1173,7 +1173,7 @@ Sdc::deleteClkPinMappings(Clock *clk)
if (pin_clks) {
pin_clks->erase(clk);
if (pin_clks->empty()) {
clock_vertex_pin_map_.eraseKey(pin);
clock_vertex_pin_map_.erase(pin);
delete pin_clks;
}
}
@ -1223,7 +1223,7 @@ Sdc::removeClock(Clock *clk)
deleteClkPinMappings(clk);
clocks_.eraseObject(clk);
clock_name_map_.eraseKey(clk->name());
clock_name_map_.erase(clk->name());
delete clk;
}
@ -1246,7 +1246,7 @@ Sdc::clockDeletePin(Clock *clk,
ClockSet *pin_clks = clock_pin_map_.findKey(pin);
pin_clks->erase(clk);
if (pin_clks->empty())
clock_pin_map_.eraseKey(pin);
clock_pin_map_.erase(pin);
clk->deletePin(pin);
clk->makeVertexPins(network_);
makeClkPinMappings(clk);
@ -1572,7 +1572,7 @@ Sdc::setPropagatedClock(Pin *pin)
void
Sdc::removePropagatedClock(Pin *pin)
{
propagated_clk_pins_.eraseKey(pin);
propagated_clk_pins_.erase(pin);
}
bool
@ -1636,7 +1636,7 @@ Sdc::deleteClockLatency(ClockLatency *latency)
const Pin *pin = latency->pin();
if (pin && graph_ && network_->isHierarchical(pin))
deannotateHierClkLatency(pin);
clk_latencies_.eraseKey(latency);
clk_latencies_.erase(latency);
delete latency;
}
@ -1733,7 +1733,7 @@ Sdc::removeClockUncertainty(Pin *pin,
uncertainties->removeValue(setup_hold);
if (uncertainties->empty()) {
delete uncertainties;
pin_clk_uncertainty_map_.eraseKey(pin);
pin_clk_uncertainty_map_.erase(pin);
}
}
}
@ -1811,7 +1811,7 @@ Sdc::removeClockUncertainty(Clock *from_clk,
if (uncertainties) {
uncertainties->removeUncertainty(from_tr, to_tr, setup_hold);
if (uncertainties->empty()) {
inter_clk_uncertainties_.eraseKey(uncertainties);
inter_clk_uncertainties_.erase(uncertainties);
delete uncertainties;
}
}
@ -1820,7 +1820,7 @@ Sdc::removeClockUncertainty(Clock *from_clk,
void
Sdc::deleteInterClockUncertainty(InterClockUncertainty *uncertainties)
{
inter_clk_uncertainties_.eraseKey(uncertainties);
inter_clk_uncertainties_.erase(uncertainties);
delete uncertainties;
}
@ -1891,7 +1891,7 @@ Sdc::removeClockInsertion(const Clock *clk,
void
Sdc::deleteClockInsertion(ClockInsertion *insertion)
{
clk_insertions_->eraseKey(insertion);
clk_insertions_->erase(insertion);
delete insertion;
}
@ -2229,7 +2229,7 @@ Sdc::removeClockGroupsAsynchronous(const char *name)
void
Sdc::removeClockGroups(ClockGroups *groups)
{
clk_groups_name_map_.eraseKey(groups->name());
clk_groups_name_map_.erase(groups->name());
delete groups;
// Can't delete excluded clock pairs for deleted clock groups because
// some other clock groups may exclude the same clock pair.
@ -2614,10 +2614,10 @@ Sdc::removeDataCheck(Pin *from,
if (check) {
check->removeMargin(from_tr, to_tr, setup_hold);
if (check->empty()) {
checks->eraseKey(check);
checks->erase(check);
checks = data_checks_to_map_.findKey(to);
if (checks)
checks->eraseKey(check);
checks->erase(check);
delete check;
}
}
@ -2662,7 +2662,7 @@ Sdc::setLatchBorrowLimit(Clock *clk,
void
Sdc::deleteLatchBorrowLimitsReferencing(Clock *clk)
{
clk_latch_borrow_limit_map_.eraseKey(clk);
clk_latch_borrow_limit_map_.erase(clk);
}
void
@ -2779,7 +2779,7 @@ Sdc::deleteMinPulseWidthReferencing(Clock *clk)
RiseFallValues *widths = clk_min_pulse_width_map_.findKey(clk);
if (widths) {
delete widths;
clk_min_pulse_width_map_.eraseKey(clk);
clk_min_pulse_width_map_.erase(clk);
}
}
@ -2979,7 +2979,7 @@ Sdc::deleteInputDelay(InputDelay *input_delay)
if (next)
input_delay_map_[pin] = next;
else
input_delay_map_.eraseKey(pin);
input_delay_map_.erase(pin);
head = next;
}
else {
@ -2999,7 +2999,7 @@ Sdc::deleteInputDelay(InputDelay *input_delay)
if (head)
input_delay_vertex_map_[vpin] = head;
else
input_delay_vertex_map_.eraseKey(vpin);
input_delay_vertex_map_.erase(vpin);
}
delete input_delay;
@ -3149,7 +3149,7 @@ Sdc::deleteOutputDelay(OutputDelay *output_delay)
if (next)
output_delay_map_[pin] = next;
else
output_delay_map_.eraseKey(pin);
output_delay_map_.erase(pin);
head = next;
}
else {
@ -3169,7 +3169,7 @@ Sdc::deleteOutputDelay(OutputDelay *output_delay)
if (head)
output_delay_vertex_map_[vpin] = head;
else
output_delay_vertex_map_.eraseKey(vpin);
output_delay_vertex_map_.erase(vpin);
}
delete output_delay;
@ -3723,7 +3723,7 @@ Sdc::disable(LibertyPort *port)
void
Sdc::removeDisable(LibertyPort *port)
{
disabled_lib_ports_.eraseKey(port);
disabled_lib_ports_.erase(port);
port->setIsDisabledConstraint(false);
}
@ -3744,7 +3744,7 @@ Sdc::removeDisable(Port *port)
Pin *pin = network_->findPin(network_->topInstance(), port);
annotateGraphDisabled(pin, false);
}
disabled_ports_.eraseKey(port);
disabled_ports_.erase(port);
}
void
@ -3809,7 +3809,7 @@ Sdc::removeDisable(Pin *from,
{
annotateGraphDisabledWireEdge(from, to, false, graph_);
PinPair probe(from, to);
disabled_wire_edges_.eraseKey(&probe);
disabled_wire_edges_.erase(&probe);
}
void
@ -3822,7 +3822,7 @@ Sdc::disable(Edge *edge)
void
Sdc::removeDisable(Edge *edge)
{
disabled_edges_.eraseKey(edge);
disabled_edges_.erase(edge);
edge->setIsDisabledConstraint(false);
}
@ -3917,7 +3917,7 @@ RemoveDisableEdgesThruHierPin::visit(Pin *drvr,
PinPair probe(drvr, load);
PinPair *pair = pairs_->findKey(&probe);
if (pair) {
pairs_->eraseKey(pair);
pairs_->erase(pair);
delete pair;
}
}
@ -3933,7 +3933,7 @@ Sdc::removeDisable(Pin *pin)
else {
if (graph_)
annotateGraphDisabled(pin, false);
disabled_pins_.eraseKey(pin);
disabled_pins_.erase(pin);
}
}
@ -4012,13 +4012,13 @@ Sdc::disableClockGatingCheck(Pin *pin)
void
Sdc::removeDisableClockGatingCheck(Instance *inst)
{
disabled_clk_gating_checks_inst_.eraseKey(inst);
disabled_clk_gating_checks_inst_.erase(inst);
}
void
Sdc::removeDisableClockGatingCheck(Pin *pin)
{
disabled_clk_gating_checks_pin_.eraseKey(pin);
disabled_clk_gating_checks_pin_.erase(pin);
}
bool
@ -4060,7 +4060,7 @@ Sdc::setCaseAnalysis(Pin *pin,
void
Sdc::removeCaseAnalysis(Pin *pin)
{
case_value_map_.eraseKey(pin);
case_value_map_.erase(pin);
}
void
@ -4233,7 +4233,7 @@ Sdc::unrecordPathDelayInternalStartpoints(ExceptionFrom *from)
if (!(network_->isRegClkPin(pin)
|| network_->isTopLevelPort(pin))
&& !pathDelayFrom(pin))
path_delay_internal_startpoints_->eraseKey(pin);
path_delay_internal_startpoints_->erase(pin);
}
}
}
@ -4298,7 +4298,7 @@ Sdc::unrecordPathDelayInternalEndpoints(ExceptionPath *exception)
if (!(hasLibertyChecks(pin)
|| network_->isTopLevelPort(pin))
&& !pathDelayTo(pin))
path_delay_internal_endpoints_->eraseKey(pin);
path_delay_internal_endpoints_->erase(pin);
}
}
}
@ -5347,7 +5347,7 @@ Sdc::unrecordException(ExceptionPath *exception)
{
unrecordMergeHashes(exception);
unrecordExceptionFirstPts(exception);
exceptions_.eraseKey(exception);
exceptions_.erase(exception);
}
void
@ -5372,7 +5372,7 @@ Sdc::unrecordMergeHash(ExceptionPath *exception,
missing_pt->asString(network_));
ExceptionPathSet *matches = exception_merge_hash_.findKey(hash);
if (matches)
matches->eraseKey(exception);
matches->erase(exception);
}
void
@ -5414,7 +5414,7 @@ Sdc::unrecordExceptionClks(ExceptionPath *exception,
Clock *clk = clk_iter.next();
ExceptionPathSet *set = exception_map->findKey(clk);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
}
@ -5428,7 +5428,7 @@ Sdc::unrecordExceptionPins(ExceptionPath *exception,
const Pin *pin = pin_iter.next();
ExceptionPathSet *set = exception_map->findKey(pin);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
}
@ -5442,7 +5442,7 @@ Sdc::unrecordExceptionInsts(ExceptionPath *exception,
Instance *inst = inst_iter.next();
ExceptionPathSet *set = exception_map->findKey(inst);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
}
@ -5456,7 +5456,7 @@ Sdc::unrecordExceptionEdges(ExceptionPath *exception,
EdgePins *edge = edge_iter.next();
ExceptionPathSet *set = exception_map->findKey(edge);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
}
@ -5470,7 +5470,7 @@ Sdc::unrecordExceptionNets(ExceptionPath *exception,
const Net *net = net_iter.next();
ExceptionPathSet *set = exception_map->findKey(net);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
}
@ -5481,7 +5481,7 @@ Sdc::unrecordExceptionHpin(ExceptionPath *exception,
{
ExceptionPathSet *set = exception_map->findKey(pin);
if (set)
set->eraseKey(exception);
set->erase(exception);
}
////////////////////////////////////////////////////////////////
@ -6534,7 +6534,7 @@ Sdc::deannotateHierClkLatency(const Pin *hpin)
EdgesThruHierPinIterator edge_iter(hpin, network_, graph_);
while (edge_iter.hasNext()) {
Edge *edge = edge_iter.next();
edge_clk_latency_.eraseKey(edge);
edge_clk_latency_.erase(edge);
}
}

4
search/Corner.cc
View File

@ -108,12 +108,12 @@ void
Corners::makeParasiticAnalysisPtsSingle()
{
if (parasitic_analysis_pts_.size() != 1) {
parasitics_->deleteParasitics();
parasitic_analysis_pts_.deleteContentsClear();
ParasiticAnalysisPt *ap = new ParasiticAnalysisPt("min_max", 0,
MinMax::max());
parasitic_analysis_pts_.push_back(ap);
updateCornerParasiticAnalysisPts();
parasitics_->makeParasiticAnalysisPtAfter();
}
}
@ -121,6 +121,7 @@ void
Corners::makeParasiticAnalysisPtsMinMax()
{
if (parasitic_analysis_pts_.size() != 2) {
parasitics_->deleteParasitics();
parasitic_analysis_pts_.deleteContentsClear();
parasitic_analysis_pts_.resize(MinMax::index_count);
MinMaxIterator mm_iter;
@ -133,7 +134,6 @@ Corners::makeParasiticAnalysisPtsMinMax()
parasitic_analysis_pts_[index] = ap;
}
updateCornerParasiticAnalysisPts();
parasitics_->makeParasiticAnalysisPtAfter();
}
}

1
search/Corner.hh
View File

@ -103,6 +103,7 @@ public:
const char *name() const { return name_; }
int index() const { return index_; }
ParasiticAnalysisPt *findParasiticAnalysisPt(const MinMax *min_max) const;
int parasiticAnalysisPtcount();
DcalcAnalysisPt *findDcalcAnalysisPt(const MinMax *min_max) const;
PathAnalysisPt *findPathAnalysisPt(const MinMax *min_max) const;
void addLiberty(LibertyLibrary *lib,

65
search/Genclks.cc
View File

@ -18,6 +18,7 @@
#include "Stats.hh"
#include "Debug.hh"
#include "Report.hh"
#include "Hash.hh"
#include "Network.hh"
#include "PortDirection.hh"
#include "Graph.hh"
@ -686,7 +687,7 @@ Genclks::findLatchFdbkEdges(Vertex *from_vertex,
findLatchFdbkEdges(to_vertex, gclk_level, srch_pred,
path_vertices, visited_vertices, fdbk_edges);
}
path_vertices.eraseKey(from_vertex);
path_vertices.erase(from_vertex);
}
}
@ -1069,22 +1070,6 @@ Genclks::srcPath(const Clock *gclk,
src_path.init();
}
bool
ClockPinPairLess::operator()(const ClockPinPair &pair1,
const ClockPinPair &pair2) const
{
const Clock *clk1 = pair1.first;
const Clock *clk2 = pair2.first;
int clk_index1 = clk1->index();
int clk_index2 = clk2->index();
const Pin *pin1 = pair1.second;
const Pin *pin2 = pair2.second;
return (clk_index1 < clk_index2
|| (clk_index1 == clk_index2
&& pin1 < pin2));
}
Arrival
Genclks::insertionDelay(const Clock *clk,
const Pin *pin,
@ -1285,4 +1270,50 @@ Genclks::matchesPllFilter(Path *path,
return false;
}
////////////////////////////////////////////////////////////////
bool
ClockPinPairLess::operator()(const ClockPinPair &pair1,
const ClockPinPair &pair2) const
{
const Clock *clk1 = pair1.first;
const Clock *clk2 = pair2.first;
int clk_index1 = clk1->index();
int clk_index2 = clk2->index();
const Pin *pin1 = pair1.second;
const Pin *pin2 = pair2.second;
return (clk_index1 < clk_index2
|| (clk_index1 == clk_index2
&& pin1 < pin2));
}
class ClockPinPairHash
{
public:
Hash operator()(const ClockPinPair &pair) const;
};
Hash
ClockPinPairHash::operator()(const ClockPinPair &pair) const
{
return hashSum(pair.first->index(), hashPtr(pair.second));
}
class ClockPinPairEqual
{
public:
bool operator()(const ClockPinPair &pair1,
const ClockPinPair &pair2) const;
};
bool
ClockPinPairEqual::operator()(const ClockPinPair &pair1,
const ClockPinPair &pair2) const
{
return pair1.first == pair2.first
&& pair1.second == pair2.second;
}
} // namespace

6
search/Levelize.cc
View File

@ -374,8 +374,8 @@ Levelize::invalidFrom(Vertex *vertex)
void
Levelize::deleteVertexBefore(Vertex *vertex)
{
roots_.eraseKey(vertex);
relevelize_from_.eraseKey(vertex);
roots_.erase(vertex);
relevelize_from_.erase(vertex);
}
void
@ -395,7 +395,7 @@ Levelize::deleteEdgeBefore(Edge *edge)
// fails because the DFS path will be missing.
invalid();
// Prevent refererence to deleted edge by clearLoopEdges().
disabled_loop_edges_.eraseKey(edge);
disabled_loop_edges_.erase(edge);
}
}

36
search/Power.cc
View File

@ -47,7 +47,6 @@
// pin
// output_voltage : default_VDD_VSS_output;
namespace sta {
typedef std::pair<float, int> SumCount;
@ -135,7 +134,7 @@ Power::power(const Instance *inst,
const Pin *to_pin = pin_iter->next();
const LibertyPort *to_port = network_->libertyPort(to_pin);
float load_cap = to_port->direction()->isAnyOutput()
? loadCap(to_pin, dcalc_ap)
? graph_delay_calc_->loadCap(to_pin, TransRiseFall::rise(), dcalc_ap)
: 0.0;
float activity1;
bool is_clk;
@ -215,11 +214,10 @@ Power::findInternalPower(const Instance *inst,
}
}
float internal = 0.0;
SupplySumCounts::Iterator supply_iter(supply_sum_counts);
while (supply_iter.hasNext()) {
const SumCount &supply_cum_count = supply_iter.next();
float supply_internal = supply_cum_count.first;
int supply_count = supply_cum_count.second;
for (auto supply_sum_count : supply_sum_counts) {
SumCount sum_count = supply_sum_count.second;
float supply_internal = sum_count.first;
int supply_count = sum_count.second;
internal += supply_internal / (supply_count > 0 ? supply_count : 1);
}
@ -227,30 +225,6 @@ Power::findInternalPower(const Instance *inst,
result.setInternal(result.internal() + internal);
}
float
Power::loadCap(const Pin *to_pin,
const DcalcAnalysisPt *dcalc_ap)
{
float ceff_sum = 0.0;
int ceff_count = 0;
Vertex *to_vertex = graph_->pinDrvrVertex(to_pin);
VertexInEdgeIterator edge_iter(to_vertex, graph_);
while (edge_iter.hasNext()) {
Edge *edge = edge_iter.next();
TimingArcSet *arc_set = edge->timingArcSet();
TimingArcSetArcIterator arc_iter(arc_set);
while (arc_iter.hasNext()) {
TimingArc *arc = arc_iter.next();
ceff_sum += graph_delay_calc_->ceff(edge, arc, dcalc_ap);
ceff_count++;
}
}
if (ceff_count == 0)
return 0.0;
else
return ceff_sum / ceff_count;
}
void
Power::findLeakagePower(const Instance *,
LibertyCell *cell,

2
search/Power.hh
View File

@ -72,8 +72,6 @@ protected:
// Return values.
const Clock *&clk,
bool &is_clk);
float loadCap(const Pin *to_pin,
const DcalcAnalysisPt *dcalc_ap);;
void activity(const Pin *pin,
// Return values.
float &activity,

10
search/ReportPath.cc
View File

@ -2868,15 +2868,9 @@ ReportPath::loadCap(Pin *drvr_pin,
DcalcAnalysisPt *dcalc_ap)
{
Parasitic *parasitic = nullptr;
bool delete_parasitic;
if (arc_delay_calc_)
arc_delay_calc_->findParasitic(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
float cap = graph_delay_calc_->loadCap(drvr_pin, parasitic, tr, dcalc_ap);
if (arc_delay_calc_)
arc_delay_calc_->finish(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
return cap;
parasitic = arc_delay_calc_->findParasitic(drvr_pin, tr, dcalc_ap);
return graph_delay_calc_->loadCap(drvr_pin, parasitic, tr, dcalc_ap);
}
////////////////////////////////////////////////////////////////

20
search/Search.cc
View File

@ -539,7 +539,7 @@ Search::deleteFilterTagGroups()
TagGroup *group = tag_groups_[i];
if (group
&& group->hasFilterTag()) {
tag_group_set_->eraseKey(group);
tag_group_set_->erase(group);
tag_groups_[group->index()] = nullptr;
tag_group_free_indices_.push_back(i);
delete group;
@ -555,7 +555,7 @@ Search::deleteFilterTags()
if (tag
&& tag->isFilter()) {
tags_[i] = nullptr;
tag_set_->eraseKey(tag);
tag_set_->erase(tag);
delete tag;
tag_free_indices_.push_back(i);
}
@ -569,7 +569,7 @@ Search::deleteFilterClkInfos()
while (clk_info_iter.hasNext()) {
ClkInfo *clk_info = clk_info_iter.next();
if (clk_info->refsFilter(this)) {
clk_info_set_->eraseKey(clk_info);
clk_info_set_->erase(clk_info);
delete clk_info;
}
}
@ -660,17 +660,17 @@ Search::deleteVertexBefore(Vertex *vertex)
if (arrivals_exist_) {
deletePaths(vertex);
arrival_iter_->deleteVertexBefore(vertex);
invalid_arrivals_.eraseKey(vertex);
invalid_arrivals_.erase(vertex);
}
if (requireds_exist_) {
required_iter_->deleteVertexBefore(vertex);
invalid_requireds_.eraseKey(vertex);
invalid_tns_.eraseKey(vertex);
invalid_requireds_.erase(vertex);
invalid_tns_.erase(vertex);
}
if (endpoints_)
endpoints_->eraseKey(vertex);
endpoints_->erase(vertex);
if (invalid_endpoints_)
invalid_endpoints_->eraseKey(vertex);
invalid_endpoints_->erase(vertex);
}
void
@ -3171,7 +3171,7 @@ Search::endpoints()
if (debug_->check("endpoint", 2)
&& endpoints_->hasKey(vertex))
debug_->print("endpoint: remove %s\n", vertex->name(sdc_network_));
endpoints_->eraseKey(vertex);
endpoints_->erase(vertex);
}
}
invalid_endpoints_->clear();
@ -3805,7 +3805,7 @@ Search::tnsDecr(Vertex *vertex,
delayAsString(slack, this),
vertex->name(sdc_network_));
tns_[path_ap_index] -= slack;
tns_slacks_[path_ap_index].eraseKey(vertex);
tns_slacks_[path_ap_index].erase(vertex);
}
}

12
search/Sim.cc
View File

@ -663,8 +663,8 @@ Sim::recordConstPinFunc(Pin *pin)
void
Sim::deleteInstanceBefore(Instance *inst)
{
instances_with_const_pins_.eraseKey(inst);
invalid_insts_.eraseKey(inst);
instances_with_const_pins_.erase(inst);
invalid_insts_.erase(inst);
}
void
@ -678,9 +678,9 @@ void
Sim::deletePinBefore(Pin *pin)
{
// Incrementally update const_func_pins_.
const_func_pins_.eraseKey(pin);
invalid_load_pins_.eraseKey(pin);
invalid_drvr_pins_.eraseKey(pin);
const_func_pins_.erase(pin);
invalid_load_pins_.erase(pin);
invalid_drvr_pins_.erase(pin);
invalid_insts_.insert(network_->instance(pin));
}
@ -716,7 +716,7 @@ Sim::pinSetFuncAfter(Pin *pin)
valid_ = false;
}
// Incrementally update const_func_pins_.
const_func_pins_.eraseKey(pin);
const_func_pins_.erase(pin);
recordConstPinFunc(pin);
}

97
search/Sta.cc
View File

@ -298,6 +298,7 @@ Sta::makeComponents()
makeLatches();
makeCmdNetwork();
makeReportPath();
makePower();
updateComponentsState();
makeObservers();
@ -3412,16 +3413,12 @@ Sta::connectedCap(Pin *drvr_pin,
wire_cap = 0.0;
bool cap_exists = false;
const DcalcAnalysisPt *dcalc_ap = corner->findDcalcAnalysisPt(min_max);
Parasitic *parasitic;
bool delete_parasitic;
arc_delay_calc_->findParasitic(drvr_pin, tr, dcalc_ap,
parasitic, delete_parasitic);
Parasitic *parasitic = arc_delay_calc_->findParasitic(drvr_pin, tr, dcalc_ap);
float ap_pin_cap = 0.0;
float ap_wire_cap = 0.0;
graph_delay_calc_->loadCap(drvr_pin, parasitic, tr, dcalc_ap,
ap_pin_cap, ap_wire_cap);
arc_delay_calc_->finish(drvr_pin, tr, dcalc_ap, parasitic,
delete_parasitic);
arc_delay_calc_->finishDrvrPin();
if (!cap_exists
|| min_max->compare(ap_pin_cap, pin_cap)) {
pin_cap = ap_pin_cap;
@ -3527,8 +3524,8 @@ Sta::findPiElmore(Pin *drvr_pin,
{
Corner *corner = cmd_corner_;
const ParasiticAnalysisPt *ap = corner->findParasiticAnalysisPt(min_max);
if (parasitics_->hasPiElmore(drvr_pin, tr, ap)) {
Parasitic *pi_elmore = parasitics_->findPiElmore(drvr_pin, tr, ap);
Parasitic *pi_elmore = parasitics_->findPiElmore(drvr_pin, tr, ap);
if (pi_elmore) {
parasitics_->piModel(pi_elmore, c2, rpi, c1);
exists = true;
}
@ -3564,8 +3561,8 @@ Sta::findElmore(Pin *drvr_pin,
{
Corner *corner = cmd_corner_;
const ParasiticAnalysisPt *ap = corner->findParasiticAnalysisPt(min_max);
if (parasitics_->hasPiElmore(drvr_pin, tr, ap)) {
Parasitic *pi_elmore = parasitics_->findPiElmore(drvr_pin, tr, ap);
Parasitic *pi_elmore = parasitics_->findPiElmore(drvr_pin, tr, ap);
if (pi_elmore) {
exists = false;
parasitics_->findElmore(pi_elmore, load_pin, elmore, exists);
}
@ -3637,24 +3634,17 @@ Sta::replaceCell(Instance *inst,
NetworkEdit *network = networkCmdEdit();
LibertyCell *from_cell = network->libertyCell(inst);
if (equivCells(from_cell, to_cell)) {
swapEquivCellBefore(inst, to_cell);
network->swapCell(inst, to_cell);
swapEquivCellAfter(inst);
replaceEquivCellBefore(inst, to_cell);
network->replaceCell(inst, to_cell);
replaceEquivCellAfter(inst);
}
else {
swapCellBefore(inst, to_cell);
network->swapCell(inst, to_cell);
swapCellAfter(inst);
replaceCellBefore(inst, to_cell);
network->replaceCell(inst, to_cell);
replaceCellAfter(inst);
}
}
void
Sta::swapCell(Instance *inst,
LibertyCell *to_cell)
{
replaceCell(inst, to_cell);
}
Net *
Sta::makeNet(const char *name,
Instance *parent)
@ -3733,8 +3723,8 @@ Sta::makePinAfter(Pin *pin)
}
void
Sta::swapEquivCellBefore(Instance *inst,
LibertyCell *to_cell)
Sta::replaceEquivCellBefore(Instance *inst,
LibertyCell *to_cell)
{
if (graph_) {
InstancePinIterator *pin_iter = network_->pinIterator(inst);
@ -3743,7 +3733,7 @@ Sta::swapEquivCellBefore(Instance *inst,
LibertyPort *port = network_->libertyPort(pin);
if (port->direction()->isAnyInput()) {
Vertex *vertex = graph_->pinLoadVertex(pin);
instanceSetCellPinInvalidate(port, vertex, to_cell);
replaceCellPinInvalidate(port, vertex, to_cell);
// Replace the timing arc sets in the graph edges.
VertexOutEdgeIterator edge_iter(vertex, graph_);
@ -3772,23 +3762,23 @@ Sta::swapEquivCellBefore(Instance *inst,
}
void
Sta::swapEquivCellAfter(Instance *)
Sta::replaceEquivCellAfter(Instance *inst)
{
// No updates required.
}
// Deprecated.
void
Sta::instanceSetEquivCellBefore(Instance *inst,
LibertyCell *to_cell)
{
swapCellBefore(inst, to_cell);
if (graph_) {
InstancePinIterator *pin_iter = network_->pinIterator(inst);
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();
if (network_->direction(pin)->isAnyInput())
parasitics_->loadPinCapacitanceChanged(pin);
}
delete pin_iter;
}
}
void
Sta::instanceSetCellPinInvalidate(LibertyPort *from_port,
Vertex *vertex,
LibertyCell *to_cell)
Sta::replaceCellPinInvalidate(LibertyPort *from_port,
Vertex *vertex,
LibertyCell *to_cell)
{
LibertyPort *to_port = to_cell->findLibertyPort(from_port->name());
if (!libertyPortCapsEqual(to_port, from_port)
@ -3828,18 +3818,18 @@ libertyPortCapsEqual(LibertyPort *port1,
}
void
Sta::swapCellBefore(Instance *inst,
LibertyCell *to_cell)
Sta::replaceCellBefore(Instance *inst,
LibertyCell *to_cell)
{
if (graph_) {
// Delete all edges between instance pins.
// Delete all graph edges between instance pins.
InstancePinIterator *pin_iter = network_->pinIterator(inst);
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();
LibertyPort *port = network_->libertyPort(pin);
if (port->direction()->isAnyInput()) {
Vertex *vertex = graph_->pinLoadVertex(pin);
instanceSetCellPinInvalidate(port, vertex, to_cell);
replaceCellPinInvalidate(port, vertex, to_cell);
VertexOutEdgeIterator edge_iter(vertex, graph_);
while (edge_iter.hasNext()) {
@ -3854,16 +3844,8 @@ Sta::swapCellBefore(Instance *inst,
}
}
// Deprecated.
void
Sta::instanceSetCellBefore(Instance *inst,
LibertyCell *to_cell)
{
swapCellBefore(inst, to_cell);
}
void
Sta::swapCellAfter(Instance *inst)
Sta::replaceCellAfter(Instance *inst)
{
if (graph_) {
graph_->makeInstanceEdges(inst);
@ -3871,18 +3853,13 @@ Sta::swapCellAfter(Instance *inst)
while (pin_iter->hasNext()) {
Pin *pin = pin_iter->next();
sim_->pinSetFuncAfter(pin);
if (network_->direction(pin)->isAnyInput())
parasitics_->loadPinCapacitanceChanged(pin);
}
delete pin_iter;
}
}
// Deprecated.
void
Sta::instanceSetCellAfter(Instance *inst)
{
swapCellAfter(inst);
}
void
Sta::connectPinAfter(Pin *pin)
{
@ -4961,8 +4938,6 @@ Sta::powerPreamble()
// Use arrivals to find clocking info.
searchPreamble();
search_->findAllArrivals();
if (power_ == nullptr)
makePower();
}
void

25
search/Sta.hh
View File

@ -1090,8 +1090,6 @@ public:
// replace_cell
virtual void replaceCell(Instance *inst,
LibertyCell *to_cell);
virtual void swapCell(Instance *inst,
LibertyCell *to_cell) __attribute__ ((deprecated));
virtual Net *makeNet(const char *name,
Instance *parent);
virtual void deleteNet(Net *net);
@ -1108,19 +1106,14 @@ public:
void makePinAfter(Pin *pin) __attribute__ ((deprecated));
// Replace the instance cell with to_cell.
// equivCells(from_cell, to_cell) must be true.
virtual void swapEquivCellBefore(Instance *inst,
LibertyCell *to_cell);
virtual void swapEquivCellAfter(Instance *inst);
void instanceSetEquivCellBefore(Instance *inst,
LibertyCell *to_cell) __attribute__ ((deprecated));
virtual void replaceEquivCellBefore(Instance *inst,
LibertyCell *to_cell);
virtual void replaceEquivCellAfter(Instance *inst);
// Replace the instance cell with to_cell.
// equivCellPorts(from_cell, to_cell) must be true.
virtual void swapCellBefore(Instance *inst,
LibertyCell *to_cell);
virtual void swapCellAfter(Instance *inst);
virtual void instanceSetCellBefore(Instance *inst,
LibertyCell *to_cell) __attribute__ ((deprecated));
void instanceSetCellAfter(Instance *inst) __attribute__ ((deprecated));
virtual void replaceCellBefore(Instance *inst,
LibertyCell *to_cell);
virtual void replaceCellAfter(Instance *inst);
virtual void connectPinAfter(Pin *pin);
virtual void disconnectPinBefore(Pin *pin);
virtual void deleteNetBefore(Net *net);
@ -1167,9 +1160,9 @@ public:
void delaysInvalidFromFanin(Net *net);
void delaysInvalidFromFanin(Pin *pin);
void delaysInvalidFromFanin(Vertex *vertex);
void instanceSetCellPinInvalidate(LibertyPort *from_port,
Vertex *vertex,
LibertyCell *to_cell);
void replaceCellPinInvalidate(LibertyPort *from_port,
Vertex *vertex,
LibertyCell *to_cell);
// Power API.
Power *power() { return power_; }

3
search/StaState.cc
View File

@ -60,7 +60,8 @@ StaState::StaState(const StaState *sta) :
search_(sta->search_),
latches_(sta->latches_),
thread_count_(sta->thread_count_),
pocv_enabled_(sta->pocv_enabled_)
pocv_enabled_(sta->pocv_enabled_),
sigma_factor_(sta->sigma_factor_)
{
}

4
search/TagGroup.cc
View File

@ -253,7 +253,7 @@ TagGroupBldr::setMatchArrival(Tag *tag,
// If the group_tag exists there has to be an arrival map entry for it.
if (tag_match != tag) {
// Replace tag in arrival map.
arrival_map_.eraseKey(tag_match);
arrival_map_.erase(tag_match);
arrival_map_.insert(tag, arrival_index);
}
arrivals_[arrival_index] = arrival;
@ -283,7 +283,7 @@ TagGroupBldr::setMatchArrival(Tag *tag,
void
TagGroupBldr::deleteArrival(Tag *tag)
{
arrival_map_.eraseKey(tag);
arrival_map_.erase(tag);
}
TagGroup *

4
search/WorstSlack.cc
View File

@ -118,7 +118,7 @@ WorstSlack::deleteVertexBefore(Vertex *vertex)
worst_vertex_ = nullptr;
worst_slack_ = slack_init_;
}
queue_.eraseKey(vertex);
queue_.erase(vertex);
}
void
@ -311,7 +311,7 @@ WorstSlack::updateWorstSlack(Vertex *vertex,
debugPrint2(debug, "wns", 3, "delete %s %s\n",
vertex->name(network),
delayAsString(slack, sta));
queue_.eraseKey(vertex);
queue_.erase(vertex);
}
// checkQueue();
}

2
search/WritePathSpice.cc
View File

@ -1353,7 +1353,7 @@ WritePathSpice::writeSubckts()
}
if (!found_ends)
throw SubcktEndsMissing(cell_name, lib_subckt_filename_);
path_cell_names.eraseKey(cell_name);
path_cell_names.erase(cell_name);
}
recordSpicePortNames(cell_name, tokens);
}

2
util/Debug.cc
View File

@ -85,7 +85,7 @@ Debug::setLevel(const char *what,
const char *key;
debug_map_->findKey(what, key, dbg_level, exists);
if (exists) {
debug_map_->eraseKey(what);
debug_map_->erase(what);
delete [] key;
}
// debugCheck map lookup bypass

4
util/HashSet.hh
View File

@ -46,7 +46,7 @@ public:
KEY findKey(KEY key);
KEY findKey(KEY key) const;
bool hasKey(KEY key);
void eraseKey(KEY key);
void erase(KEY key);
bool empty() const;
void clear();
void deleteContentsClear();
@ -351,7 +351,7 @@ HashSet<KEY, HASH, EQUAL>::resize(size_t capacity)
template <class KEY, class HASH, class EQUAL>
void
HashSet<KEY, HASH, EQUAL>::eraseKey(KEY key)
HashSet<KEY, HASH, EQUAL>::erase(KEY key)
{
size_t hash = hash_(key) % capacity_;
HashSetBucket<KEY> *head = table_[hash];

10
util/Map.hh
View File

@ -88,19 +88,9 @@ public:
insert(const KEY &key,
VALUE value)
{
// this->find(key) = value;
this->operator[](key) = value;
}
// Erase the value corresponding to key.
void
eraseKey(KEY key)
{
auto find_iter = this->find(key);
if (find_iter != this->end())
this->erase(find_iter);
}
void
deleteContents()
{

8
util/Set.hh
View File

@ -47,14 +47,6 @@ public:
return find_iter != this->end();
}
// Erase the entry corresponding to key.
void eraseKey(KEY key)
{
auto find_iter = this->find(key);
if (find_iter != this->end())
this->erase(find_iter);
}
// Slowaris STL doesn't support operator== on sets.
static bool equal(const std::set<KEY, CMP> *set1,
const std::set<KEY, CMP> *set2);

18
util/UnorderedMap.hh
View File

@ -91,19 +91,9 @@ public:
insert(const KEY &key,
VALUE value)
{
// this->find(key) = value;
this->operator[](key) = value;
}
// Erase the value corresponding to key.
void
eraseKey(KEY key)
{
auto find_iter = this->find(key);
if (find_iter != this->end())
this->erase(find_iter);
}
void
deleteContents()
{
@ -112,6 +102,14 @@ public:
delete iter.next();
}
void
deleteArrayContents()
{
Iterator iter(this);
while (iter.hasNext())
delete [] iter.next();
}
void
deleteContentsClear()
{

9
util/UnorderedSet.hh
View File

@ -57,15 +57,6 @@ public:
return nullptr;
}
// Erase the value corresponding to key.
void
eraseKey(KEY key)
{
auto find_iter = this->find(key);
if (find_iter != this->end())
this->erase(find_iter);
}
void
deleteContents()
{

2
verilog/VerilogReader.cc
View File

@ -271,7 +271,7 @@ VerilogReader::makeModule(const char *name,
if (cell) {
VerilogModule *module = module_map_[cell];
delete module;
module_map_.eraseKey(cell);
module_map_.erase(cell);
network_->deleteCell(cell);
}
VerilogModule *module = new VerilogModule(name, ports, stmts,