hpin clk disables without graph
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7e71edecf2
commit
f60b82fee5
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@ -1245,9 +1245,6 @@ protected:
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void disconnectPinBefore(Pin *pin,
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ExceptionPathSet *exceptions);
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void clockGroupsDeleteClkRefs(Clock *clk);
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void makeVertexClkHpinDisables(Clock *clk,
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Vertex *vertex,
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FindClkHpinDisables &visitor);
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void clearGroupPathMap();
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AnalysisType analysis_type_;
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37
sdc/Sdc.cc
37
sdc/Sdc.cc
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@ -1392,16 +1392,20 @@ Sdc::ensureClkHpinDisables()
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for (auto clk : clocks_) {
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for (Pin *src : clk->pins()) {
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if (network_->isHierarchical(src)) {
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FindClkHpinDisables visitor(clk, network_, this);
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visitHpinDrvrLoads(src, network_, &visitor);
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FindClkHpinDisables visitor1(clk, network_, this);
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visitHpinDrvrLoads(src, network_, &visitor1);
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PinSeq loads, drvrs;
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PinSet visited_drvrs;
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FindNetDrvrLoads visitor2(nullptr, visited_drvrs, loads, drvrs, network_);
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network_->visitConnectedPins(src, visitor2);
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// Disable fanouts from the src driver pins that do
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// not go thru the hierarchical src pin.
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for (Pin *lpin : clk->leafPins()) {
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Vertex *vertex, *bidirect_drvr_vertex;
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graph_->pinVertices(lpin, vertex, bidirect_drvr_vertex);
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makeVertexClkHpinDisables(clk, vertex, visitor);
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if (bidirect_drvr_vertex)
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makeVertexClkHpinDisables(clk, bidirect_drvr_vertex, visitor);
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for (Pin *drvr : drvrs) {
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for (Pin *load : loads) {
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if (!visitor1.drvrLoadExists(drvr, load))
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makeClkHpinDisable(clk, drvr, load);
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}
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}
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}
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}
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@ -1410,23 +1414,6 @@ Sdc::ensureClkHpinDisables()
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}
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}
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void
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Sdc::makeVertexClkHpinDisables(Clock *clk,
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Vertex *vertex,
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FindClkHpinDisables &visitor)
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{
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VertexOutEdgeIterator edge_iter(vertex, graph_);
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while (edge_iter.hasNext()) {
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Edge *edge = edge_iter.next();
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if (edge->isWire()) {
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Pin *drvr = edge->from(graph_)->pin();
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Pin *load = edge->to(graph_)->pin();
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if (!visitor.drvrLoadExists(drvr, load))
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makeClkHpinDisable(clk, drvr, load);
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}
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}
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}
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void
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Sdc::makeClkHpinDisable(Clock *clk,
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Pin *drvr,
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