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base
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custom_cell_properties: Add bitcell pin name API
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2020-02-12 15:37:51 +01:00 |
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bitcells
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bitcell: Remove hardcoded signal pins
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2020-02-12 15:37:51 +01:00 |
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characterizer
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Adds checks to prevent characterization of redundant corners.
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2020-02-19 15:59:26 -08:00 |
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datasheet
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Convert capital names to lower case for consistency
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2019-08-21 13:45:34 -07:00 |
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drc
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Clean up and generalize layer rules.
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2019-12-17 11:03:36 -08:00 |
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example_configs
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revert example scn4m to non netlist only
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2020-02-09 23:52:11 -08:00 |
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gdsMill
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fixed purposes for gdsMill
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2020-02-15 15:00:30 -08:00 |
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modules
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Fixed issues with sen control logic for read ports.
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2020-02-19 03:06:11 -08:00 |
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pgates
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port_data: Each submodule now specifies their bl/br names
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2020-02-12 15:00:50 +01:00 |
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router
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tech: Make power_grid configurable
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2020-01-28 12:06:34 +01:00 |
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sram
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Merge branch 'dev' into tech_migration
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2020-02-10 22:42:50 +00:00 |
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tests
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Add nwell/pwell tap test
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2020-02-03 18:41:06 +00:00 |
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verify
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Move DRC/LVS/PEX tools to tech file.
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2019-11-29 12:01:33 -08:00 |
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Makefile
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Clean up Makefile for unit tests
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2018-12-05 12:58:10 -08:00 |
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debug.py
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Add layer-purpose GDS support. Various PEP8 fixes.
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2019-11-14 18:17:20 +00:00 |
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gen_stimulus.py
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Remove some flake8 errors/warnings.
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2019-10-02 23:26:02 +00:00 |
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globals.py
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sram_factory: Give proper priority to overrides
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2019-12-19 15:58:00 +01:00 |
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openram.py
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Only setup bitcell when running top-level OpenRAM
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2019-11-26 13:54:37 -08:00 |
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options.py
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Blackbox option for DRC waivers
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2019-11-29 15:50:32 -08:00 |
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run_profile.sh
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Convert pin map to a set for faster membership.
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2019-04-01 15:45:44 -07:00 |
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sram_factory.py
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sram_factory: Add check for duplicate module name
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2019-12-19 16:31:52 +01:00 |
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view_profile.py
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Remove some flake8 errors/warnings.
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2019-10-02 23:26:02 +00:00 |
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